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"tcwg-buildslave pushed a change to branch linaro-local/tested/gnu-master in repository toolchain/llvm/llvm.

from bfd4fdf0e5f [Dominators] Remove the DeferredDominance class adds 4751420c7e3 [X86] Remove unnecessary AddedComplexity line. NFC adds 80ad764eba7 [TargetLowering] Use APInt::isSubsetOf to simplify some code. NFC adds a19815f1d99 [TargetLowering] Simplify one of the special cases in Simpl [...] adds 8750be505da AMDGPU: Fix packing undef parts of build_vector adds 3b2fa4ee595 AMDGPU: Use splat vectors for undefs when folding canonicalize adds 10398322afa AMDGPU: Check NSZ MI flag when folding omod adds ac6c5d8a364 [InstSimplify] Guard against large shift amounts. adds 09ceeb3f508 [InstCombine] move/add tests for fadd/fsub factorization; NFC adds fa0e915a8e4 [InstCombine] fix/enhance fadd/fsub factorization (X * Z) [...] adds 9ff5ab2f4e0 [InstCombine] Fold Select with binary op - non-commutative opcodes adds cac6dd83b25 [Support][JSON][NFC] Silence GCC warning about broken stric [...] adds 3d3659c1e9f [NFC] Renamed test file adds bae42d6404a [NFC] Fixed build, updated tests adds f0912abc34c DAG: Check no-signed-zeros instead of unsafe-fp-math adds 1f25a887f69 AMDGPU: Cleanup min/max legacy tests adds d0ee5d297e8 [globalisel] Remove dead code from GlobalISelEmitter adds 3bc135240d9 [X86] Add constant folding for AVX512 versions of scalar fl [...] adds 069f0c31f78 [InstCombine] Replace call to haveNoCommonBitsSet in visitX [...] adds 6145f7d3cff [InstCombine] Fix typo in comment. NFC adds 7bbb4c9b165 [SelectionDAG] In PromoteFloatRes_BITCAST, insert a bitcast [...] adds fa3003a7832 Restore correct x86_64 EH encodings in kernel code model adds 36c59846ae3 [SelectionDAG] In PromoteIntRes_BITCAST, when the input is [...] adds 3638207d8f9 [SelectionDAG] In PromoteFloatOp_BITCAST, insert a bitcast [...] adds ffc8c538b70 [GuardWidening] Widen very likely non-taken br instructions adds 4514ca2f1dd [ARM] Added FP16 VREV Vector Instrinsic CodeGen support adds 5da7a1c1e5e Remove extra semicolon (fixes -Wpedantic warning). NFCI. adds ef546c9d7f2 [Sparc] Add support for the cycle counter available in GR740 adds 61e1c20944b [Tablegen][SubtargetEmitter] Improve expansion of predicate [...] adds 4177d36e035 [CGP] Fix GEP issue with out of range APInt constant values [...] adds 47b52ac4d99 [DAGCombiner] simplifyDivRem - add comment describing divid [...] adds a73fb6d0ab6 [X86] Add tests showing missing div/rem 0, X -> 0 combines adds 6cc0fcd6bb5 [SystemZ] Increase the amount of inlining. adds d9eaefb8663 Check for tied operands adds 01087accf22 Revert "[Sparc] Add support for the cycle counter available [...] adds 423c85b5519 [Hexagon] Silence -Wuninitialized warning from GCC 5.4, NFC adds 87972c49190 [Tablegen] Replace uses of formatted_raw_ostream with raw_o [...]

No new revisions were added by this update.

Summary of changes: include/llvm/Support/JSON.h | 5 +- include/llvm/Target/TargetSchedule.td | 2 +- lib/Analysis/ConstantFolding.cpp | 81 +++- lib/Analysis/InstructionSimplify.cpp | 6 +- lib/CodeGen/CodeGenPrepare.cpp | 9 +- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 11 +- lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 19 +- lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 4 +- lib/CodeGen/SelectionDAG/TargetLowering.cpp | 44 +- lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 23 +- lib/Target/AMDGPU/SIFoldOperands.cpp | 10 +- lib/Target/AMDGPU/SIISelLowering.cpp | 42 +- lib/Target/AMDGPU/SIInstructions.td | 23 +- lib/Target/ARM/ARMInstrNEON.td | 2 + lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp | 1 + lib/Target/Hexagon/HexagonBitSimplify.cpp | 4 + lib/Target/SystemZ/SystemZTargetTransformInfo.h | 2 + lib/Target/X86/X86InstrCompiler.td | 2 +- lib/Transforms/InstCombine/InstCombineAddSub.cpp | 132 ++---- lib/Transforms/InstCombine/InstCombineAndOrXor.cpp | 10 +- lib/Transforms/InstCombine/InstCombineSelect.cpp | 5 +- lib/Transforms/Scalar/GuardWidening.cpp | 71 ++- .../AMDGPU/build-vector-packed-partial-undef.ll | 380 ++++++++++++++++ test/CodeGen/AMDGPU/call-argument-types.ll | 4 +- test/CodeGen/AMDGPU/clamp.ll | 32 ++ test/CodeGen/AMDGPU/fcanonicalize.f16.ll | 67 ++- test/CodeGen/AMDGPU/fmax_legacy.f64.ll | 165 ++++++- test/CodeGen/AMDGPU/fmax_legacy.ll | 108 +++-- test/CodeGen/AMDGPU/fmin_fmax_legacy.amdgcn.ll | 4 +- test/CodeGen/AMDGPU/fmin_legacy.f64.ll | 389 +++++++++++++++- test/CodeGen/AMDGPU/fmin_legacy.ll | 130 +++--- test/CodeGen/AMDGPU/mad-mix-hi.ll | 6 +- test/CodeGen/AMDGPU/omod-nsz-flag.mir | 71 +++ .../CodeGen/ARM/armv8.2a-fp16-vector-intrinsics.ll | 24 +- test/CodeGen/NVPTX/bug22322.ll | 2 +- test/CodeGen/X86/code-model-kernel.ll | 79 ++++ test/CodeGen/X86/combine-sdiv.ll | 67 +++ test/CodeGen/X86/combine-srem.ll | 68 +++ test/CodeGen/X86/combine-udiv.ll | 67 +++ test/CodeGen/X86/combine-urem.ll | 68 +++ test/CodeGen/X86/getelementptr.ll | 11 + test/CodeGen/X86/pr38533.ll | 65 +++ test/MC/Hexagon/tied-ops.s | 6 + test/Transforms/ConstProp/avx512.ll | 490 +++++++++++++++++++++ .../GuardWidening/widen-frequent-branches.ll | 461 ++++++++++++++++++- test/Transforms/InstCombine/fadd-fsub-factor.ll | 473 ++++++++++++++++++++ test/Transforms/InstCombine/fast-math.ll | 373 ---------------- .../{select-binop-icmp.ll => select-binop-cmp.ll} | 27 +- test/Transforms/SimplifyCFG/merge-cond-stores.ll | 3 +- unittests/Support/TypeTraitsTest.cpp | 2 +- utils/TableGen/GlobalISelEmitter.cpp | 17 - utils/TableGen/InstrInfoEmitter.cpp | 55 +-- utils/TableGen/PredicateExpander.cpp | 120 +++-- utils/TableGen/PredicateExpander.h | 57 ++- utils/TableGen/SubtargetEmitter.cpp | 73 ++- 55 files changed, 3574 insertions(+), 898 deletions(-) create mode 100644 test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll create mode 100644 test/CodeGen/AMDGPU/omod-nsz-flag.mir create mode 100644 test/CodeGen/X86/code-model-kernel.ll create mode 100644 test/CodeGen/X86/pr38533.ll create mode 100644 test/MC/Hexagon/tied-ops.s create mode 100644 test/Transforms/ConstProp/avx512.ll create mode 100644 test/Transforms/InstCombine/fadd-fsub-factor.ll rename test/Transforms/InstCombine/{select-binop-icmp.ll => select-binop-cmp.ll} (96%)