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from 1ca82f9a91d [mir-canon][NFC] Adding -verify-machineinstrs to mir-canon tests. new 4c7535db165 AMDGPU/GlobalISel: Fix assert on load from constant address new 6c2a25a8f6d AMDGPU/GlobalISel: Fix placeholder value used for addrspacecast new ef8535baee6 AMDGPU/GlobalISel: Restore insert point when getting aperture new 9f717fa86d2 AMDGPU: Add intrinsics for address space identification

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Summary of changes: include/llvm/IR/IntrinsicsAMDGPU.td | 12 +++ lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp | 3 + lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp | 8 +- lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 32 ++++++- lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 2 + lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 17 +++- lib/Target/AMDGPU/SIISelLowering.cpp | 13 +++ .../AMDGPU/GlobalISel/inst-select-load-smrd.mir | 27 ++++++ .../AMDGPU/GlobalISel/legalize-addrspacecast.mir | 86 +++++++++++++---- .../AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll | 103 +++++++++++++++++++++ .../AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll | 103 +++++++++++++++++++++ .../CodeGen/AMDGPU/annotate-kernel-features-hsa.ll | 19 ++++ test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll | 50 ++++++++++ test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll | 51 ++++++++++ .../AMDGPU/address-space-id-funcs.ll | 55 +++++++++++ 15 files changed, 553 insertions(+), 28 deletions(-) create mode 100644 test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll create mode 100644 test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll create mode 100644 test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll create mode 100644 test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll create mode 100644 test/Transforms/InferAddressSpaces/AMDGPU/address-space-id-funcs.ll