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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig in repository toolchain/ci/llvm-project.

from fcffc2faccf [X86] CombineShuffleWithExtract - handle cases with differe [...] adds d14389c0a55 [x86] split 256-bit vector selects if operands are vector concats adds 9ff09d49dae [analyzer][NFC] Tease apart and clang-format NoStoreFuncVisitor adds 33b46a6df0b [analyzer] Track indices of arrays adds c8d88ad1a91 [CodeGenPrepare][x86] shift both sides of a vector select w [...] adds e20b388e2f9 [analyzer] Push correct version of 'Track indices of arrays' adds 52500216727 [AMDGPU] gfx10 conditional registers handling adds 490e83cd438 AMDGPU/GFX10: Support DLC bit in llvm.amdgcn.s.buffer.load [...] adds 4d4ef2a1671 [analyzer] ReturnVisitor: more portable test case adds 6d71be4e67e AMDGPU: Be explicit about whether the high-word in SI_PC_AD [...] adds 41abf2766e2 AMDGPU: Prepare for explicit absolute relocations in code g [...] adds 3a92aa29992 [docs] Fix a few problems with clang-tool docs to get the b [...] adds 2da0b89d92f [AsmPrinter] Make EmitLinkage and EmitVisibility public adds 9d8c94dfd76 [docs] Fix another bot warning by adding a blank line to se [...] adds 9b2d96024ae [docs] Fix another bot error by setting highlight language [...] adds 5a663bd77ac [InstSimplify] Fix addo/subo undef folds (PR42209) adds 9f2f1270096 [X86] Add TB_NO_REVERSE to some folding table entries where [...] adds 13de174b4c4 [llvm-objcopy] Add elf32-sparc and elf32-sparcel target adds 4f157320676 [yaml2obj][MachO] Don't fill dummy data for virtual sections adds 1d1cf30b738 PowerPC: Optimize SPE double parameter calling setup adds ee62c40eae9 [SimplifyCFG] Fix prof branch_weights MD while removing unr [...] adds a71ce4f1e8e DWARF: Avoid storing DIERefs in long-lived containers adds a9e5d2f35dd Re-commit r357452 (take 3): "SimplifyCFG SinkCommonCodeFrom [...] adds 966f4e874e0 [ARM] Extract some code from ARMConstantIslandPass adds f7c0b3aeb22 [ARM] Add ARMBasicBlockInfo.cpp adds a059efa885f [ARM] Remove ARMComputeBlockSize adds 5d6ee76c163 Describe stack-id as an enum adds 89d6905c595 [ARM] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off [...] adds 4bde5d3c081 [ARM] Fix another -Wunused-variable in -DLLVM_ENABLE_ASSERT [...] adds 43cf5ae48a0 [lldb] [test] Skip watchpoint tests on NetBSD if userdbregs [...] adds 25a043e78a9 [NFC][Codegen] Standalone tests for icmp eq/ne (urem %x, C) [...] adds ac14f7b10cf [lit] Delete empty lines at the end of lit.local.cfg NFC adds 46f9cbe28d4 [llvm-objdump] Use %08 instead of %016 to print leading add [...] adds 60d6fb2a634 [SCEV] Use NoWrapFlags when expanding a simple mul adds 9d81915fcaa Recommit [OpenCL] Move OpenCLBuiltins.td and remove unused include adds ef78e55205e [SelectionDAG] Fold insert_subvector(undef, extract_subvect [...] adds 5401c2db6ee Fix clang -Wcovered-switch-default after stack-id change by D60137

No new revisions were added by this update.

Summary of changes: clang-tools-extra/docs/ReleaseNotes.rst | 5 +- .../clang-tidy/checks/android-cloexec-pipe.rst | 1 + .../cppcoreguidelines-pro-type-member-init.rst | 1 + clang/docs/ReleaseNotes.rst | 2 +- clang/include/clang/Basic/CMakeLists.txt | 6 - clang/lib/Sema/CMakeLists.txt | 8 + .../clang/Basic => lib/Sema}/OpenCLBuiltins.td | 0 clang/lib/Sema/SemaLookup.cpp | 2 +- .../StaticAnalyzer/Core/BugReporterVisitors.cpp | 729 +++++++++++---------- .../Analysis/diagnostics/track_subexpressions.cpp | 64 ++ .../inlining/placement-new-fp-suppression.cpp | 3 +- clang/test/CodeGenCXX/nrvo.cpp | 1 - clang/test/CodeGenCXX/stack-reuse-exceptions.cpp | 2 +- clang/test/CodeGenObjC/exceptions.m | 2 +- lld/test/ELF/arm-thunk-multipass-plt.s | 14 +- lld/test/ELF/arm-tls-gd32.s | 2 +- lld/test/ELF/gnu-ifunc-noplt-i386.s | 12 +- lld/test/ELF/ppc32-call-stub-nopic.s | 2 +- lld/test/ELF/ppc32-call-stub-pic.s | 2 +- lldb/packages/Python/lldbsuite/test/dotest.py | 25 + lldb/source/Plugins/SymbolFile/DWARF/DIERef.h | 4 - .../SymbolFile/DWARF/DWARFASTParserClang.cpp | 2 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 70 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.h | 7 +- llvm/include/llvm/CodeGen/AsmPrinter.h | 14 +- llvm/include/llvm/CodeGen/MIRYamlMapping.h | 18 +- llvm/include/llvm/CodeGen/TargetFrameLowering.h | 19 + llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 2 +- llvm/include/llvm/MC/MCExpr.h | 2 + llvm/lib/Analysis/InstructionSimplify.cpp | 19 +- llvm/lib/Analysis/ScalarEvolutionExpander.cpp | 4 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 45 +- llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 9 + llvm/lib/CodeGen/MIRPrinter.cpp | 5 +- llvm/lib/CodeGen/MachineFrameInfo.cpp | 4 +- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 22 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 6 + llvm/lib/MC/MCExpr.cpp | 4 + llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 20 +- llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 13 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 4 + .../Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 8 +- llvm/lib/Target/AMDGPU/SIDefines.h | 7 - llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 34 +- llvm/lib/Target/AMDGPU/SIFrameLowering.h | 2 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 135 +++- llvm/lib/Target/AMDGPU/SIISelLowering.h | 2 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 20 +- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 6 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 229 +++++-- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 9 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 3 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 7 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 7 +- llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 81 ++- llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp | 68 +- llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp | 87 ++- .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 51 +- llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 5 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 29 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 15 + llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | 25 +- llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp | 50 +- llvm/lib/Target/AMDGPU/SMInstructions.td | 14 +- llvm/lib/Target/ARM/ARM.h | 5 - llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp | 146 +++++ llvm/lib/Target/ARM/ARMBasicBlockInfo.h | 48 ++ llvm/lib/Target/ARM/ARMComputeBlockSize.cpp | 80 --- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 158 ++--- llvm/lib/Target/ARM/CMakeLists.txt | 2 +- llvm/lib/Target/PowerPC/PPCCallingConv.cpp | 54 ++ llvm/lib/Target/PowerPC/PPCCallingConv.td | 7 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 119 ++-- llvm/lib/Target/PowerPC/PPCISelLowering.h | 17 +- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 12 + llvm/lib/Target/PowerPC/PPCInstrSPE.td | 12 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 36 + llvm/lib/Target/X86/X86InstrFoldTables.cpp | 18 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 38 +- llvm/test/Analysis/CostModel/ARM/lit.local.cfg | 1 - llvm/test/Analysis/CostModel/PowerPC/lit.local.cfg | 1 - llvm/test/Analysis/CostModel/RISCV/lit.local.cfg | 1 - llvm/test/Analysis/CostModel/X86/lit.local.cfg | 1 - .../AArch64/GlobalISel/arm64-irtranslator.ll | 6 +- .../AArch64/GlobalISel/arm64-regbankselect.mir | 2 +- .../CodeGen/AArch64/GlobalISel/call-translator.ll | 2 +- .../GlobalISel/fp128-legalize-crash-pr35690.mir | 2 +- .../AArch64/GlobalISel/select-gv-cmodel-large.mir | 2 +- .../AArch64/GlobalISel/select-gv-cmodel-tiny.mir | 2 +- .../CodeGen/AArch64/aarch64-mov-debug-locs.mir | 12 +- .../CodeGen/AArch64/branch-target-enforcment.mir | 4 +- llvm/test/CodeGen/AArch64/cfi_restore.mir | 4 +- .../dont-shrink-wrap-stack-mayloadorstore.mir | 4 +- llvm/test/CodeGen/AArch64/max-jump-table.ll | 48 +- llvm/test/CodeGen/AArch64/min-jump-table.ll | 30 +- .../CodeGen/AArch64/reverse-csr-restore-seq.mir | 2 +- .../CodeGen/AArch64/spill-stack-realignment.mir | 4 +- llvm/test/CodeGen/AArch64/stack-id-pei-alloc.mir | 20 +- .../AArch64/stack-id-stackslot-scavenging.mir | 2 +- llvm/test/CodeGen/AArch64/win64-jumptable.ll | 52 +- llvm/test/CodeGen/AArch64/wineh-frame5.mir | 2 +- llvm/test/CodeGen/AArch64/wineh-frame6.mir | 14 +- llvm/test/CodeGen/AArch64/wineh-frame7.mir | 14 +- llvm/test/CodeGen/AArch64/wineh-frame8.mir | 4 +- llvm/test/CodeGen/AArch64/wineh1.mir | 20 +- llvm/test/CodeGen/AArch64/wineh2.mir | 30 +- llvm/test/CodeGen/AArch64/wineh3.mir | 28 +- llvm/test/CodeGen/AArch64/wineh4.mir | 28 +- llvm/test/CodeGen/AArch64/wineh5.mir | 20 +- llvm/test/CodeGen/AArch64/wineh6.mir | 18 +- llvm/test/CodeGen/AArch64/wineh7.mir | 14 +- llvm/test/CodeGen/AArch64/wineh8.mir | 28 +- llvm/test/CodeGen/AArch64/wineh_shrinkwrap.mir | 2 +- llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll | 2 +- ...galizer-multiple-mem-operands-nontemporal-1.mir | 6 +- ...galizer-multiple-mem-operands-nontemporal-2.mir | 6 +- .../CodeGen/AMDGPU/mubuf-legalize-operands.mir | 285 +++++--- .../AMDGPU/no-initializer-constant-addrspace.ll | 2 +- llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir | 2 +- .../CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir | 14 +- llvm/test/CodeGen/AMDGPU/smrd-gfx10.ll | 37 ++ llvm/test/CodeGen/AMDGPU/smrd.ll | 85 +-- .../AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir | 4 +- .../AMDGPU/undefined-physreg-sgpr-spill.mir | 4 +- llvm/test/CodeGen/ARC/lit.local.cfg | 1 - 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.../Transforms/CodeExtractor/X86/lit.local.cfg | 1 - .../CodeGenPrepare/AArch64/lit.local.cfg | 1 - .../Transforms/CodeGenPrepare/AMDGPU/lit.local.cfg | 1 - .../Transforms/CodeGenPrepare/ARM/lit.local.cfg | 1 - .../Transforms/CodeGenPrepare/X86/lit.local.cfg | 1 - .../Transforms/CodeGenPrepare/X86/vec-shift.ll | 49 +- .../ConstantHoisting/PowerPC/lit.local.cfg | 1 - .../Transforms/ConstantHoisting/X86/lit.local.cfg | 1 - .../Transforms/DivRemPairs/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/DivRemPairs/X86/lit.local.cfg | 1 - .../test/Transforms/ExpandMemCmp/X86/lit.local.cfg | 1 - .../Transforms/GlobalOpt/PowerPC/lit.local.cfg | 1 - .../Transforms/HardwareLoops/ARM/lit.local.cfg | 1 - .../test/Transforms/HotColdSplit/X86/lit.local.cfg | 1 - .../InferAddressSpaces/AMDGPU/lit.local.cfg | 1 - llvm/test/Transforms/Inline/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/Inline/X86/lit.local.cfg | 1 - .../Transforms/InstCombine/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/InstCombine/with_overflow.ll | 1 + llvm/test/Transforms/InstSimplify/call.ll | 16 +- .../LoadStoreVectorizer/AMDGPU/lit.local.cfg | 1 - .../LoadStoreVectorizer/NVPTX/lit.local.cfg | 1 - .../LoadStoreVectorizer/X86/lit.local.cfg | 1 - .../test/Transforms/LoopIdiom/AMDGPU/lit.local.cfg | 1 - llvm/test/Transforms/LoopIdiom/X86/lit.local.cfg | 1 - .../LoopIdiom/X86/unordered-atomic-memcpy.ll | 8 +- llvm/test/Transforms/LoopIdiom/basic.ll | 12 +- .../LoopIdiom/memcpy-debugify-remarks.ll | 2 +- llvm/test/Transforms/LoopReroll/basic.ll | 2 +- llvm/test/Transforms/LoopReroll/complex_reroll.ll | 2 +- llvm/test/Transforms/LoopReroll/nonconst_lb.ll | 4 +- llvm/test/Transforms/LoopReroll/ptrindvar.ll | 2 +- .../LoopStrengthReduce/2011-10-06-ReusePhi.ll | 4 +- .../LoopStrengthReduce/AMDGPU/lit.local.cfg | 1 - .../LoopStrengthReduce/ARM/lit.local.cfg | 1 - .../LoopStrengthReduce/X86/lit.local.cfg | 1 - .../LoopStrengthReduce/post-inc-icmpzero.ll | 2 +- .../Transforms/LoopUnroll/AArch64/lit.local.cfg | 1 - .../Transforms/LoopUnroll/AMDGPU/lit.local.cfg | 1 - llvm/test/Transforms/LoopUnroll/ARM/lit.local.cfg | 1 - .../Transforms/LoopUnroll/Hexagon/lit.local.cfg | 1 - .../Transforms/LoopUnroll/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/LoopUnroll/X86/lit.local.cfg | 1 - .../Transforms/LoopVectorize/AArch64/lit.local.cfg | 1 - .../Transforms/LoopVectorize/ARM/lit.local.cfg | 1 - .../Transforms/LoopVectorize/PowerPC/lit.local.cfg | 1 - .../Transforms/LoopVectorize/X86/lit.local.cfg | 1 - llvm/test/Transforms/PGOProfile/X86/lit.local.cfg | 1 - .../Transforms/SLPVectorizer/AMDGPU/lit.local.cfg | 1 - .../Transforms/SLPVectorizer/SystemZ/lit.local.cfg | 1 - .../Transforms/SLPVectorizer/X86/lit.local.cfg | 1 - .../Transforms/SafeStack/AArch64/lit.local.cfg | 1 - llvm/test/Transforms/SafeStack/ARM/lit.local.cfg | 1 - llvm/test/Transforms/SafeStack/X86/lit.local.cfg | 1 - .../AMDGPU/lit.local.cfg | 1 - .../SeparateConstOffsetFromGEP/NVPTX/lit.local.cfg | 1 - .../Transforms/SimplifyCFG/SPARC/lit.local.cfg | 1 - llvm/test/Transforms/SimplifyCFG/X86/lit.local.cfg | 1 - .../Transforms/SimplifyCFG/sink-common-code.ll | 44 ++ llvm/test/Transforms/SimplifyCFG/switch-profmd.ll | 35 + .../Transforms/StackProtector/X86/lit.local.cfg | 1 - .../ThinLTOBitcodeWriter/x86/lit.local.cfg | 1 - llvm/test/tools/dsymutil/ARM/lit.local.cfg | 1 - llvm/test/tools/llvm-lib/lit.local.cfg | 1 - llvm/test/tools/llvm-lto2/X86/lit.local.cfg | 1 - llvm/test/tools/llvm-mc/lit.local.cfg | 1 - llvm/test/tools/llvm-mca/SystemZ/lit.local.cfg | 1 - llvm/test/tools/llvm-mca/X86/lit.local.cfg | 1 - llvm/test/tools/llvm-mca/lit.local.cfg | 1 - .../tools/llvm-objcopy/ELF/cross-arch-headers.test | 12 + llvm/test/tools/llvm-objdump/Mips/lit.local.cfg | 1 - .../tools/llvm-objdump/PowerPC/branch-offset.s | 4 +- .../tools/llvm-objdump/X86/print-symbol-addr.s | 35 +- llvm/test/tools/llvm-readobj/AArch64/lit.local.cfg | 1 - llvm/test/tools/llvm-readobj/ARM/lit.local.cfg | 1 - llvm/tools/llvm-objcopy/CopyConfig.cpp | 3 + llvm/tools/llvm-objdump/llvm-objdump.cpp | 13 +- llvm/tools/yaml2obj/yaml2macho.cpp | 18 +- 368 files changed, 3602 insertions(+), 2192 deletions(-) rename clang/{include/clang/Basic => lib/Sema}/OpenCLBuiltins.td (100%) create mode 100644 llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp delete mode 100644 llvm/lib/Target/ARM/ARMComputeBlockSize.cpp create mode 100644 llvm/test/CodeGen/AMDGPU/smrd-gfx10.ll create mode 100644 llvm/test/CodeGen/X86/omit-urem-of-power-of-two-or-zero-when-co [...] create mode 100644 llvm/test/ObjectYAML/MachO/virtual_section.yaml create mode 100644 llvm/test/Transforms/SimplifyCFG/switch-profmd.ll