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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig in repository toolchain/ci/llvm-project.
from e5b4dbab041 [llvm] Simplify string comparisons (NFC) adds b1c304c4946 [CodeGen] Try to make the print of memory operand alignment [...] adds edde2eb1d20 Add unconditional logging to debugserver for launch/attach [...] adds f9ef3a60037 [SelectionDAG] Make isConstantIntBuildVectorOrConstantInt a [...] adds b688c5875d0 [CMake] Split the target side of runtimes build adds df74c001fa5 [DAGCombiner] Replace static helper function isConstantFPBu [...] adds 93ad0edf674 [ELF] Drop .rel[a].debug_gnu_pub{names,types} for --gdb-ind [...] adds 1cc5235712f [WebAssembly] Misc. refactoring in CFGStackify (NFC) adds 215ed9b33cc Adapt CastExpr::getSubExprAsWritten to ConstantExpr adds c8a914db5c6 [LiveDebugValues] Fix comparison operator in VarLocBasedImpl adds 6a195491b60 [AMDGPU] Fix failing assert with scratch ST mode adds 7ab803095ae [clang][cli] Remove -f[no-]trapping-math from -cc1 command line adds bd30a796fc4 [mlir] use built-in vector types instead of LLVM dialect ty [...] adds e8287cb2b29 [Test] Add failing test for PR48725 adds c93b9559390 [WebAssembly] Remove more unnecessary brs in CFGStackify adds 9ec72cfc61a [llvm-readef/obj] - Change the design structure of ELF dump [...] adds 1e11402aa8e [llvm-readobj] - Add 'override' to fix build bots. adds cc91efdabee [llvm-readobj] - An attempt to fix BB. adds 4744478b99f [mlir][openmp][NFCI] Rename `continuationIP` to `continuati [...] adds 891b4873c12 [llvm-readobj] - One more attempt to fix BB. adds c1e08f0073e [clang][AST] Get rid of an alignment hack in DeclObjC.h [NFCI] adds f264f9ad7df [SlotIndexes] Fix and simplify basic block splitting adds 794e3d94d5a [AMDGPU][GlobalISel] Remove some duplicate RUN lines adds 60df7c08b1f [obj2yaml,yaml2obj] - Fix issues with creating/dumping grou [...] adds c15a57cc1a8 [obj2yaml] - Don't crash when an object has an empty symbol table. adds a06aa1037c1 Revert "[Test] Add failing test for PR48725" adds ace516fb33d Change the LLVM_ATTRIBUTE_DEPRECATED macro to use C++14 attribute. adds 09db958e37b [RISCV] Improve scalable-vector shift tests (NFC) adds a5212b5c91c [X86][SSE] combineSubToSubus - remove SSE2 early-out. adds c4944a6f53f [Fixed Point] Add codegen for conversion between fixed-poin [...] adds 7e44208115b [X86][SSE] combineSubToSubus - add v16i32 handling on pre-A [...] adds 2ed914cb7e9 [X86][SSE] getFauxShuffleMask - handle PACKSS(SRAI(),SRAI() [...] adds 80f07854886 [mlir][Linalg] NFC - Refactor fusion APIs adds a6759477129 [TableGen] Improve error message for semicolon after braced body. adds 0bd9a136911 [mlir][openacc] Use TableGen information for default enum adds 07605ea1f3c [X86] Improved lowering for saturating float to int. adds 24faa87075a [VE] Update VELIntrinsic tests adds 2f7ec77e3cd [mlir][spirv] NFC: place ops in the proper file for their c [...] adds dd07d60ec33 [SLP] Add test case showing a bug when dealing with padded types adds 3f7b4ce9606 [PowerPC] Add support for embedded devices with EFPU2 adds 4086072f8a9 Reland "[mlir][linalg] Support parsing attributes in named [...] adds 4fa01f72de6 [mlir][CAPI] Fix inline function declaration adds 9667d15e749 [mlir] Fix for LIT tests adds 1f1250151f2 [libc++] [C++2b] [P1048] Add is_scoped_enum and is_scoped_enum_v. adds 8349fa0fdd3 [mlir][spirv] NFC: split deserialization into multiple sour [...] adds 93b54b7c673 [PowerPC][NFCI] PassSubtarget to ASMWriter adds 67a339e9683 [MLIR] Disallow `sym_visibility`, `sym_name` and `type` att [...] adds 85aaa3e310c [X86] Regenerate sdiv_fix_sat.ll + udiv_fix_sat.ll tests adds dd955771240 Fix typo in diagnostic message adds a4931d4fe38 [AMDGPU] Regenerate umax crash test adds 3d9c51d111d [SVE][NFC] Regenerate a few CodeGen tests adds 348471575d9 Add -ansi option to CompileOnly group adds b117d17d264 [doc] Place sha256 in lld/README.md into backticks adds ef3800e8216 Return false from __has_declspec_attribute() if not explici [...] adds 5aefc8dc4d1 [llvm] [cmake] Remove obsolete /usr/local hack for *BSD adds bb9ebf6baf7 [Tests] Add tests for new InstCombine OR transformation, NFC adds 0529946b5ba [instCombine] Add (A ^ B) | ~(A | B) -> ~(A & B) adds 6f4d4607620 [Flang][openmp][openacc] Extend CheckNoBranching to handle [...] adds 03c8d6a0c4b [LegalizeDAG][RISCV][PowerPC][AMDGPU][WebAssembly] Improve [...] adds 4718ec01669 [clangd] Avoid recursion in TargetFinder::add() adds f748e922955 [NewPM] Run non-trivial loop unswitching under -O2/3/s/z adds a14040bd4d9 [RISCV] Use vmerge.vim for llvm.riscv.vfmerge with a 0.0 sc [...] adds 08d4a50467e [FunctionAttrs] Precommit tests for willreturn inference. adds eef4bdbb34d [libc++] Add a missing `<_Compare>` template argument. adds 79f99ba65d9 [libcxx] Port to OpenBSD adds 7ecad2e4ced [InstSimplify] Don't fold gep p, -p to null adds bdd1ad5e5c5 [OpenMP] Fixed include directories for OpenMP when building [...] adds 33e2494bea6 [libomptarget][amdgpu][nfc] Fix build on centos adds e5f51fdd650 [clang][aarch64] Precondition isHomogeneousAggregate on isC [...] adds 6cd44b204c6 [FunctionAttrs] Derive willreturn for fns with readonly` & [...] adds e53bbd99516 [IR] move nomerge attribute from function declaration/defin [...] adds 922a5b89411 [clang-tidy] Add test for Transformer-based checks with dia [...] adds d49974f9c98 [InstCombine] Regenerate test checks (NFC) adds 9f61fbd75ae [LV] Relax assumption that LCSSA implies single entry adds f706486eaf0 Fix for crash in __builtin_return_address in template context. adds fb063c933f0 [InstCombine] Duplicate tests for logical and/or (NFC) adds caafdf07bbc [LV] Weaken spuriously strong assert in LoopVersioning adds 46507a96fc1 [SLP] reduce code duplication while matching reductions; NFC adds 554be30a428 [SLP] reduce code duplication in processing reductions; NFC adds 92fb5c49e8a [SLP] rename variable to improve readability; NFC adds 9e7895a8682 [SLP] reduce code duplication while processing reductions; NFC adds 7583ae48a3c [RISCV] Add double test cases to vfmerge-rv32.ll. NFC adds e15f3ddcae6 [InstCombine] Add tests for logical and/or poison implicati [...] adds 71ed4b6ce57 [RISCV] Legalize select when Zbt extension available adds 23390e7a131 [InstCombine] Handle logical and/or in assume optimization adds 7fd18508134 [mlir] Update LLVM dialect type documentation adds 2a49b7c64a3 [Inliner] Change inline remark format and update ReplayInli [...] adds 68ff52ffead [OpenMP] Fixed the link error that cannot find static data member adds d1fa7afc7ae [AArch64] [Windows] Properly add :lo12: reloc specifiers wh [...] adds 02f1d28ed6b [libcxx] Avoid overflows in the windows __libcpp_steady_clo [...] adds 01f1273fe2f [OpenMP] Fixed a typo in openmp/CMakeLists.txt adds 3d397091591 AMDGPU: Remove wrapper only call limitation adds cf45731f0ea [Driver] Fix assertion failure when -fprofile-generate -fcs [...] adds 55f2eeebc96 [NFC] Disallow unused prefixes in MC/AMDGPU adds a7130d85e4b [ADT][NFC] Use empty base optimisation in BumpPtrAllocatorImpl adds 1730b0f66ad [RISCV] Remove '.mask' from vcompress intrinsic name. NFC adds 6166b91e837 [ELF][NFCI] small cleanup to OutputSections.h adds 175288a1afe Add sample-profile-suffix-elision-policy attribute with -fu [...] adds ddcb0aae8b0 [MIPatternMatch] Add matcher for G_PTR_ADD adds 8f5ec459375 [Sanitizer][Darwin] Fix test for macOS 11+ point releases adds 585612355cd [NFC] Disallow unused prefixes under MC/AMDGPU adds 0d88d7d82bc Delete unused function (was breaking the -Werror build) adds 314e29ed2b7 [AMDGPU] Add _e64 suffix to VOP3 Insts adds 04edcc02638 [libc] add isascii and toascii implementations adds 0c8466c0015 [libc][NFC] Use more specific comparison macros in LdExpTest.h. adds 76643c48cdd [LangRef] State that a nocapture pointer cannot be returned adds 25eb7b08ba7 [DAGCombiner] Fold BRCOND(FREEZE(COND)) to BRCOND(COND) adds 82655c15145 [MSan] Tweak CopyOrigin adds 25b3921f2fc [gn build] (manually) port 79f99ba65d96 adds c0f3ea8a08c [mlir][Python] Add checking process before create an Affine [...] adds 055644cc459 [X86][AMX] Prohibit pointer cast on load. adds 5c7dcd7aead [Coroutine] Update promise object's final layout index adds 6529d7c5a45 [PDB] Defer relocating .debug$S until commit time and paral [...] adds 6f0f0220380 [OpenMP] Update allocator trait key/value definitions adds acea470c167 [gn build] Reorganize libcxx/include/BUILD.gn a bit adds 0066a09579c [libc++] Give extern templates default visibility on gcc adds bba3a82b56c [OpenMP] Use persistent memory for omp_large_cap_mem adds 914e2f5a02f [NFC] Use generic name for scalable vector stack ID. adds e5553b9a6ab [dsymutil] Warn on timestmap mismatch between object file a [...] adds cd8a80de960 [Orc] Add a unit test for asynchronous definition generation. adds f454c9f102a [InlineSpiller] Re-tie operands if folding failed
No new revisions were added by this update.
Summary of changes: clang-tools-extra/clangd/FindTarget.cpp | 10 + clang-tools-extra/clangd/FindTarget.h | 3 + .../clangd/unittests/FindTargetTests.cpp | 41 + .../clang-tidy/TransformerClangTidyCheckTest.cpp | 38 +- clang/docs/ClangCommandLineReference.rst | 2 + clang/include/clang/AST/DeclObjC.h | 30 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 2 +- clang/include/clang/Driver/Options.td | 7 +- clang/lib/AST/DeclObjC.cpp | 4 +- clang/lib/AST/Expr.cpp | 2 +- clang/lib/Basic/Targets/PPC.cpp | 6 +- clang/lib/CodeGen/CGCXXABI.h | 7 + clang/lib/CodeGen/CGCall.cpp | 16 +- clang/lib/CodeGen/CGExprScalar.cpp | 37 +- clang/lib/CodeGen/CodeGenModule.cpp | 3 - clang/lib/CodeGen/MicrosoftCXXABI.cpp | 16 +- clang/lib/CodeGen/TargetInfo.cpp | 6 +- clang/lib/Driver/ToolChains/Clang.cpp | 8 +- clang/lib/Frontend/CompilerInvocation.cpp | 8 - clang/lib/Lex/PPMacroExpansion.cpp | 10 +- clang/lib/Sema/SemaChecking.cpp | 3 +- clang/test/CodeGen/attr-nomerge.cpp | 54 +- clang/test/CodeGen/fpconstrained.c | 4 +- clang/test/CodeGen/fpconstrained.cpp | 4 +- clang/test/CodeGen/noexceptionsfpmath.c | 2 +- clang/test/CodeGenCUDA/propagate-metadata.cu | 12 +- clang/test/CodeGenCXX/homogeneous-aggregates.cpp | 69 + clang/test/Driver/fast-math.c | 4 - clang/test/Driver/fcs-profile-generate.c | 15 + clang/test/Driver/fp-model.c | 8 - clang/test/Driver/ppc-features.cpp | 3 + clang/test/Frontend/fixed_point_compound.c | 110 + clang/test/Frontend/fixed_point_conversions.c | 299 ++ clang/test/Frontend/fixed_point_conversions_half.c | 309 ++ .../optimization-remark-with-hotness-new-pm.c | 2 +- .../Frontend/optimization-remark-with-hotness.c | 2 +- clang/test/Parser/fp-floatcontrol-syntax.cpp | 4 +- clang/test/Sema/builtin-returnaddress.c | 12 + clang/unittests/Tooling/CastExprTest.cpp | 20 + compiler-rt/lib/msan/msan_poisoning.cpp | 12 +- .../sanitizer_common/tests/sanitizer_mac_test.cpp | 18 +- flang/lib/Semantics/check-directive-structure.h | 15 +- flang/lib/Semantics/check-omp-structure.cpp | 9 +- flang/test/Semantics/omp-parallell01.f90 | 3 +- libc/config/linux/aarch64/entrypoints.txt | 2 + libc/config/linux/x86_64/entrypoints.txt | 2 + libc/spec/gnu_ext.td | 19 +- libc/spec/posix.td | 15 + libc/src/ctype/CMakeLists.txt | 16 + libc/src/ctype/isascii.cpp | 17 + libc/src/ctype/isascii.h | 18 + libc/src/ctype/toascii.cpp | 17 + libc/src/ctype/toascii.h | 18 + libc/test/src/ctype/CMakeLists.txt | 20 + libc/test/src/ctype/isascii_test.cpp | 23 + libc/test/src/ctype/toascii_test.cpp | 24 + libc/test/src/math/LdExpTest.h | 4 +- libcxx/docs/Cxx2bStatusPaperStatus.csv | 2 +- libcxx/docs/DesignDocs/VisibilityMacros.rst | 6 - libcxx/docs/FeatureTestMacroTable.rst | 2 +- libcxx/include/CMakeLists.txt | 1 + libcxx/include/__config | 17 +- libcxx/include/__locale | 2 + libcxx/include/algorithm | 7 +- libcxx/include/support/openbsd/xlocale.h | 19 + libcxx/include/type_traits | 22 + libcxx/include/version | 2 +- libcxx/src/chrono.cpp | 5 +- .../type_traits.version.pass.cpp | 16 +- .../version.version.pass.cpp | 16 +- .../meta.unary.prop/is_scoped_enum.pass.cpp | 120 + .../time/time.clock/time.clock.steady/now.pass.cpp | 2 + .../generate_feature_test_macro_components.py | 1 - lld/COFF/Chunks.cpp | 113 +- lld/COFF/Chunks.h | 10 + lld/COFF/PDB.cpp | 643 ++- lld/ELF/OutputSections.h | 6 - lld/ELF/SyntheticSections.cpp | 7 + lld/README.md | 2 +- lld/test/ELF/debug-gnu-pubnames.s | 18 - lld/test/ELF/gdb-index.s | 15 +- .../tools/debugserver/source/MacOSX/MachProcess.mm | 139 +- lldb/tools/debugserver/source/MacOSX/MachTask.mm | 11 +- lldb/tools/debugserver/source/RNBRemote.cpp | 19 +- lldb/tools/debugserver/source/debugserver.cpp | 46 +- llvm/CMakeLists.txt | 7 - llvm/docs/LangRef.rst | 3 +- llvm/include/llvm/Analysis/InlineAdvisor.h | 19 + llvm/include/llvm/Analysis/ReplayInlineAdvisor.h | 3 +- .../llvm/CodeGen/GlobalISel/MIPatternMatch.h | 6 + llvm/include/llvm/CodeGen/ISDOpcodes.h | 9 +- llvm/include/llvm/CodeGen/LiveIntervals.h | 5 +- llvm/include/llvm/CodeGen/MIRYamlMapping.h | 2 +- llvm/include/llvm/CodeGen/SelectionDAG.h | 6 +- llvm/include/llvm/CodeGen/SlotIndexes.h | 45 +- llvm/include/llvm/CodeGen/TargetFrameLowering.h | 2 +- llvm/include/llvm/CodeGen/TargetInstrInfo.h | 7 +- .../PDB/Native/DbiModuleDescriptorBuilder.h | 63 +- llvm/include/llvm/ExecutionEngine/Orc/Core.h | 3 + llvm/include/llvm/Frontend/OpenACC/ACC.td | 4 +- llvm/include/llvm/IR/FixedPointBuilder.h | 59 + llvm/include/llvm/IR/Function.h | 4 + llvm/include/llvm/IR/IntrinsicsRISCV.td | 2 +- llvm/include/llvm/Support/Allocator.h | 25 +- llvm/include/llvm/Support/Compiler.h | 16 +- llvm/lib/Analysis/InlineAdvisor.cpp | 60 +- llvm/lib/Analysis/InstructionSimplify.cpp | 24 +- llvm/lib/Analysis/ReplayInlineAdvisor.cpp | 41 +- llvm/lib/CodeGen/InlineSpiller.cpp | 27 +- .../CodeGen/LiveDebugValues/VarLocBasedImpl.cpp | 5 +- llvm/lib/CodeGen/MIRParser/MILexer.cpp | 1 + llvm/lib/CodeGen/MIRParser/MILexer.h | 1 + llvm/lib/CodeGen/MIRParser/MIParser.cpp | 8 +- llvm/lib/CodeGen/MachineBasicBlock.cpp | 2 +- llvm/lib/CodeGen/MachineOperand.cpp | 6 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 91 +- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 19 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 6 +- .../PDB/Native/DbiModuleDescriptorBuilder.cpp | 81 +- llvm/lib/DebugInfo/PDB/Native/DbiStreamBuilder.cpp | 10 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 5 +- llvm/lib/ObjectYAML/ELFEmitter.cpp | 5 +- llvm/lib/Passes/PassBuilder.cpp | 2 +- llvm/lib/TableGen/TGParser.cpp | 19 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 12 +- llvm/lib/Target/AArch64/AArch64FrameLowering.h | 4 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 2 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 20 +- llvm/lib/Target/AArch64/AArch64MCInstLower.cpp | 6 + llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 6 +- llvm/lib/Target/AMDGPU/AMDGPUInline.cpp | 23 - .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 18 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 18 +- llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 34 +- llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 2 +- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 22 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 2 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 8 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 104 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 122 +- llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 6 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 8 +- llvm/lib/Target/AMDGPU/SISchedule.td | 2 +- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 6 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 533 +- llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 66 +- .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp | 94 +- .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.h | 85 +- llvm/lib/Target/PowerPC/PPC.td | 11 + llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 4 +- llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 1 + llvm/lib/Target/PowerPC/PPCSubtarget.h | 2 + llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 4 +- llvm/lib/Target/RISCV/RISCVInstrInfoB.td | 18 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 14 +- .../Target/WebAssembly/WebAssemblyCFGStackify.cpp | 76 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 202 +- llvm/lib/Target/X86/X86ISelLowering.h | 1 + llvm/lib/Transforms/Coroutines/CoroFrame.cpp | 16 +- llvm/lib/Transforms/IPO/FunctionAttrs.cpp | 18 + llvm/lib/Transforms/IPO/SampleProfile.cpp | 2 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 8 + .../Transforms/InstCombine/InstCombineCalls.cpp | 4 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 18 +- llvm/lib/Transforms/Utils/LoopVersioning.cpp | 2 +- .../Utils/UniqueInternalLinkageNames.cpp | 1 + .../Vectorize/LoopVectorizationLegality.cpp | 20 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 79 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 65 +- llvm/runtimes/CMakeLists.txt | 939 ++-- .../CodeGen/AArch64/GlobalISel/inline-memcpy.mir | 4 +- .../GlobalISel/legalize-non-pow2-load-store.mir | 4 +- llvm/test/CodeGen/AArch64/arm64-windows-calls.ll | 77 + llvm/test/CodeGen/AArch64/cfguard-checks.ll | 14 +- .../CodeGen/AArch64/debug-info-sve-dbg-declare.mir | 16 +- .../CodeGen/AArch64/debug-info-sve-dbg-value.mir | 8 +- llvm/test/CodeGen/AArch64/dllimport.ll | 12 +- .../AArch64/framelayout-sve-basepointer.mir | 2 +- .../AArch64/framelayout-sve-calleesaves-fix.mir | 2 +- .../AArch64/framelayout-sve-scavengingslot.mir | 2 +- llvm/test/CodeGen/AArch64/framelayout-sve.mir | 68 +- llvm/test/CodeGen/AArch64/live-debugvalues-sve.mir | 2 +- llvm/test/CodeGen/AArch64/mingw-refptr.ll | 14 +- llvm/test/CodeGen/AArch64/spillfill-sve.mir | 10 +- .../test/CodeGen/AArch64/stack-protector-target.ll | 2 +- llvm/test/CodeGen/AArch64/sve-alloca-stackid.ll | 4 +- .../AArch64/sve-calling-convention-byref.ll | 12 +- .../CodeGen/AArch64/sve-intrinsics-loads-nf.ll | 229 +- llvm/test/CodeGen/AArch64/sve-localstackalloc.mir | 2 +- ...pred-contiguous-ldst-addressing-mode-reg-imm.ll | 227 +- ...ed-non-temporal-ldst-addressing-mode-reg-imm.ll | 74 +- llvm/test/CodeGen/AArch64/win-tls.ll | 6 +- llvm/test/CodeGen/AArch64/win_cst_pool.ll | 4 +- llvm/test/CodeGen/AArch64/windows-extern-weak.ll | 2 +- .../AMDGPU/GlobalISel/inst-select-add.s16.mir | 8 +- .../GlobalISel/inst-select-amdgcn.fmad.ftz.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.mir | 32 +- .../GlobalISel/inst-select-amdgcn.fmed3.s16.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir | 6 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir | 60 +- .../AMDGPU/GlobalISel/inst-select-ashr.s16.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-bswap.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-fadd.s64.mir | 22 +- .../GlobalISel/inst-select-fcanonicalize.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-fma.s32.mir | 24 +- .../AMDGPU/GlobalISel/inst-select-fmad.s32.mir | 40 +- .../AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-fmaxnum.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-fminnum.mir | 12 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir | 6 +- .../AMDGPU/GlobalISel/inst-select-fract.f64.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir | 60 +- .../AMDGPU/GlobalISel/inst-select-lshr.s16.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-mul.mir | 12 +- .../AMDGPU/GlobalISel/inst-select-pattern-add3.mir | 8 +- .../GlobalISel/inst-select-pattern-and-or.mir | 16 +- .../AMDGPU/GlobalISel/inst-select-pattern-or3.mir | 8 +- .../GlobalISel/inst-select-pattern-smed3.mir | 4 +- .../GlobalISel/inst-select-pattern-smed3.s16.mir | 4 +- .../GlobalISel/inst-select-pattern-umed3.mir | 4 +- .../GlobalISel/inst-select-pattern-umed3.s16.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-pattern-xor3.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-sext-inreg.mir | 20 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir | 8 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir | 60 +- .../AMDGPU/GlobalISel/inst-select-shl.s16.mir | 4 +- .../inst-select-shuffle-vector.v2s16.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-smulh.mir | 24 +- .../AMDGPU/GlobalISel/inst-select-umulh.mir | 24 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir | 4 +- .../GlobalISel/legalize-extract-vector-elt.mir | 252 +- .../GlobalISel/legalize-insert-vector-elt.mir | 126 +- .../AMDGPU/GlobalISel/legalize-load-constant.mir | 5111 -------------------- .../AMDGPU/GlobalISel/legalize-load-flat.mir | 4359 ----------------- .../GlobalISel/llvm.amdgcn.raw.buffer.load.ll | 4 +- .../GlobalISel/llvm.amdgcn.struct.buffer.load.ll | 8 +- .../regbankselect-amdgcn.s.buffer.load.ll | 48 +- .../AMDGPU/GlobalISel/regbankselect-load.mir | 36 +- llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir | 430 +- llvm/test/CodeGen/AMDGPU/amdgpu-inline.ll | 4 +- .../CodeGen/AMDGPU/clamp-omod-special-case.mir | 12 +- ...coalescer-subranges-another-copymi-not-live.mir | 2 +- .../coalescer-subranges-another-prune-error.mir | 2 +- .../AMDGPU/coalescer-subregjoin-fullcopy.mir | 10 +- .../coalescer-with-subregs-bad-identical.mir | 16 +- .../CodeGen/AMDGPU/constant-fold-imm-immreg.mir | 10 +- .../CodeGen/AMDGPU/couldnt-join-subrange-3.mir | 16 +- .../CodeGen/AMDGPU/debug-value-scheduler-crash.mir | 12 +- llvm/test/CodeGen/AMDGPU/fdiv-nofpexcept.ll | 36 +- .../CodeGen/AMDGPU/fold-immediate-output-mods.mir | 16 +- llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir | 2 +- llvm/test/CodeGen/AMDGPU/fold_16bit_imm.mir | 2 +- llvm/test/CodeGen/AMDGPU/hazard-pass-ordering.mir | 2 +- llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir | 10 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll | 4 + llvm/test/CodeGen/AMDGPU/mai-hazards.mir | 166 +- .../AMDGPU/memory-legalizer-atomic-insert-end.mir | 2 +- llvm/test/CodeGen/AMDGPU/memory_clause.ll | 278 ++ llvm/test/CodeGen/AMDGPU/merge-load-store-vreg.mir | 4 +- .../AMDGPU/pei-build-spill-partial-agpr.mir | 176 +- llvm/test/CodeGen/AMDGPU/pei-build-spill.mir | 1848 +++---- .../CodeGen/AMDGPU/power-sched-no-instr-sunit.mir | 4 +- .../AMDGPU/promote-constOffset-to-imm-gfx10.mir | 8 +- .../CodeGen/AMDGPU/promote-constOffset-to-imm.mir | 8 +- llvm/test/CodeGen/AMDGPU/r600-legalize-umax-bug.ll | 23 +- llvm/test/CodeGen/AMDGPU/regbank-reassign.mir | 8 +- .../CodeGen/AMDGPU/regcoal-subrange-join-seg.mir | 4 +- llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir | 2 +- ...coalescing-remove-partial-redundancy-assert.mir | 6 +- .../CodeGen/AMDGPU/rename-independent-subregs.mir | 2 +- .../CodeGen/AMDGPU/s_add_co_pseudo_lowering.mir | 14 +- .../sched-assert-onlydbg-value-empty-region.mir | 6 +- llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir | 34 +- ...d-handleMoveUp-subreg-def-across-subreg-def.mir | 12 +- llvm/test/CodeGen/AMDGPU/sched-prefer-non-mfma.mir | 4 +- llvm/test/CodeGen/AMDGPU/schedule-barrier.mir | 8 +- .../CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir | 24 +- llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir | 26 +- llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir | 2 +- llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir | 8 +- llvm/test/CodeGen/AMDGPU/setcc.ll | 16 +- llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir | 12 +- .../CodeGen/AMDGPU/smem-no-clause-coalesced.mir | 4 +- .../CodeGen/AMDGPU/spill-agpr-partially-undef.mir | 12 +- llvm/test/CodeGen/AMDGPU/spill-agpr.mir | 316 +- .../AMDGPU/stale-livevar-in-twoaddr-pass.mir | 2 +- .../CodeGen/AMDGPU/subreg-split-live-in-error.mir | 18 +- llvm/test/CodeGen/AMDGPU/twoaddr-mad.mir | 2 +- llvm/test/CodeGen/AMDGPU/v_swap_b32.mir | 4 +- llvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir | 24 +- llvm/test/CodeGen/AMDGPU/waitcnt.mir | 8 +- .../MIR/X86/expected-align-in-memory-operand.mir | 4 +- ...ted-alignment-after-align-in-memory-operand.mir | 4 +- .../expected-positive-alignment-after-align.mir | 4 +- llvm/test/CodeGen/MIR/X86/memory-operands.mir | 36 +- .../store_split_because_of_memsize_or_align.mir | 28 +- .../CodeGen/Mips/GlobalISel/regbankselect/load.mir | 2 +- .../regbankselect/long_ambiguous_chain_s32.mir | 18 +- .../regbankselect/long_ambiguous_chain_s64.mir | 18 +- .../Mips/GlobalISel/regbankselect/store.mir | 2 +- llvm/test/CodeGen/PowerPC/aix-cc-abi.ll | 52 +- llvm/test/CodeGen/PowerPC/spe.ll | 2043 +++++--- llvm/test/CodeGen/PowerPC/vsx.ll | 40 +- llvm/test/CodeGen/RISCV/double-br-fcmp.ll | 53 +- llvm/test/CodeGen/RISCV/double-fcmp.ll | 48 +- llvm/test/CodeGen/RISCV/double-select-fcmp.ll | 51 +- llvm/test/CodeGen/RISCV/float-br-fcmp.ll | 51 +- llvm/test/CodeGen/RISCV/float-fcmp.ll | 46 +- llvm/test/CodeGen/RISCV/float-select-fcmp.ll | 43 +- llvm/test/CodeGen/RISCV/half-br-fcmp.ll | 43 +- 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llvm/utils/gn/secondary/libcxx/include/BUILD.gn | 104 +- mlir/docs/ConversionToLLVMDialect.md | 4 +- mlir/docs/Dialects/LLVM.md | 176 +- mlir/docs/SPIRVToLLVMDialectConversion.md | 18 +- mlir/include/mlir-c/AffineExpr.h | 2 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td | 8 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 10 +- mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h | 49 +- .../Linalg/IR/LinalgStructuredOpsInterface.td | 12 + .../mlir/Dialect/Linalg/Transforms/Transforms.h | 14 +- mlir/include/mlir/Dialect/Linalg/Utils/Utils.h | 31 +- mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt | 6 +- mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td | 14 +- .../mlir/Dialect/SPIRV/IR/SPIRVBarrierOps.td | 141 + .../SPIRV/IR/{SPIRVOps.td => SPIRVMemoryOps.td} | 248 +- mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMiscOps.td | 61 + mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.td | 494 +- .../mlir/Dialect/SPIRV/IR/SPIRVStructureOps.td | 50 + .../LLVMIR/CPU/test-vector-reductions-fp.mlir | 32 +- .../LLVMIR/CPU/test-vector-reductions-int.mlir | 30 +- mlir/lib/Bindings/Python/IRModules.cpp | 18 + mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp | 4 +- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 19 +- .../VectorToLLVM/ConvertVectorToLLVM.cpp | 7 +- .../lib/Conversion/VectorToROCDL/VectorToROCDL.cpp | 16 +- mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 54 +- mlir/lib/Dialect/LLVMIR/IR/LLVMTypeSyntax.cpp | 14 +- mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp | 143 +- mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp | 2 +- mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp | 4 +- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 161 +- .../Dialect/Linalg/Transforms/FusionOnTensors.cpp | 24 +- mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp | 5 +- mlir/lib/IR/FunctionImplementation.cpp | 19 +- mlir/lib/Target/CMakeLists.txt | 51 +- mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp | 14 +- mlir/lib/Target/LLVMIR/ModuleTranslation.cpp | 8 +- mlir/lib/Target/LLVMIR/TypeTranslation.cpp | 15 +- mlir/lib/Target/SPIRV/CMakeLists.txt | 28 + .../Target/SPIRV/Deserialization/CMakeLists.txt | 17 + .../SPIRV/Deserialization/Deserialization.cpp | 23 + .../SPIRV/Deserialization/DeserializeOps.cpp | 565 +++ .../Deserializer.cpp} | 1303 +---- .../Target/SPIRV/Deserialization/Deserializer.h | 613 +++ mlir/lib/Target/SPIRV/Serialization/CMakeLists.txt | 15 + .../SPIRV/{ => Serialization}/Serialization.cpp | 0 mlir/test/Bindings/Python/ir_affine_map.py | 6 + mlir/test/CMakeLists.txt | 1 + .../Conversion/ArmNeonToLLVM/convert-to-llvm.mlir | 6 +- .../SPIRVToLLVM/arithmetic-ops-to-llvm.mlir | 26 +- .../SPIRVToLLVM/bitwise-ops-to-llvm.mlir | 94 +- .../Conversion/SPIRVToLLVM/cast-ops-to-llvm.mlir | 28 +- .../SPIRVToLLVM/comparison-ops-to-llvm.mlir | 44 +- .../SPIRVToLLVM/constant-op-to-llvm.mlir | 12 +- .../Conversion/SPIRVToLLVM/func-ops-to-llvm.mlir | 8 +- .../Conversion/SPIRVToLLVM/glsl-ops-to-llvm.mlir | 24 +- .../SPIRVToLLVM/logical-ops-to-llvm.mlir | 12 +- .../Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir | 8 +- .../Conversion/SPIRVToLLVM/misc-ops-to-llvm.mlir | 10 +- .../Conversion/SPIRVToLLVM/shift-ops-to-llvm.mlir | 36 +- .../SPIRVToLLVM/spirv-types-to-llvm.mlir | 6 +- .../StandardToLLVM/convert-to-llvmir.mlir | 140 +- .../StandardToLLVM/standard-to-llvm.mlir | 20 +- .../VectorToLLVM/vector-mask-to-llvm.mlir | 40 +- .../VectorToLLVM/vector-reduction-to-llvm.mlir | 16 +- .../Conversion/VectorToLLVM/vector-to-llvm.mlir | 726 +-- .../Conversion/VectorToROCDL/vector-to-rocdl.mlir | 8 +- mlir/test/Dialect/LLVMIR/dialect-cast.mlir | 17 +- mlir/test/Dialect/LLVMIR/invalid.mlir | 62 +- mlir/test/Dialect/LLVMIR/nvvm.mlir | 8 +- mlir/test/Dialect/LLVMIR/rocdl.mlir | 164 +- mlir/test/Dialect/LLVMIR/roundtrip.mlir | 36 +- mlir/test/Dialect/LLVMIR/types-invalid.mlir | 12 +- mlir/test/Dialect/LLVMIR/types.mlir | 8 +- mlir/test/Dialect/SPIRV/IR/barrier-ops.mlir | 49 + mlir/test/Dialect/SPIRV/IR/bit-ops.mlir | 130 + mlir/test/Dialect/SPIRV/IR/cast-ops.mlir | 262 + mlir/test/Dialect/SPIRV/IR/group-ops.mlir | 13 +- mlir/test/Dialect/SPIRV/IR/logical-ops.mlir | 211 + mlir/test/Dialect/SPIRV/IR/memory-ops.mlir | 629 +++ mlir/test/Dialect/SPIRV/IR/misc-ops.mlir | 29 + mlir/test/Dialect/SPIRV/IR/ops.mlir | 1355 ------ mlir/test/Dialect/SPIRV/IR/structure-ops.mlir | 35 + mlir/test/Dialect/Tosa/inlining.mlir | 8 +- mlir/test/IR/core-ops.mlir | 3 - mlir/test/IR/invalid-func-op.mlir | 16 + .../SPIRV/{barrier.mlir => barrier-ops.mlir} | 0 mlir/test/Target/arm-neon.mlir | 22 +- mlir/test/Target/arm-sve.mlir | 56 +- mlir/test/Target/avx512.mlir | 20 +- mlir/test/Target/import.ll | 6 +- mlir/test/Target/llvmir-intrinsics.mlir | 172 +- mlir/test/Target/llvmir-types.mlir | 10 +- mlir/test/Target/llvmir.mlir | 84 +- mlir/test/Target/nvvmir.mlir | 6 +- mlir/test/Target/rocdl.mlir | 110 +- .../lib/Transforms/TestLinalgFusionTransforms.cpp | 14 +- .../mlir-linalg-ods-gen/test-linalg-ods-gen.tc | 22 + .../{openmp-common.td => directive-common.td} | 7 +- .../mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp | 181 +- mlir/tools/mlir-tblgen/CMakeLists.txt | 2 +- ...{OpenMPCommonGen.cpp => DirectiveCommonGen.cpp} | 32 +- mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp | 13 +- openmp/CMakeLists.txt | 12 +- openmp/libomptarget/CMakeLists.txt | 4 +- openmp/libomptarget/plugins/amdgpu/CMakeLists.txt | 6 +- openmp/libomptarget/plugins/amdgpu/src/rtl.cpp | 2 +- .../plugins/common/MemoryManager/MemoryManager.h | 5 + openmp/libomptarget/src/CMakeLists.txt | 2 +- openmp/runtime/src/include/omp.h.var | 7 +- openmp/runtime/src/include/omp_lib.f90.var | 7 +- openmp/runtime/src/include/omp_lib.h.var | 10 +- openmp/runtime/src/kmp.h | 7 +- openmp/runtime/src/kmp_alloc.cpp | 51 +- runtimes/CMakeLists.txt | 200 + {llvm/runtimes => runtimes}/Components.cmake.in | 0 607 files changed, 28481 insertions(+), 25132 deletions(-) create mode 100644 clang/test/Driver/fcs-profile-generate.c create mode 100644 clang/test/Frontend/fixed_point_conversions_half.c create mode 100644 libc/src/ctype/isascii.cpp create mode 100644 libc/src/ctype/isascii.h create mode 100644 libc/src/ctype/toascii.cpp create mode 100644 libc/src/ctype/toascii.h create mode 100644 libc/test/src/ctype/isascii_test.cpp create mode 100644 libc/test/src/ctype/toascii_test.cpp create mode 100644 libcxx/include/support/openbsd/xlocale.h create mode 100644 libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_sc [...] delete mode 100644 lld/test/ELF/debug-gnu-pubnames.s create mode 100644 llvm/test/TableGen/spurious-semi.td create mode 100644 llvm/test/Transforms/Coroutines/coro-spill-promise.ll create mode 100644 llvm/test/Transforms/FunctionAttrs/willreturn.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-amx-load-store.ll create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/pipeline.ll copy clang-tools-extra/clangd/test/Inputs/background-index/sub_dir/compile_flags.t [...] create mode 100644 mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBarrierOps.td copy mlir/include/mlir/Dialect/SPIRV/IR/{SPIRVOps.td => SPIRVMemoryOps.td} (53%) create mode 100644 mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMiscOps.td create mode 100644 mlir/lib/Target/SPIRV/CMakeLists.txt create mode 100644 mlir/lib/Target/SPIRV/Deserialization/CMakeLists.txt create mode 100644 mlir/lib/Target/SPIRV/Deserialization/Deserialization.cpp create mode 100644 mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp rename mlir/lib/Target/SPIRV/{Deserialization.cpp => Deserialization/Deserializer. [...] create mode 100644 mlir/lib/Target/SPIRV/Deserialization/Deserializer.h create mode 100644 mlir/lib/Target/SPIRV/Serialization/CMakeLists.txt rename mlir/lib/Target/SPIRV/{ => Serialization}/Serialization.cpp (100%) create mode 100644 mlir/test/Dialect/SPIRV/IR/barrier-ops.mlir create mode 100644 mlir/test/Dialect/SPIRV/IR/cast-ops.mlir create mode 100644 mlir/test/Dialect/SPIRV/IR/memory-ops.mlir create mode 100644 mlir/test/Dialect/SPIRV/IR/misc-ops.mlir delete mode 100644 mlir/test/Dialect/SPIRV/IR/ops.mlir rename mlir/test/Target/SPIRV/{barrier.mlir => barrier-ops.mlir} (100%) rename mlir/test/mlir-tblgen/{openmp-common.td => directive-common.td} (83%) rename mlir/tools/mlir-tblgen/{OpenMPCommonGen.cpp => DirectiveCommonGen.cpp} (72%) create mode 100644 runtimes/CMakeLists.txt rename {llvm/runtimes => runtimes}/Components.cmake.in (100%)