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from a3d9e32efb0 [RISCV] Fix ICE in isDesirableToCommuteWithShift new 3b296991561 [AMDGPU] Created a sub-register class for the return addres [...]

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Summary of changes: lib/Target/AMDGPU/SIISelLowering.cpp | 15 ++--- lib/Target/AMDGPU/SIRegisterInfo.td | 6 ++ lib/Target/AMDGPU/SOPInstructions.td | 6 +- test/CodeGen/AMDGPU/call-graph-register-usage.ll | 22 ++++---- test/CodeGen/AMDGPU/call-preserved-registers.ll | 10 ++-- test/CodeGen/AMDGPU/callee-frame-setup.ll | 55 +++++++++++-------- test/CodeGen/AMDGPU/callee-special-input-sgprs.ll | 5 +- test/CodeGen/AMDGPU/chain-hi-to-lo.ll | 4 +- .../AMDGPU/cross-block-use-is-not-abi-copy.ll | 64 ++++++++++------------ test/CodeGen/AMDGPU/llvm.log.f16.ll | 10 ++-- test/CodeGen/AMDGPU/llvm.log10.f16.ll | 10 ++-- test/CodeGen/AMDGPU/load-lo16.ll | 8 +-- test/CodeGen/AMDGPU/nested-calls.ll | 10 ++-- test/CodeGen/AMDGPU/wave32.ll | 8 +-- 14 files changed, 119 insertions(+), 114 deletions(-)