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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig in repository toolchain/ci/llvm-project.

from 8427885e278 Temporairly revert "Thread safety analysis: Consider global [...] adds 3a577f54461 Rename MemRefDescriptor::getElementType() to MemRefDescript [...] adds 43af2a6faa2 [AMDGPU] Workaround for LDS Misalignment bug on GFX10 adds 8cb8cea1bd7 [ARM] Fixup of a few test cases. NFC. adds 3a61bfb027a [DomTree] Use SmallVector<DomTreeNodeBase *, 4> instead of [...] adds b5bc56da8aa [NFC][Asan] Fit ChunkHeader into redzone adds 24ecfdac7b7 [APFloat] Fix uninitialized variable in IEEEFloat constructors adds f16b2d83154 ARMTargetParser.cpp - use auto const references in for rang [...] adds 455cce3e216 TrigramIndex.cpp - remove unnecessary includes. NFCI. adds 25ce1e04972 [ValueTracking] Add UndefOrPoison/Poison-only version of re [...] adds 0fd425af071 [flang]Add Semantic Checks for OpenMP Allocate Clause adds 36c8621638d [BuildLibCalls] Add more noundef to library functions adds 48fc7814387 [UnifyFunctionExitNodes] Fix Modified status for unreachabl [...] adds edf244217a4 [mlir][Linalg] Integration tests for convolutions added. adds d4b88ac1658 [cmake] Use absolute paths for modules search adds 25f3cc0ced1 [elf2yaml] Fix dumping a debug section whose name is not re [...] adds 1eaf7babf2d APInt.h - return directly from clearUnusedBits in single wo [...] adds d816499f95d [KnownBits] Move SelectionDAG::computeKnownBits ISD::ABS ha [...] adds f078577f31c Revert "[AMDGPU] Support disassembly for AMDGPU kernel desc [...] adds b29bdab8c76 CommandLine.h - use auto const reference in ValuesClass::ap [...] adds 4358fa782e3 [Statepoints] Update DAG root after emitting statepoint. adds 818cf30b833 [MachinePipeliner] Fix II_setByPragma initialization adds 95b7040e438 [AMDGPU][MC] Improved diagnostic messages for invalid registers adds 5ec043eae18 [FLANG] Generate error for invalid selector. adds 649bde488ce [AMDGPU] Simplify S_SETREG_B32 case in EmitInstrWithCustomInserter adds 88ff4d2ca1a [PowerPC] Fix STRICT_FRINT/STRICT_FNEARBYINT lowering adds e706116e118 X86FrameLowering::adjustStackWithPops - cleanup auto usage. NFCI. adds 53ffeea6d59 [mlir][Linalg] Reduction dimensions specified in TC definit [...] adds 27cd187587e [DSE] Add testcase that uses masked loads and stores adds 6e45b989340 X86CallFrameOptimization.cpp - use const references where p [...] adds ae209397b17 [OpenMP] Begin Printing Information Dumps In Libomptarget a [...] adds e59d829971e [libc][obvious] Fix strtok_r signature in the spec. adds 4b15fc9ddb4 [NFC][MLInliner] Don't initialize in an assert. adds fc4bff0cd37 Update atomic feature macros, synopsis, signatures to match [...] adds 1a25133bcdf [DAGCombine] Skip re-visiting EntryToken to avoid compile t [...] adds ba5b1371ecc [libc][NFC] Add spec files as dependencies of integration test. adds 447ba60a224 [lldb/Docs] Correct LLDB_ENABLE_TESTS to LLDB_INCLUDE_TESTS adds 1301febe714 [libc++] Fix variant benchmark build for some configurations. adds a2cb5448014 Revert "[Attributor] Re-enable a run line in noalias.ll" adds 81ff2d30a90 [DSE] Handle masked stores adds 55dd731b291 [debugserver] Extract function for default launch flavor adds db7defd9bab [DSE] Explicitly not use MSSA in testcase for now adds 08196e0b2e1 Implements [[likely]] and [[unlikely]] in IfStmt. adds 5a4a0cfcfb5 [NFC] Separate bitcode reading for FUNC_CODE_INST_CMPXCHG(_OLD) adds 11352fa83bc Revert a test using padding bits in atomics adds dbac20bb6bf [gcov] Don't split entry block; add a synthetic entry block [...] adds 1dd4c4e0a8e [InstCombine] add tests for add/sub-of-shl; NFC adds 0ee54cf8832 [Hexagon] Account for truncating pairs to non-pairs when wi [...] adds ad61e346d30 [gcov] Give the __llvm_gcov_ctr load instruction a name for [...] adds 415a4fbea7c [MC] Resolve the difference of symbols in consecutive MCDat [...] adds 72e2fbde545 [AMDGPU] Correct gfx1031 XNACK setting documentation adds 0ab6a156980 [X86] Add support for using fast short rep mov for memcpy l [...] adds be35264ab5a Wordsmith RegionBranchOpInterface verification errors adds fb542b0b8c2 [libc][MPFRWrapper] Provide a way to include MPFR header in [...] adds cc76da7adab [GlobalISel] Rewrite the elide-br-by-swapping-icmp-ops comb [...] adds 467a0712853 [GlobalISel][IRTranslator] Generate better conditional bran [...] adds 91656fcb57e [X86] Add tests for minnum/maxnum with constant NaN (NFC) adds e5784ef8f6c [GlobalISel] Enable usage of BranchProbabilityInfo in IRTra [...] adds a9f79707624 Add REQUIRES: asserts to a test that uses an asserts only flag. adds 2955a27abc2 [lldb] Pass the arch as part of the triple in the ARCH_CFLAGS adds 5a4a05c8116 [ARM] Add additional fmin/fmax with nan tests (NFC) adds 0a5dc7effb1 [DAGCombiner] Fold fmin/fmax of NaN adds 9969c317ff0 [DSE,MemorySSA] Handle atomic stores explicitly in isReadClobber. adds 480e7f43a22 [AArch64][GlobalISel] Share address mode selection code for memops adds 8b7c8f2c549 Mark masked.{store,scatter,compressstore} intrinsics as write-only adds c259d3a061c [AMDGPU] Fix for folding v2.16 literals. adds 09d492902f1 [libunwind] Bare-metal DWARF: set dso_base to 0 adds a6183d0f028 [ValueTracking] isKnownNonZero, computeKnownBits for freeze adds 91c28bbe74f [Asan] Return nullptr for invalid chunks adds 82cbc9330a4 AMDGPU: Fix inserting waitcnts before kill uses adds 85490874b23 AMDGPU: Skip all meta instructions in hazard recognizer adds e15215e0415 AMDGPU: Hoist check for VGPRs adds f559bf31adb [gcov] Delete unused llvm_gcda_increment_indirect_counter adds b897729a39d [llvm-install-name-tool] Add -V flag adds 01cdab0b335 [gcov] Delete flush_fn_list (unused since D83149) adds 3e4e0fb2435 mlir/Transforms/BufferPlacement.h: Add missing override adds 52f0837778b [NFC] Move definition of variable now only used in debug builds adds c4d7536136b [CMake] Simplify CMake handling for libxml2 adds f7941d98091 [lit] Use correct variable name for libxml2 adds 6afb2791004 [PowerPC] [FPEnv] Disable strict FP mutation by default adds a7b2977aa61 [mlir][Linalg] Add Utility method to get loop ranges for a [...] adds 060c8e083dd libclc/spirv: Add various functions adds c413a8a8ecd [LoopLoadElim] Filter away candidates that stop being AddRe [...] adds cde8fc65aee [NFC] Rename variables to avoid name confusion adds 39c1653b3db [JumpThreading] Conditionally freeze its condition when unf [...] adds fea175b59fb [mlir][Linalg] Small refactoring of ConvOpVectorization adds 157cd93b48a [clang] Disallow fbasic-block-sections on non-ELF, non-x86 [...] adds 1919b650523 [ARM] Tail predicate VQDMULH and VQRDMULH adds 0bdf8c91272 [SCEV] Constant expansion cost at minsize adds 3c42c0dcf63 [mlir] [VectorOps] Enable 32-bit index optimizations adds 8060283ff8b [llvm-readobj] [ARMWinEH] Print set_fp/add_fp differently i [...] adds 6313f556194 [llvm-readobj] [ARMWinEH] Fix printing of exception handler [...] adds b81c57d646e [ARM][LowOverheadLoops] Allow tail predication on predicate [...] adds f51e55e09ee [compiler-rt] [netbsd] Reintroduce __sanitizer_protoent

No new revisions were added by this update.

Summary of changes: clang/include/clang/AST/Stmt.h | 22 + clang/include/clang/Basic/Attr.td | 12 + clang/include/clang/Basic/AttrDocs.td | 95 +++++ clang/include/clang/Basic/DiagnosticSemaKinds.td | 3 + clang/lib/AST/Stmt.cpp | 50 ++- clang/lib/CodeGen/CGBuiltin.cpp | 4 +- clang/lib/CodeGen/CGStmt.cpp | 31 +- clang/lib/CodeGen/CodeGenFunction.cpp | 42 +- clang/lib/CodeGen/CodeGenFunction.h | 3 +- clang/lib/Driver/ToolChains/Clang.cpp | 19 +- clang/lib/Parse/ParseDeclCXX.cpp | 2 + clang/lib/Sema/SemaStmt.cpp | 12 + clang/lib/Sema/SemaStmtAttr.cpp | 48 +++ clang/test/CodeGen/builtins-ppc-fpconstrained.c | 8 +- clang/test/CodeGen/builtins-ppc-vsx.c | 8 +- .../attr-likelihood-if-branch-weights.cpp | 146 +++++++ clang/test/Driver/fbasic-block-sections.c | 17 +- clang/test/Preprocessor/has_attribute.cpp | 4 +- clang/test/Sema/attr-likelihood.c | 51 +++ clang/test/SemaCXX/attr-likelihood.cpp | 132 ++++++ clang/www/cxx_status.html | 2 +- compiler-rt/lib/asan/asan_allocator.cpp | 61 +-- compiler-rt/lib/profile/GCDAProfiling.c | 31 -- .../sanitizer_platform_limits_netbsd.h | 6 + flang/CMakeLists.txt | 10 +- flang/include/flang/Semantics/symbol.h | 6 +- flang/lib/Semantics/check-omp-structure.cpp | 3 + flang/lib/Semantics/check-omp-structure.h | 1 + flang/lib/Semantics/resolve-directives.cpp | 74 +++- flang/lib/Semantics/resolve-names.cpp | 6 + flang/lib/Semantics/tools.cpp | 1 - flang/test/Semantics/omp-clause-validity01.f90 | 35 +- flang/test/Semantics/omp-resolve06.f90 | 54 +++ flang/test/Semantics/resolve95.f90 | 15 + libc/spec/posix.td | 4 +- libc/test/src/CMakeLists.txt | 4 +- libc/utils/MPFRWrapper/MPFRUtils.cpp | 12 +- libclc/spirv/lib/SOURCES | 6 + libclc/spirv64/lib/SOURCES | 6 + libcxx/benchmarks/CMakeLists.txt | 22 +- libcxx/docs/FeatureTestMacroTable.rst | 12 + libcxx/include/atomic | 193 +++------ libcxx/include/version | 24 ++ ..._and_set.pass.cpp => atomic_flag_test.pass.cpp} | 0 .../atomic_flag_test_explicit.pass.cpp | 111 +++++ .../atomics.lockfree/isalwayslockfree.pass.cpp | 5 + .../atomics.types.operations.req/atomic_helpers.h | 42 ++ libcxx/test/std/atomics/types.pass.cpp | 71 +++- .../support.limits.general/atomic.version.pass.cpp | 164 +++++++- .../concepts.version.pass.cpp | 61 ++- .../execution.version.pass.cpp | 70 +++- .../support.limits.general/memory.version.pass.cpp | 26 ++ .../version.version.pass.cpp | 156 +++++++ libcxx/test/support/cmpxchg_loop.h | 16 +- .../generate_feature_test_macro_components.py | 51 +++ libunwind/src/AddressSpace.hpp | 1 + libunwind/src/UnwindCursor.hpp | 6 +- lld/test/CMakeLists.txt | 2 +- lld/test/lit.cfg.py | 6 +- lld/test/lit.site.cfg.py.in | 2 +- lldb/docs/resources/build.rst | 4 +- .../Python/lldbsuite/test/builders/darwin.py | 4 +- lldb/tools/debugserver/source/debugserver.cpp | 88 ++-- llvm/cmake/config-ix.cmake | 40 +- llvm/cmake/modules/GetLibraryName.cmake | 17 + llvm/cmake/modules/LLVMConfig.cmake.in | 5 +- llvm/docs/AMDGPUUsage.rst | 4 +- llvm/include/llvm/ADT/APFloat.h | 5 +- llvm/include/llvm/ADT/APInt.h | 17 +- llvm/include/llvm/Analysis/ValueTracking.h | 24 +- llvm/include/llvm/Bitcode/LLVMBitCodes.h | 10 +- .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 7 +- .../include/llvm/CodeGen/GlobalISel/IRTranslator.h | 27 +- llvm/include/llvm/CodeGen/GlobalISel/Utils.h | 4 + llvm/include/llvm/Config/config.h.cmake | 2 +- llvm/include/llvm/IR/Intrinsics.td | 72 ++-- llvm/include/llvm/MC/MCFragment.h | 7 + llvm/include/llvm/Support/AMDHSAKernelDescriptor.h | 70 ++-- llvm/include/llvm/Support/ARMWinEH.h | 5 +- llvm/include/llvm/Support/CommandLine.h | 2 +- llvm/include/llvm/Support/GenericDomTree.h | 9 +- llvm/include/llvm/Support/KnownBits.h | 3 + llvm/include/llvm/Support/TrigramIndex.h | 2 +- llvm/include/llvm/Target/GlobalISel/Combine.td | 10 +- llvm/include/llvm/Transforms/Scalar.h | 8 +- .../include/llvm/Transforms/Scalar/JumpThreading.h | 3 +- .../llvm/Transforms/Scalar/LowerExpectIntrinsic.h | 3 + .../llvm/Transforms/Utils/UnifyFunctionExitNodes.h | 5 +- llvm/lib/Analysis/InlineSizeEstimatorAnalysis.cpp | 2 +- llvm/lib/Analysis/ScalarEvolution.cpp | 28 +- llvm/lib/Analysis/ValueTracking.cpp | 118 ++++-- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 106 +++-- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 44 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 337 +++++++++++++-- llvm/lib/CodeGen/GlobalISel/Utils.cpp | 12 + llvm/lib/CodeGen/MachinePipeliner.cpp | 1 + llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 30 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 16 +- .../CodeGen/SelectionDAG/StatepointLowering.cpp | 7 +- llvm/lib/MC/MCExpr.cpp | 83 ++-- llvm/lib/MC/MCSection.cpp | 1 + llvm/lib/Support/APFloat.cpp | 68 +-- llvm/lib/Support/ARMTargetParser.cpp | 20 +- llvm/lib/Support/CMakeLists.txt | 25 +- llvm/lib/Support/KnownBits.cpp | 18 + llvm/lib/Support/TrigramIndex.cpp | 5 - llvm/lib/Target/AArch64/AArch64Combine.td | 1 - llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 2 +- .../AArch64/GISel/AArch64InstructionSelector.cpp | 89 ++-- llvm/lib/Target/AMDGPU/AMDGPU.td | 3 +- llvm/lib/Target/AMDGPU/AMDGPUCombine.td | 3 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 113 +++-- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 345 --------------- .../AMDGPU/Disassembler/AMDGPUDisassembler.h | 30 +- llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 2 +- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 44 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 29 +- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 6 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 13 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 3 + llvm/lib/Target/ARM/ARMInstrMVE.td | 2 + llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 2 +- llvm/lib/Target/ARM/ARMTargetMachine.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonPatternsHVX.td | 6 + llvm/lib/Target/Mips/MipsTargetMachine.cpp | 2 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 12 +- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 2 +- llvm/lib/Target/PowerPC/PPCInstrVSX.td | 14 +- llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 2 +- llvm/lib/Target/X86/X86CallFrameOptimization.cpp | 10 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 6 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 2 +- llvm/lib/Target/X86/X86SelectionDAGInfo.cpp | 8 + llvm/lib/Target/X86/X86TargetMachine.cpp | 2 +- .../Transforms/Instrumentation/GCOVProfiling.cpp | 104 +++-- .../Transforms/Instrumentation/PoisonChecking.cpp | 2 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 58 ++- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 2 +- llvm/lib/Transforms/Scalar/JumpThreading.cpp | 29 +- llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp | 25 +- .../lib/Transforms/Scalar/LowerExpectIntrinsic.cpp | 5 +- llvm/lib/Transforms/Utils/BuildLibCalls.cpp | 33 ++ .../Transforms/Utils/ScalarEvolutionExpander.cpp | 76 ++-- .../Transforms/Utils/UnifyFunctionExitNodes.cpp | 65 +-- llvm/lib/WindowsManifest/CMakeLists.txt | 35 +- llvm/lib/WindowsManifest/WindowsManifestMerger.cpp | 6 +- llvm/test/Analysis/BasicAA/intrinsics.ll | 2 +- .../Analysis/TypeBasedAliasAnalysis/intrinsics.ll | 2 +- llvm/test/CMakeLists.txt | 2 +- .../GlobalISel/arm64-irtranslator-switch.ll | 6 +- llvm/test/CodeGen/AArch64/GlobalISel/const-0.ll | 25 -- .../GlobalISel/irtranslator-condbr-lower-tree.ll | 234 +++++++++++ .../GlobalISel/irtranslator-switch-bittest.ll | 16 +- .../AArch64/GlobalISel/prelegalizercombiner-br.mir | 14 +- .../CodeGen/AArch64/GlobalISel/select-constant.mir | 34 ++ .../CodeGen/AArch64/GlobalISel/select-store.mir | 20 + llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll | 2 - llvm/test/CodeGen/AArch64/wineh6.mir | 2 +- llvm/test/CodeGen/AArch64/wineh7.mir | 2 +- .../CodeGen/AMDGPU/GlobalISel/bool-legalization.ll | 6 +- .../AMDGPU/GlobalISel/divergent-control-flow.ll | 24 +- .../AMDGPU/GlobalISel/lds-misaligned-bug.ll | 128 ++++++ .../AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll | 8 +- .../AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll | 8 +- llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll | 6 +- llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll | 5 +- llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll | 5 +- llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll | 5 +- llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll | 5 +- .../AMDGPU/hazard-recognizer-meta-insts.mir | 41 ++ llvm/test/CodeGen/AMDGPU/lds-misaligned-bug.ll | 18 +- llvm/test/CodeGen/AMDGPU/nop-data.ll | 4 +- .../test/CodeGen/AMDGPU/shrink-add-sub-constant.ll | 4 +- .../CodeGen/AMDGPU/waitcnt-meta-instructions.mir | 66 +++ llvm/test/CodeGen/ARM/fminmax-folds.ll | 43 ++ .../Hexagon/autohvx/isel-widen-truncate-pair.ll | 16 + .../swp-pragma-initiation-interval-reset.ii | 85 ++++ .../GlobalISel/llvm-ir/long_ambiguous_chain_s32.ll | 256 +++++++----- .../GlobalISel/llvm-ir/long_ambiguous_chain_s64.ll | 256 +++++++----- llvm/test/CodeGen/PowerPC/fp-strict-round.ll | 172 +++++++- .../PowerPC/vector-constrained-fp-intrinsics.ll | 214 ++++++++-- .../predicated-liveout-unknown-lanes.ll | 44 ++ .../CodeGen/Thumb2/LowOverheadLoops/reductions.ll | 53 ++- .../CodeGen/Thumb2/LowOverheadLoops/remat-vctp.ll | 18 +- .../tail-pred-intrinsic-sub-sat.ll | 6 +- llvm/test/CodeGen/Thumb2/active_lane_mask.ll | 16 +- llvm/test/CodeGen/Thumb2/mve-pred-vctpvpsel.ll | 20 +- llvm/test/CodeGen/X86/GlobalISel/phi.ll | 28 +- llvm/test/CodeGen/X86/fmaxnum.ll | 8 + llvm/test/CodeGen/X86/fminnum.ll | 8 + llvm/test/CodeGen/X86/memcpy-inline-fsrm.ll | 31 ++ llvm/test/CodeGen/X86/statepoint-vreg.ll | 88 ++++ llvm/test/MC/AMDGPU/expressions.s | 4 +- llvm/test/MC/AMDGPU/flat-scratch.s | 12 +- llvm/test/MC/AMDGPU/literals.s | 88 ++-- llvm/test/MC/AMDGPU/mtbuf.s | 2 +- llvm/test/MC/AMDGPU/out-of-range-registers.s | 80 ++-- llvm/test/MC/AMDGPU/reg-syntax-err.s | 126 ++++-- llvm/test/MC/AMDGPU/reg-syntax-extra.s | 24 +- llvm/test/MC/AMDGPU/smem.s | 35 +- llvm/test/MC/AMDGPU/smrd-err.s | 10 +- llvm/test/MC/AMDGPU/smrd.s | 12 +- llvm/test/MC/AMDGPU/sop1-err.s | 17 +- llvm/test/MC/AMDGPU/sop1.s | 6 +- llvm/test/MC/AMDGPU/sop2.s | 6 +- llvm/test/MC/AMDGPU/sopk.s | 47 ++- llvm/test/MC/AMDGPU/trap.s | 76 ++-- llvm/test/MC/AMDGPU/vop3.s | 6 +- llvm/test/MC/AMDGPU/vop_sdwa.s | 27 +- llvm/test/MC/AMDGPU/xnack-mask.s | 12 +- llvm/test/MC/ARM/directive-if-subtraction.s | 52 +++ llvm/test/MC/MachO/reloc-diff.s | 4 - llvm/test/Transforms/Attributor/noalias.ll | 238 +++++------ .../DeadStoreElimination/MSSA/atomic-todo.ll | 11 - .../Transforms/DeadStoreElimination/MSSA/atomic.ll | 11 + .../DeadStoreElimination/masked-dead-store.ll | 77 ++++ .../Transforms/GCOVProfiling/atomic-counter.ll | 8 +- .../IndVarSimplify/ARM/indvar-unroll-imm-cost.ll | 462 +++------------------ .../test/Transforms/InferFunctionAttrs/annotate.ll | 84 ++-- llvm/test/Transforms/InstCombine/shl-factor.ll | 281 +++++++++++++ .../test/Transforms/InstSimplify/known-non-zero.ll | 21 + .../JumpThreading/select-unfold-freeze.ll | 248 +++++++++++ llvm/test/Transforms/LoopLoadElim/pr47457.ll | 2 +- .../unreachable-blocks-status.ll | 67 +++ llvm/test/Verifier/get-active-lane-mask.ll | 10 +- llvm/test/lit.cfg.py | 2 +- llvm/test/lit.site.cfg.py.in | 2 +- llvm/test/tools/llvm-objcopy/tool-version.test | 1 + .../tools/llvm-objdump/ELF/AMDGPU/kd-failure.s | 37 -- llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-sgpr.s | 49 --- llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-vgpr.s | 36 -- .../llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx10.s | 58 --- .../tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx9.s | 53 --- .../tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-raw.s | 41 -- .../tools/llvm-readobj/COFF/arm64-packed-epilog.s | 34 ++ .../tools/llvm-readobj/COFF/arm64-unwind-opcodes.s | 30 +- .../ELF/DWARF/unrecognized-debug-section.yaml | 19 + llvm/tools/llvm-objcopy/InstallNameToolOpts.td | 4 + llvm/tools/llvm-objdump/llvm-objdump.cpp | 17 + llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp | 11 +- llvm/tools/obj2yaml/elf2yaml.cpp | 2 + llvm/unittests/Analysis/ValueTrackingTest.cpp | 66 ++- llvm/unittests/Target/ARM/MachineInstrTest.cpp | 12 + llvm/utils/gn/secondary/lld/test/BUILD.gn | 4 +- .../gn/secondary/llvm/include/llvm/Config/BUILD.gn | 4 +- llvm/utils/gn/secondary/llvm/test/BUILD.gn | 4 +- mlir/include/mlir/Conversion/Passes.td | 2 +- .../StandardToLLVM/ConvertStandardToLLVM.h | 5 +- .../Conversion/VectorToLLVM/ConvertVectorToLLVM.h | 5 +- .../Linalg/IR/LinalgNamedStructuredOpsSpec.tc | 30 +- .../mlir/Dialect/Linalg/Transforms/Transforms.h | 3 +- mlir/include/mlir/Dialect/Linalg/Utils/Utils.h | 44 +- mlir/include/mlir/Transforms/BufferPlacement.h | 4 +- .../Dialect/Linalg/Conv/test-conv-1d-call.mlir | 65 +++ .../Dialect/Linalg/Conv/test-conv-1d-ncw-call.mlir | 71 ++++ .../Dialect/Linalg/Conv/test-conv-1d-nwc-call.mlir | 82 ++++ .../Dialect/Linalg/Conv/test-conv-2d-call.mlir | 70 ++++ .../Linalg/Conv/test-conv-2d-nchw-call.mlir | 84 ++++ .../Linalg/Conv/test-conv-2d-nhwc-call.mlir | 130 ++++++ .../Dialect/Linalg/Conv/test-conv-3d-call.mlir | 87 ++++ .../Linalg/Conv/test-conv-3d-ncdhw-call.mlir | 91 ++++ .../Linalg/Conv/test-conv-3d-ndhwc-call.mlir | 193 +++++++++ .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 10 +- .../VectorToLLVM/ConvertVectorToLLVM.cpp | 6 +- .../Dialect/Linalg/Transforms/Vectorization.cpp | 2 +- mlir/lib/Dialect/Linalg/Utils/Utils.cpp | 44 ++ mlir/lib/Interfaces/ControlFlowInterfaces.cpp | 15 +- .../Conversion/VectorToLLVM/vector-to-llvm.mlir | 51 +-- mlir/test/Dialect/Linalg/loops.mlir | 60 +-- mlir/test/Dialect/SCF/invalid.mlir | 4 +- openmp/libomptarget/include/Debug.h | 25 +- openmp/libomptarget/plugins/cuda/src/rtl.cpp | 30 +- openmp/libomptarget/src/interface.cpp | 24 +- openmp/libomptarget/test/offloading/info.c | 15 + 275 files changed, 7475 insertions(+), 3147 deletions(-) create mode 100644 clang/test/CodeGenCXX/attr-likelihood-if-branch-weights.cpp create mode 100644 clang/test/Sema/attr-likelihood.c create mode 100644 clang/test/SemaCXX/attr-likelihood.cpp create mode 100644 flang/test/Semantics/omp-resolve06.f90 create mode 100644 flang/test/Semantics/resolve95.f90 copy libcxx/test/std/atomics/atomics.flag/{atomic_flag_test_and_set.pass.cpp => at [...] create mode 100644 libcxx/test/std/atomics/atomics.flag/atomic_flag_test_explicit. [...] create mode 100644 llvm/cmake/modules/GetLibraryName.cmake delete mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/const-0.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-condbr-lower-tree.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/lds-misaligned-bug.ll create mode 100644 llvm/test/CodeGen/AMDGPU/hazard-recognizer-meta-insts.mir create mode 100644 llvm/test/CodeGen/AMDGPU/waitcnt-meta-instructions.mir create mode 100644 llvm/test/CodeGen/ARM/fminmax-folds.ll create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/isel-widen-truncate-pair.ll create mode 100644 llvm/test/CodeGen/Hexagon/swp-pragma-initiation-interval-reset.ii create mode 100644 llvm/test/CodeGen/Thumb2/LowOverheadLoops/predicated-liveout-un [...] create mode 100644 llvm/test/CodeGen/X86/memcpy-inline-fsrm.ll create mode 100644 llvm/test/MC/ARM/directive-if-subtraction.s create mode 100644 llvm/test/Transforms/DeadStoreElimination/masked-dead-store.ll create mode 100644 llvm/test/Transforms/InstCombine/shl-factor.ll create mode 100644 llvm/test/Transforms/JumpThreading/select-unfold-freeze.ll create mode 100644 llvm/test/Transforms/UnifyFunctionExitNodes/unreachable-blocks- [...] delete mode 100644 llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-failure.s delete mode 100644 llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-sgpr.s delete mode 100644 llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-vgpr.s delete mode 100644 llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx10.s delete mode 100644 llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx9.s delete mode 100644 llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-raw.s create mode 100644 llvm/test/tools/llvm-readobj/COFF/arm64-packed-epilog.s create mode 100644 llvm/test/tools/obj2yaml/ELF/DWARF/unrecognized-debug-section.yaml create mode 100644 mlir/integration_test/Dialect/Linalg/Conv/test-conv-1d-call.mlir create mode 100644 mlir/integration_test/Dialect/Linalg/Conv/test-conv-1d-ncw-call.mlir create mode 100644 mlir/integration_test/Dialect/Linalg/Conv/test-conv-1d-nwc-call.mlir create mode 100644 mlir/integration_test/Dialect/Linalg/Conv/test-conv-2d-call.mlir create mode 100644 mlir/integration_test/Dialect/Linalg/Conv/test-conv-2d-nchw-call.mlir create mode 100644 mlir/integration_test/Dialect/Linalg/Conv/test-conv-2d-nhwc-call.mlir create mode 100644 mlir/integration_test/Dialect/Linalg/Conv/test-conv-3d-call.mlir create mode 100644 mlir/integration_test/Dialect/Linalg/Conv/test-conv-3d-ncdhw-call.mlir create mode 100644 mlir/integration_test/Dialect/Linalg/Conv/test-conv-3d-ndhwc-call.mlir create mode 100644 openmp/libomptarget/test/offloading/info.c