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from db358dc237a3 Merge master r10-5993. adds c35a3046247c PR93253 – Document BOZ changes, make it friendlier in legacy code adds 5c06093ce90a aarch64: Fix BE SVE mode punning involving floats adds 3b5757ea87ad Work around array out of bounds warning in mkdeps adds f7dff7699fd7 PR tree-optimization/92429 do not fold when updating epilo [...] adds 2588197b6c21 contrib: Verify the id to be printed is ancestor of the co [...] adds 55c7ffae7021 Fix uninitialized field in expand_operand. adds 7c6056d52ef7 Uninitialized padding in struct _dep. adds 2db99ef78969 Fix value numbering dealing with reverse byte order adds 1c2755a6a6bf Fix spacing in a dump in value-prof.c. adds 545f5fad17ff contrib: Check and if needed set user.name and user.email [...] adds 8c197c851e75 [GCC][PATCH][AArch64]Add ACLE intrinsics for dot product ( [...] adds d916538965ea libstdc++: Improve unordered containers == operator (PR 91263) adds f275d73a57f1 [GCC][PATCH][AArch64]Add ACLE intrinsics for bfdot for ARM [...] adds 7aa4e0db959d gcc-git-customization.sh: avoid double expansion adds 66aae15b4edf gcc-git-customization.sh: Avoid double expansion adds e953433f089b [PATCH, GCC/ARM, 1/10] Fix -mcmse check in libgcc adds e27cf2e37265 [PATCH, GCC/ARM, 2/10] Add command line support for Armv8. [...] adds e0e4be48a989 [PATCH, GCC/ARM, 3/10] Save/restore FPCXTNS in nsentry functions adds 9722215a027b [PATCH, GCC/ARM, 4/10] Clear GPR with CLRM adds 0b1c7b27a7dd [PATCH, GCC/ARM, 5/10] Clear VFP registers with VSCCLRM adds 2d924ca62038 [PATCH, GCC/ARM, 6/10] Clear GPRs inline when calling nsca [...] adds 1e4f3696a24a [PATCH, GCC/ARM, 7/10] Clear all VFP regs inline in hardfl [...] adds 0ab81d9cc733 [PATCH, GCC/ARM, 8/10] Do lazy store & load inline when ca [...] adds a464ffc2156a [PATCH, GCC/ARM, 9/10] Call nscall function with blxns adds 4747e2ccec94 [PATCH, GCC/ARM, 10/10] Enable -mcmse adds 7b4c373beb31 Add CLI and multilib support for Armv8.1-M Mainline MVE ex [...] adds 2e87b2f4121f [GCC][PATCH][ARM] Add Bfloat16_t scalar type, vector types [...] adds 3ea9140170b8 [GCC][PATCH][ARM] Add Bfloat16_t scalar type, vector types [...] adds 98d56ea8900f libstdc++: std::ctype fixes for recent versions of NetBSD adds f48c6014133c Fix noreorder symbol partitioning reversion. adds 801f5b967752 PR c++/93280 - ICE with aggregate assignment and DMI. adds f5b25e15165a Make profile estimation more precise adds 852f0ae80555 Fix ICE caused by swallowing a token in c_parser_consume_token adds b6a0ebd19203 Extern -param=max-predicted-iterations range. adds 1113de9499da Daily bump. adds 5194b51ed971 PR c++/93286 - ICE with __is_constructible and variadic template. adds f17f6127f8e5 contrib/gcc_update: Insert "tformat:" for git log --pretty [...] adds 2b3534a31222 ChangeLog fixes. adds 40111910b0aa testsuite: Unbreak compat.exp testing with alt compiler PR93294 adds dc9ba9d045d0 vect: Fix ICE in vectorizable_comparison PR93292 adds e4a5f73449d7 PATCH] Fortran: PR93263 -fno-automatic and RECURSIVE adds 507de5ee23ef gimplifier: handle POLY_INT_CST-sized TARGET_EXPRs adds 865257c447cc aarch64: Don't raise FE_INVALID for -__builtin_isgreater [ [...] adds f788c2d66a6e Add PR number to change log adds e5e07b68187b [AArch64] Fix shrinkwrapping interactions with atomics (PR92692) adds 5f0303833d54 analyzer: fix handling of negative byte offsets (v2) (PR 93281) adds bf09d886a4be [PR93306] Short-circuit has_include adds c60a18f8056f c++: Fix deprecated attribute handling on templates (PR c+ [...] adds eff9c61dfb08 PR c++/92531 - ICE with noexcept(lambda). adds 6ed8c923325c [AArch64] Enable compare branch fusion adds 336e1b950db8 [AArch64] Enable CLI for Armv8.6-A f64mm adds 9ceec73fc0e5 [AArch64] [SVE] Implement svld1ro intrinsic. adds f1a7789d0f47 Fix g++ testsuite failure caused by std::is_pod deprecation adds 568f0f355f25 [AArch64] [Obvious] Correct pattern target requirement adds 2c2e9f7a5d4b gdbinit.in: make shorthands accept an explicit argument adds 0ba6a850b597 libstdc++: Fix freestanding build PR 92376) adds 6687d13a87c4 Rename acc_device_gcn to acc_device_radeon adds 925cef05b895 arm: Unbreak bootstrap adds 674dcc3f738c Fix up ChangeLog. adds 60d616b1f6de [GCC/ARM, 1/2] Add support for ASRL(reg) and LSLL(reg) ins [...] adds a968a40c4ee3 [GCC/ARM, 2/2] Add support for ASRL(imm), LSLL(imm) and LS [...] adds 4c9e5b02f08b Add testcase of PR c++/92542, already fixed. adds 7e45138702a9 Add testcase of PR c++/92542, already fixed. adds 82033483fd74 PR90374 Zero width format specifiers. adds 07c86323a199 analyzer: prevent ICE on isnan (PR 93290) adds 92030203c1d2 Daily bump. adds e2947cfa2d1d PR93234 INQUIRE on pre-assigned files of ROUND and SIGN pr [...] adds a22a86a18bd3 arm: fix rtl checking bootstrap (PR target/93312) adds 472ef1d34bbe arm: Remove yet another unused variable. new 92c958a08081 Merge master r10-6062, final before branch commit.
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Summary of changes: contrib/ChangeLog | 21 + contrib/gcc-git-customization.sh | 67 ++- contrib/gcc_update | 2 +- gcc/ChangeLog | 404 +++++++++++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 16 + gcc/analyzer/region-model.cc | 20 +- gcc/c/ChangeLog | 6 + gcc/c/c-parser.c | 6 +- gcc/config.gcc | 2 +- gcc/config/aarch64/aarch64-builtins.c | 45 +- gcc/config/aarch64/aarch64-c.c | 1 + gcc/config/aarch64/aarch64-option-extensions.def | 36 +- gcc/config/aarch64/aarch64-protos.h | 1 + gcc/config/aarch64/aarch64-simd-builtins.def | 10 + gcc/config/aarch64/aarch64-simd.md | 66 +++ gcc/config/aarch64/aarch64-sve-builtins-base.cc | 24 +- gcc/config/aarch64/aarch64-sve-builtins-base.def | 4 + gcc/config/aarch64/aarch64-sve-builtins-base.h | 1 + gcc/config/aarch64/aarch64-sve-builtins.cc | 6 +- gcc/config/aarch64/aarch64-sve.md | 14 + gcc/config/aarch64/aarch64.c | 70 ++- gcc/config/aarch64/aarch64.h | 17 +- gcc/config/aarch64/aarch64.md | 65 ++- gcc/config/aarch64/arm_neon.h | 134 +++++ gcc/config/aarch64/atomics.md | 20 +- gcc/config/aarch64/constraints.md | 25 + gcc/config/aarch64/iterators.md | 23 + gcc/config/aarch64/predicates.md | 16 + gcc/config/arm/arm-builtins.c | 33 +- gcc/config/arm/arm-cpus.in | 48 +- gcc/config/arm/arm-modes.def | 5 + gcc/config/arm/arm-protos.h | 1 + gcc/config/arm/arm-simd-builtin-types.def | 2 + gcc/config/arm/arm-tables.opt | 2 +- gcc/config/arm/arm.c | 632 +++++++++++++++++---- gcc/config/arm/arm.h | 41 +- gcc/config/arm/arm.md | 94 ++- gcc/config/{aarch64 => arm}/arm_bf16.h | 17 +- gcc/config/arm/arm_neon.h | 4 + gcc/config/arm/constraints.md | 7 +- gcc/config/arm/iterators.md | 22 +- gcc/config/arm/neon.md | 8 +- gcc/config/arm/predicates.md | 21 + gcc/config/arm/t-rmprofile | 17 +- gcc/config/arm/thumb2.md | 90 ++- gcc/config/arm/unspecs.md | 8 + gcc/config/arm/vfp.md | 161 ++++-- gcc/cp/ChangeLog | 22 + gcc/cp/init.c | 4 + gcc/cp/parser.c | 12 +- gcc/cp/pt.c | 91 ++- gcc/cp/typeck2.c | 3 - gcc/doc/analyzer.texi | 3 + gcc/doc/invoke.texi | 28 + gcc/fortran/ChangeLog | 20 + gcc/fortran/check.c | 7 +- gcc/fortran/gfortran.texi | 7 +- gcc/fortran/lang.opt | 2 +- gcc/fortran/primary.c | 2 +- gcc/fortran/resolve.c | 3 +- gcc/gdbinit.in | 173 ++++-- gcc/gimplify.c | 6 +- gcc/ipa-fnsummary.c | 2 +- gcc/lto/ChangeLog | 6 + gcc/lto/lto-partition.c | 3 + gcc/optabs.h | 1 + gcc/params.opt | 2 +- gcc/predict.c | 102 ++-- gcc/profile-count.c | 9 + gcc/profile-count.h | 5 +- gcc/sched-deps.c | 1 + gcc/sched-int.h | 2 + gcc/testsuite/ChangeLog | 410 +++++++++++++ gcc/testsuite/c-c++-common/pr92833-1.c | 4 + gcc/testsuite/c-c++-common/pr92833-2.c | 4 + gcc/testsuite/c-c++-common/pr92833-3.c | 4 + gcc/testsuite/c-c++-common/pr92833-4.c | 7 + gcc/testsuite/g++.dg/abi/mangle-neon.C | 5 + gcc/testsuite/g++.dg/cpp0x/std-layout1.C | 1 + gcc/testsuite/g++.dg/cpp1y/attr-deprecated-3.C | 13 + gcc/testsuite/g++.dg/cpp1z/constexpr-lambda25.C | 7 + .../{bf16-mangle-aarch64-1.C => bf16-mangle-1.C} | 2 +- gcc/testsuite/g++.dg/ext/is_constructible4.C | 18 + gcc/testsuite/g++.dg/opt/pr93292.C | 18 + gcc/testsuite/g++.dg/pr92542.C | 15 + .../aarch64/sve/acle/general-c++/gimplify_1.C | 4 + .../{aarch64 => arm}/bfloat_cpp_typecheck.C | 2 +- gcc/testsuite/gcc.dg/analyzer/pr93290.c | 9 + .../gcc.dg/torture/{pr91323.c => pr93133.c} | 15 +- .../aarch64/advsimd-intrinsics/bfdot-1.c | 91 +++ .../aarch64/advsimd-intrinsics/bfdot-2.c | 91 +++ .../aarch64/advsimd-intrinsics/bfdot-3.c | 28 + .../aarch64/advsimd-intrinsics/vdot-3-1.c | 136 +++++ .../aarch64/advsimd-intrinsics/vdot-3-2.c | 137 +++++ .../aarch64/advsimd-intrinsics/vdot-3-3.c | 31 + .../aarch64/advsimd-intrinsics/vdot-3-4.c | 31 + .../gcc.target/aarch64/pragma_cpp_predefs_2.c | 14 + .../gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c | 119 ++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c | 119 ++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c | 119 ++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c | 119 ++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c | 119 ++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c | 119 ++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c | 119 ++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c | 119 ++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c | 119 ++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c | 119 ++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c | 119 ++++ .../gcc.target/arm/armv8_1m-shift-imm-1.c | 27 + .../gcc.target/arm/armv8_1m-shift-reg-1.c | 20 + gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_1.c | 118 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_2.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_1.c | 124 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_2.c | 124 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_1.c | 119 ++++ gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_2.c | 119 ++++ .../{aarch64 => arm}/bfloat16_scalar_4.c | 2 +- .../{aarch64 => arm}/bfloat16_scalar_typecheck.c | 6 +- .../bfloat16_simd_1.c => arm/bfloat16_simd_1_1.c} | 36 +- .../bfloat16_simd_1.c => arm/bfloat16_simd_1_2.c} | 38 +- .../bfloat16_simd_2.c => arm/bfloat16_simd_2_1.c} | 38 +- .../bfloat16_simd_2.c => arm/bfloat16_simd_2_2.c} | 38 +- .../bfloat16_simd_2.c => arm/bfloat16_simd_3_1.c} | 42 +- .../bfloat16_simd_3.c => arm/bfloat16_simd_3_2.c} | 38 +- .../{aarch64 => arm}/bfloat16_vector_typecheck_1.c | 15 +- .../{aarch64 => arm}/bfloat16_vector_typecheck_2.c | 20 +- gcc/testsuite/gcc.target/arm/cmse/bitfield-1.c | 4 + gcc/testsuite/gcc.target/arm/cmse/bitfield-2.c | 4 + gcc/testsuite/gcc.target/arm/cmse/bitfield-3.c | 5 +- gcc/testsuite/gcc.target/arm/cmse/cmse-1.c | 18 +- gcc/testsuite/gcc.target/arm/cmse/cmse-14.c | 15 +- gcc/testsuite/gcc.target/arm/cmse/cmse-15.c | 7 +- gcc/testsuite/gcc.target/arm/cmse/cmse.exp | 43 +- .../gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c | 25 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c | 26 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c | 26 + .../gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c | 20 + .../arm/cmse/mainline/8_1m/bitfield-and-union.c | 30 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-13.c | 30 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-5.c | 12 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-8.c | 28 + .../arm/cmse/mainline/8_1m/hard/cmse-13.c | 32 ++ .../arm/cmse/mainline/8_1m/hard/cmse-5.c | 12 + .../arm/cmse/mainline/8_1m/hard/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/hard/cmse-8.c | 27 + .../arm/cmse/mainline/8_1m/soft/cmse-13.c | 29 + .../arm/cmse/mainline/8_1m/soft/cmse-5.c | 13 + .../arm/cmse/mainline/8_1m/soft/cmse-7.c | 26 + .../arm/cmse/mainline/8_1m/soft/cmse-8.c | 28 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-5.c | 14 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c | 25 + .../arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c | 27 + .../arm/cmse/mainline/8_1m/softfp/cmse-13.c | 28 + .../arm/cmse/mainline/8_1m/softfp/cmse-5.c | 13 + .../arm/cmse/mainline/8_1m/softfp/cmse-7.c | 25 + .../arm/cmse/mainline/8_1m/softfp/cmse-8.c | 27 + .../gcc.target/arm/cmse/mainline/8_1m/union-1.c | 23 + .../gcc.target/arm/cmse/mainline/8_1m/union-2.c | 27 + .../arm/cmse/mainline/{ => 8m}/bitfield-4.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-5.c | 3 +- .../arm/cmse/mainline/{ => 8m}/bitfield-6.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-7.c | 3 +- .../arm/cmse/mainline/{ => 8m}/bitfield-8.c | 2 +- .../arm/cmse/mainline/{ => 8m}/bitfield-9.c | 2 +- .../cmse/mainline/{ => 8m}/bitfield-and-union.c | 2 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-13.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard-sp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-13.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/hard/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-13.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-5.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/soft/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-13.c | 10 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-5.c | 4 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-7.c | 5 +- .../arm/cmse/mainline/{ => 8m}/softfp/cmse-8.c | 4 +- .../arm/cmse/mainline/{ => 8m}/union-1.c | 3 +- .../arm/cmse/mainline/{ => 8m}/union-2.c | 2 +- gcc/testsuite/gcc.target/arm/cmse/struct-1.c | 6 +- gcc/testsuite/gcc.target/arm/multilib.exp | 21 + gcc/testsuite/gfortran.dg/boz_7.f90 | 2 +- gcc/testsuite/gfortran.dg/inquire_pre.f90 | 68 +++ gcc/testsuite/gfortran.dg/pr93263_1.f90 | 29 + gcc/testsuite/gfortran.dg/pr93263_2.f90 | 24 + gcc/testsuite/lib/c-compat.exp | 10 + gcc/testsuite/lib/target-supports.exp | 16 +- gcc/tree-ssa-loop-niter.c | 7 +- gcc/tree-ssa-loop-niter.h | 2 +- gcc/tree-ssa-sccvn.c | 2 + gcc/tree-vect-loop.c | 7 +- gcc/tree-vect-stmts.c | 2 +- gcc/value-prof.c | 4 +- libcpp/ChangeLog | 6 + libcpp/expr.c | 34 +- libcpp/mkdeps.c | 2 +- libgcc/ChangeLog | 6 + libgcc/config/arm/t-arm | 2 +- libgfortran/ChangeLog | 14 + libgfortran/io/format.c | 4 +- libgfortran/io/unit.c | 16 +- libgfortran/io/write_float.def | 4 +- libgomp/ChangeLog | 25 + libgomp/config/accel/openacc.f90 | 4 +- libgomp/openacc.f90 | 4 +- libgomp/openacc.h | 2 +- libgomp/openacc_lib.h | 2 +- libgomp/testsuite/lib/libgomp.exp | 2 +- .../libgomp.oacc-c-c++-common/acc_prof-init-1.c | 2 +- .../libgomp.oacc-c-c++-common/acc_prof-kernels-1.c | 4 +- .../acc_prof-parallel-1.c | 12 +- .../libgomp.oacc-c-c++-common/asyncwait-nop-1.c | 2 +- libstdc++-v3/ChangeLog | 39 ++ libstdc++-v3/config/os/bsd/netbsd/ctype_base.h | 40 +- .../config/os/bsd/netbsd/ctype_configure_char.cc | 12 +- libstdc++-v3/config/os/bsd/netbsd/ctype_inline.h | 2 +- libstdc++-v3/include/bits/c++config | 5 +- libstdc++-v3/include/bits/hashtable.h | 7 + libstdc++-v3/include/bits/hashtable_policy.h | 127 ++--- libstdc++-v3/libsupc++/new_opa.cc | 15 + .../unordered_multiset/operators/1.cc | 56 ++ .../23_containers/unordered_set/operators/1.cc | 48 ++ 233 files changed, 7025 insertions(+), 853 deletions(-) copy gcc/config/{aarch64 => arm}/arm_bf16.h (85%) create mode 100644 gcc/testsuite/c-c++-common/pr92833-1.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-2.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-3.c create mode 100644 gcc/testsuite/c-c++-common/pr92833-4.c create mode 100644 gcc/testsuite/g++.dg/cpp1y/attr-deprecated-3.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/constexpr-lambda25.C copy gcc/testsuite/g++.dg/ext/arm-bf16/{bf16-mangle-aarch64-1.C => bf16-mangle-1.C} (89%) create mode 100644 gcc/testsuite/g++.dg/ext/is_constructible4.C create mode 100644 gcc/testsuite/g++.dg/opt/pr93292.C create mode 100644 gcc/testsuite/g++.dg/pr92542.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/gimplify_1.C copy gcc/testsuite/g++.target/{aarch64 => arm}/bfloat_cpp_typecheck.C (91%) create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr93290.c copy gcc/testsuite/gcc.dg/torture/{pr91323.c => pr93133.c} (68%) create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-1.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-2.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bfdot-3.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-1.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-2.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-3.c create mode 100755 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdot-3-4.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c create mode 100644 gcc/testsuite/gcc.target/arm/armv8_1m-shift-imm-1.c create mode 100644 gcc/testsuite/gcc.target/arm/armv8_1m-shift-reg-1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_2_2.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_1.c create mode 100644 gcc/testsuite/gcc.target/arm/bfloat16_scalar_3_2.c copy gcc/testsuite/gcc.target/{aarch64 => arm}/bfloat16_scalar_4.c (91%) copy gcc/testsuite/gcc.target/{aarch64 => arm}/bfloat16_scalar_typecheck.c (98%) copy gcc/testsuite/gcc.target/{aarch64/bfloat16_simd_1.c => arm/bfloat16_simd_1_1. [...] copy gcc/testsuite/gcc.target/{aarch64/bfloat16_simd_1.c => arm/bfloat16_simd_1_2. [...] copy gcc/testsuite/gcc.target/{aarch64/bfloat16_simd_2.c => arm/bfloat16_simd_2_1. [...] copy gcc/testsuite/gcc.target/{aarch64/bfloat16_simd_2.c => arm/bfloat16_simd_2_2. [...] copy gcc/testsuite/gcc.target/{aarch64/bfloat16_simd_2.c => arm/bfloat16_simd_3_1. [...] copy gcc/testsuite/gcc.target/{aarch64/bfloat16_simd_3.c => arm/bfloat16_simd_3_2. [...] copy gcc/testsuite/gcc.target/{aarch64 => arm}/bfloat16_vector_typecheck_1.c (96%) copy gcc/testsuite/gcc.target/{aarch64 => arm}/bfloat16_vector_typecheck_2.c (91%) create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-and-union.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-5.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-1.c create mode 100644 gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-2.c rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-4.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-5.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-6.c (96%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-7.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-8.c (96%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-9.c (94%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/bitfield-and-union.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-13.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-5.c (93%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-7.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard-sp/cmse-8.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-13.c (90%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-5.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-7.c (88%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/hard/cmse-8.c (88%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-13.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-5.c (79%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/soft/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-5.c (93%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp-sp/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-13.c (65%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-5.c (91%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-7.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/softfp/cmse-8.c (82%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/union-1.c (95%) rename gcc/testsuite/gcc.target/arm/cmse/mainline/{ => 8m}/union-2.c (96%) create mode 100644 gcc/testsuite/gfortran.dg/inquire_pre.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr93263_1.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr93263_2.f90