This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig in repository toolchain/ci/qemu.
from 4115aec9af Merge remote-tracking branch 'remotes/vivier2/tags/trivial-b [...] adds ac9b0117d5 hw/mips: loongson3: Drop 'struct MemmapEntry' adds 3ebbf86128 hw/mips: Add a bootloader helper adds 4d0c59fa07 hw/mips/fuloong2e: Use bl_gen_kernel_jump to generate bootloaders adds 112658eb26 hw/mips/boston: Use bl_gen_kernel_jump to generate bootloaders adds 283eae174e hw/mips/boston: Use bootloader helper to set GCRs adds 6902759965 hw/intc/loongson_liointc: Fix per core ISR handling adds c0928e6ddc tests/acceptance: Test PMON with Loongson-3A1000 CPU adds 0ab8e33a48 target/mips: fetch code with translator_ld adds afe2fe4d04 target/mips: Remove access_type argument from map_address() handler adds 4968922825 target/mips: Remove access_type argument from get_seg_physic [...] adds 0230a13793 target/mips: Remove access_type arg from get_segctl_physical [...] adds 935c103490 target/mips: Remove access_type argument from get_physical_a [...] adds e78d4ab6aa target/mips: Remove unused MMU definitions adds fd305527e3 target/mips: Replace magic value by MMU_DATA_LOAD definition adds 1190c53e82 target/mips: Let do_translate_address() take MMUAccessType argument adds 48b28c6a8e target/mips: Let cpu_mips_translate_address() take MMUAccess [...] adds ca354f0004 target/mips: Let raise_mmu_exception() take MMUAccessType argument adds 7c6e2049f0 target/mips: Let get_physical_address() take MMUAccessType argument adds 67b663d6fa target/mips: Let get_seg*_physical_address() take MMUAccessType arg adds edbd4992fb target/mips: Let CPUMIPSTLBContext::map_address() take MMUAc [...] adds bca3763be2 target/mips: Remove unused 'rw' argument from page_table_wal [...] adds 1e3b675b3e target/mips: Include missing "tcg/tcg.h" header adds 9f5f7691de target/mips: Make cpu_HI/LO registers public adds cefd68f6b1 target/mips: Promote 128-bit multimedia registers as global ones adds b5b63d43a0 target/mips: Rename 128-bit upper halve GPR registers adds 61f4e0ec0d target/mips: Introduce gen_load_gpr_hi() / gen_store_gpr_hi( [...] adds 3bc313c4f5 target/mips: Use GPR move functions in gen_HILO1_tx79() adds 6be6e4bc76 vt82c686: Move superio memory region to SuperIOConfig struct adds 94349bffda vt82c686: Reorganise code adds 911629e6d3 vt82c686: Fix SMBus IO base and configuration registers adds 35e360ed67 vt82c686: Make vt82c686-pm an I/O tracing region adds 40a0bba1e3 vt82c686: Correct vt82c686-pm I/O size adds 9af8e529b9 vt82c686: Correctly reset all registers to default values on reset adds 3ab1eea6bc vt82c686: Fix up power management io base and config adds 084bf4b41d vt82c686: Set user_creatable=false for VT82C686B_PM adds e1a69736e5 vt82c686: Make vt82c686b-pm an abstract base class and add v [...] adds 9859ad1c4b vt82c686: Simplify vt82c686b_realize() adds 3dc31cb849 vt82c686: Move creation of ISA devices to the ISA bridge adds c953bf7118 vt82c686: Remove index field of SuperIOConfig adds 2b98dca957 vt82c686: Reduce indentation by returning early adds b7741b7742 vt82c686: Simplify by returning earlier adds 2c4c556e06 vt82c686: Log superio_cfg unimplemented accesses adds cc2b455011 vt82c686: Fix superio_cfg_{read,write}() functions adds 00d8ba9e0d Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mip [...]
No new revisions were added by this update.
Summary of changes: MAINTAINERS | 1 + hw/intc/loongson_liointc.c | 16 +- hw/isa/trace-events | 2 + hw/isa/vt82c686.c | 464 +++++++++++++++++----------- hw/mips/bootloader.c | 200 ++++++++++++ hw/mips/boston.c | 62 +--- hw/mips/fuloong2e.c | 60 +--- hw/mips/loongson3_bootp.h | 7 +- hw/mips/loongson3_virt.c | 6 +- hw/mips/meson.build | 2 +- include/hw/isa/vt82c686.h | 1 + include/hw/mips/bootloader.h | 22 ++ include/hw/pci/pci_ids.h | 3 +- target/mips/cpu.h | 26 +- target/mips/internal.h | 10 +- target/mips/msa_helper.c | 1 + target/mips/op_helper.c | 9 +- target/mips/tlb_helper.c | 80 +++-- target/mips/translate.c | 111 +++---- target/mips/translate.h | 8 + tests/acceptance/machine_mips_loongson3v.py | 39 +++ 21 files changed, 710 insertions(+), 420 deletions(-) create mode 100644 hw/mips/bootloader.c create mode 100644 include/hw/mips/bootloader.h create mode 100644 tests/acceptance/machine_mips_loongson3v.py