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from 090714e6cf8 Set d.one_operand_p to true when TARGET_SSSE3 in ix86_expan [...] new 38dd4e26e07 RISC-V: Add Zvfbfwma extension to the -march= option
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Summary of changes: gcc/common/config/riscv/riscv-common.cc | 5 +++++ gcc/config/riscv/riscv.opt | 2 ++ gcc/testsuite/gcc.target/riscv/arch-37.c | 5 +++++ gcc/testsuite/gcc.target/riscv/arch-38.c | 5 +++++ .../gcc.target/riscv/{predef-34.c => predef-36.c} | 15 ++++++++------- .../gcc.target/riscv/{predef-33.c => predef-37.c} | 15 ++++++++++----- 6 files changed, 35 insertions(+), 12 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/arch-37.c create mode 100644 gcc/testsuite/gcc.target/riscv/arch-38.c copy gcc/testsuite/gcc.target/riscv/{predef-34.c => predef-36.c} (75%) copy gcc/testsuite/gcc.target/riscv/{predef-33.c => predef-37.c} (71%)