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from 2272cd2508f i386: Zero extend 32-bit address to 64-bit with option -mx3 [...] new 10d76b7f1e5 Reapply "[PATCH v2] RISC-V: zero_extend(not) -> xor optimiz [...] new eeb5c6acf71 [RISC-V] Fix costing of LO_SUM expressions
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Summary of changes: gcc/config/riscv/riscv.cc | 3 ++- gcc/simplify-rtx.cc | 22 ++++++++++++++++++++++ gcc/testsuite/gcc.target/riscv/pr112398.c | 14 ++++++++++++++ 3 files changed, 38 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/riscv/pr112398.c