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from ec40410d98e RISC-V: Add RVV mask logic auto-vectorization new 95542a6ec4b arm: PR target/109939 Correct signedness of return type of [...]
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Summary of changes: gcc/config/arm/arm-builtins.cc | 2 +- gcc/testsuite/gcc.target/arm/pr109939.c | 14 ++++++++++++++ 2 files changed, 15 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/arm/pr109939.c