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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig in repository toolchain/ci/llvm-project.
from ac744d5a864 [X86] Make sure load isn't volatile before shrinking it in [...] adds 3e9ef48440a gn build: Merge r365258 and follow-ups r365263, r365264 adds d22fd0e4ecc gn build: Sort cxx_sources in libcxx build file adds 7e063620611 gn build: Sort sync script output adds 18d138e6acc gn build: Merge r365273 adds 87210015581 gn build: Merge r355546 adds 8cedf04a6c8 Make ~mutex and ~condition_variable trivial on Windows. adds 842f55f3efe Process: generalise Windows thread setup adds 8d9d290d4c0 [ARM] Add support for MSVC stack cookie checking adds e28fca29fef Revert "[IRBuilder] Fold consistently for or/and whether co [...] adds 638b1a82d80 [NFC][PowerPC] Add the test add_cmp.ll adds 4cdb68ebbd5 [llvm-bcanalyzer] Refactor and move to libLLVMBitReader adds 46f2b583a2d [X86] Add MOVSDrr->MOVLPDrm entry to load folding table. Ad [...] adds 8f9e4d92e0d [clangd] Encapsulate fields in dex token. NFC adds d3bbc06ac79 [clangd] Avoid slow ostreams in URI conversion. adds f814dcbafba Make forward_list::remove/remove_if/unique all return void [...] adds e1e036a33bd [RISCV] Support z and i operand modifiers adds d8261f0288e [X86] Make movsd commutable to shufpd with a 0x02 immediate [...] adds 1deca50ab14 [X86] Allow execution domain fixing to turn SHUFPD into SHUFPS. adds 38902350ef4 [AMDGPU] Use a named predicate instead of a magic number. adds 23d10f7a4ed Change LaunchThread interface to return an Expected for non [...] adds 34958d12c9c [WebAssembly] Add static_assert(sizeof(SymbolUnion) <= 96) adds 1606a864647 [UpdateTestChecks] Skip over .Lfunc_begin for RISC-V adds 0464e07c8f6 [AArch64] Fix vsqadd scalar intrinsics operands new 7d63be09b6a [ARM] Fix null pointer dereference in CodeGen/ARM/Windows/s [...] new 4ec445b813a [AArch64] Fix scalar vuqadd intrinsics operands new 0b9addb8c0c [RISCV] Specify registers used in DWARF exception handling new d11df93898a [ubsan][test] Don't disable ubsan testing on 64-bit Solaris/x86 new 04ea772d5af [ubsan][test] Fix several UBSan-* :: TestCases/ImplicitConv [...] new d0e1d003971 [lld][WebAssembly] Fix typo in error message new 77d4a8f9f7c [RISCV] Specify registers used for exception handling new ee81051fc96 [ARM] Relax constraints on operands of VQxDMLxDH instructions new 1f7bd40f681 [ubsan][test] Fix cast-overflow.cpp and delete float-divide [...]
The 9 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: clang-tools-extra/clangd/URI.cpp | 31 +- clang-tools-extra/clangd/index/dex/PostingList.h | 2 +- clang-tools-extra/clangd/index/dex/Token.h | 11 +- clang/include/clang/Basic/arm_neon.td | 4 +- clang/lib/Basic/Targets/RISCV.h | 9 + clang/test/CodeGen/aarch64-neon-intrinsics.c | 16 +- .../CodeGen/aarch64-neon-vsqadd-float-conversion.c | 49 + .../aarch64-neon-vuqadd-float-conversion-warning.c | 26 + clang/test/CodeGen/builtins-riscv.c | 10 + compiler-rt/test/ubsan/CMakeLists.txt | 9 +- .../test/ubsan/TestCases/Float/cast-overflow.cpp | 2 +- .../integer-arithmetic-value-change.c | 66 +- .../ImplicitConversion/integer-conversion.c | 66 +- .../ImplicitConversion/integer-sign-change.c | 50 +- .../ImplicitConversion/integer-truncation.c | 28 +- ...d-integer-truncation-or-sign-change-blacklist.c | 2 +- .../ImplicitConversion/signed-integer-truncation.c | 28 +- .../test/ubsan/TestCases/Integer/div-zero.cpp | 1 - compiler-rt/test/ubsan_minimal/CMakeLists.txt | 3 - libcxx/include/__config | 13 +- libcxx/include/__mutex_base | 20 +- libcxx/include/forward_list | 35 +- libcxx/include/list | 13 +- libcxx/src/CMakeLists.txt | 1 + libcxx/src/condition_variable.cpp | 5 +- libcxx/src/condition_variable_destructor.cpp | 46 + .../forwardlist/forwardlist.ops/remove.pass.cpp | 42 +- .../forwardlist/forwardlist.ops/remove_if.pass.cpp | 49 +- .../forwardlist/forwardlist.ops/unique.pass.cpp | 37 +- .../forwardlist.ops/unique_pred.pass.cpp | 58 +- lld/test/wasm/undefined-data.ll | 6 +- lld/wasm/Relocations.cpp | 2 +- lld/wasm/Symbols.h | 15 +- lldb/include/lldb/Host/Host.h | 2 +- lldb/include/lldb/Host/HostNativeProcessBase.h | 2 +- lldb/include/lldb/Host/HostProcess.h | 5 +- lldb/include/lldb/Host/posix/HostProcessPosix.h | 5 +- lldb/source/Host/common/Host.cpp | 4 +- lldb/source/Host/common/HostProcess.cpp | 2 +- .../Host/common/MonitoringProcessLauncher.cpp | 8 +- lldb/source/Host/common/ProcessLaunchInfo.cpp | 5 + lldb/source/Host/posix/HostProcessPosix.cpp | 2 +- .../Process/Windows/Common/TargetThreadWindows.cpp | 30 +- llvm/include/llvm/Bitcode/BitcodeAnalyzer.h | 103 ++ llvm/include/llvm/IR/IRBuilder.h | 6 - .../Bitcode/Reader/BitcodeAnalyzer.cpp} | 1051 +++++++++----------- llvm/lib/Bitcode/Reader/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp | 7 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 44 +- llvm/lib/Target/ARM/ARMISelLowering.h | 4 + llvm/lib/Target/ARM/ARMInstrMVE.td | 13 +- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 10 +- llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp | 36 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 10 + llvm/lib/Target/RISCV/RISCVISelLowering.h | 10 + llvm/lib/Target/X86/X86InstrFoldTables.cpp | 3 + llvm/lib/Target/X86/X86InstrInfo.cpp | 81 +- llvm/lib/Target/X86/X86InstrSSE.td | 6 +- .../wrapping-pointer-versioning.ll | 24 +- .../CodeGen/ARM/Windows/stack-protector-msvc.ll | 20 + llvm/test/CodeGen/PowerPC/add_cmp.ll | 76 ++ .../CodeGen/RISCV/exception-pointer-register.ll | 130 +++ llvm/test/CodeGen/RISCV/inline-asm.ll | 45 + llvm/test/CodeGen/X86/buildvec-insertvec.ll | 4 +- llvm/test/CodeGen/X86/coalesce_commute_movsd.ll | 3 +- llvm/test/CodeGen/X86/combine-sdiv.ll | 75 +- llvm/test/CodeGen/X86/palignr.ll | 8 +- llvm/test/CodeGen/X86/psubus.ll | 65 +- llvm/test/CodeGen/X86/sdiv-exact.ll | 17 +- llvm/test/CodeGen/X86/sse-align-12.ll | 4 +- llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll | 28 +- llvm/test/CodeGen/X86/sse2.ll | 5 +- llvm/test/CodeGen/X86/swizzle-2.ll | 4 +- llvm/test/CodeGen/X86/trunc-subvector.ll | 6 +- llvm/test/CodeGen/X86/vector-blend.ll | 60 +- llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll | 44 +- llvm/test/CodeGen/X86/vector-shuffle-128-v2.ll | 77 +- llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll | 33 +- llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll | 14 +- .../CodeGen/X86/vector-shuffle-combining-ssse3.ll | 6 +- llvm/test/CodeGen/X86/vector-shuffle-combining.ll | 12 +- llvm/test/CodeGen/X86/vselect-2.ll | 6 +- llvm/test/CodeGen/X86/vselect.ll | 12 +- llvm/test/CodeGen/X86/x86-shifts.ll | 16 +- llvm/test/Instrumentation/BoundsChecking/opt.ll | 2 + llvm/test/MC/ARM/mve-qdest-qsrc.s | 12 +- .../LoopDistribute/scev-inserted-runtime-check.ll | 29 +- llvm/test/Transforms/LoopPredication/basic.ll | 3 +- .../basic_widenable_branch_guards.ll | 5 +- .../Transforms/LoopPredication/invariant_load.ll | 3 +- .../X86/illegal-parallel-loop-uniform-write.ll | 35 +- llvm/test/Transforms/LoopVectorize/X86/pr35432.ll | 45 +- .../LoopVectorize/pr30654-phiscev-sext-trunc.ll | 6 +- llvm/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp | 1035 +------------------ llvm/utils/UpdateTestChecks/asm.py | 2 +- .../utils/gn/build/sync_source_lists_from_cmake.py | 4 +- .../gn/secondary/clang/unittests/Rewrite/BUILD.gn | 4 + llvm/utils/gn/secondary/libcxx/src/BUILD.gn | 69 +- 98 files changed, 1963 insertions(+), 2290 deletions(-) create mode 100644 clang/test/CodeGen/aarch64-neon-vsqadd-float-conversion.c create mode 100644 clang/test/CodeGen/aarch64-neon-vuqadd-float-conversion-warning.c create mode 100644 clang/test/CodeGen/builtins-riscv.c create mode 100644 libcxx/src/condition_variable_destructor.cpp create mode 100644 llvm/include/llvm/Bitcode/BitcodeAnalyzer.h copy llvm/{tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp => lib/Bitcode/Reader/Bitcode [...] create mode 100644 llvm/test/CodeGen/ARM/Windows/stack-protector-msvc.ll create mode 100644 llvm/test/CodeGen/PowerPC/add_cmp.ll create mode 100644 llvm/test/CodeGen/RISCV/exception-pointer-register.ll