[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig updated (b94c215592bd -> 1c051b7b7042)

25 Feb 2021


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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig
in repository toolchain/ci/llvm-project.
from  b94c215592bd [Utils] collectBitParts - add truncate() handling
      adds  27830bc2b1b8 [asan] Avoid putting globals in a comdat section when targ [...]
      adds  d65ddca83ff8 [ValueTracking] ComputeKnownBits - minimum leading/trailin [...]
      adds  2105912ee0b8 [lldb] Add asserts that prevent construction of cycles in  [...]
      adds  abbdb5639c70 [OpenCL] Allow taking address of functions as an extension.
      adds  4631afdeb3c4 [lldb][NFC] Rename the second ValueObjectManager to ValueO [...]
      adds  0512b01ebede [lldb][NFC] Move trivial ValueObject getters/setters to th [...]
      adds  67f0620831b4 [AMDGPU] Update s_sendmsg messages
      adds  eb8d6af5e406 [mlir] Specify cuda-runner pass pipeline as command line options.
      adds  aab709f090f5 [AMDGPU] Add more PAL metadata register names
      adds  6201017d541f [lldb] Prevent double new lines behind errors/warning/mess [...]
      adds  7377ef935719 [mlir] Add a builder to `linalg.tiled_loop`.
      adds  d37400168ce2 [ValueTracking] computeKnownBitsFromShiftOperator - remove [...]
      adds  3d837ad7041f Revert "[ValueTracking] computeKnownBitsFromShiftOperator  [...]
      adds  5e19208d96dd [InstructionCost] NFC: Fix up missing cases in LoopVectori [...]
      adds  9ced8b3b614c [lld-macho] Add REQUIRES to incompatible-arch-tapi test
      adds  ff6dc053b7ba [Coverage][Unittest] Fix stringref issue
      adds  b90fdb7c117f [clang-tidy][test] Allow specifying potentially unused suffixes
      adds  5f0800cc187a [libc][NFC] Remove headergen for the cacheline size macro.
      adds  ce976d2db39f [mlir] Add polynomial approximation for math::LogOp (using [...]
      adds  a34532c330f6 [clang-tidy] Fix readability-avoid-const-params-in-decls r [...]
      adds  330406143230 [flang][fir] Add zero_bits operation.
      adds  4814985dec57 [libc++] NFC: Fix a few tests in pair that would succeed t [...]
      adds  5f5416e1c4b4 [libc++] NFC: Fix a few tests in tuple that would succeed  [...]
      adds  6628387c9a0e [libc][NFC] Exclude few targets from the `all` target.
      adds  35ab6d6390ec [OpenMP][Tests][NFC] rename macro to avoid naming clash
      adds  449e36ce726a [AMDGPU] Add a bit more gfx90a test coverage
      adds  e0f3acc5d34a [OpenMP][Tests][NFC] rename macro to avoid naming clash
      adds  43a569faeb33 [tests] Mark an autogened test as such
      adds  542d9c21541d [libomptarget] Load images in order of registration
      adds  ca0bb0e88750 Make sure some types are indeed trivially_copyable per llv [...]
      adds  532d4814ac8e Revert "[tests] Mark an autogened test as such"
      adds  f3a72509a743 [OpenMP][Tests][NFC] lit might also be known as llvm-lit.py
      adds  e5da63d5a9ed [OpenMP] Fixed a crash when offloading to x86_64 with targ [...]
      adds  2fbce374c8fb [OpenMP][Tests][NFC] rename macro to avoid naming clash
      adds  c1706f2269ac [tests] precommit tests for an upcoming AA improvement
      adds  b146dfe527ba [flang] add attribute to trim runtime implementation estab [...]
      adds  0146d206317e [AArch64] Do not fold SP adjustments into pre-increment ad [...]
      adds  404843a94dbf [MC][ARM] add .w suffixes for BL (T1) and DBG
      adds  6baeeb9efa8e [libomptarget] Fixed MSVC build fail caused by __attribute [...]
      adds  96a3dfeb9303 Revert rGd65ddca83ff85c7345fe9a0f5a15750f01e38420 - "[Valu [...]
      adds  5f8a80882b72 [mlir] Add constBuilderCall to TypeAttr to simplify builders
      adds  fe50be12c8b8 [LegalizeIntegerTypes] Further improve ExpandIntRes_SADDSU [...]
      adds  ce2ad938ff1f [mlir][spirv] Define spv.GLSL.Ldexp
      adds  2a5aa81739d3 [lit] Add --ignore-fail
      adds  086670d36786 [RISCV] Support fixed vector extract element. Use VL=1 for [...]
      adds  e339bba637b9 [AArch64][GlobalISel] Fix manual selection for v4s16 and v [...]
      adds  c2487bf7dfdd Remove a workaround for MSVC 2013, now that MSVC 2017 is t [...]
      adds  17b4e695ce0e [llvm-objcopy] If input=output, preserve umask bits, other [...]
      adds  38dfb235db19 [lldb] Support debugging utility functions
      adds  705068cb8c4d [mlir][linalg] Support for using output values in TC definitions.
      adds  21895a2beff7 [mlir][linalg] Reuse the symbol if attribute uses are identical.
      adds  e79cd47e1620 [mlir][docs] Small fix to local Pass Manager reproduction  [...]
      adds  78b6d73a93fc AMDGPU: Add even aligned VGPR/AGPR register classes
      adds  589223e044db AMDGPU: Remove special case in shouldCoalesce
      adds  3475159122b6 [InstCombine] add tests for fdiv+powi; NFC
      adds  c218c80c730a [libcxx] [test] Quote the path to the python interpreter
      adds  0d4e12e3c110 [amdgpu] Atomic should be source of divergence.
      adds  52745e4d9078 [tests] precommit tests for D97219
      adds  1e1b92f76de7 IR: Rename Metadata::ImplicitCode to SubclassData1, NFC
      adds  01701646d555 Transforms: Clone distinct nodes in metadata mapper unless [...]
      adds  80f329bcd028 [Profile] Include a few asserts in coverage mapping test
      adds  868d43fbd657 [InstCombine] add helper for x/pow(); NFC
      adds  a7cee55762c6 [InstCombine] fold fdiv with powi divisor (PR49147)
      adds  ae7528a34e27 Revert "[Profile] Include a few asserts in coverage mapping test"
      adds  a921aaf78991 [MC][ARM] make Thumb function also if type attribute is set
      adds  341889ee9e03 [builtins] Define fmax and scalbn inline
      adds  9f1b832331e3 Reland "[Driver][Windows] Support per-target runtimes dir  [...]
      adds  680f836c2fa7 Revert "[builtins] Define fmax and scalbn inline"
      adds  a7d4826101ab [profile] Fix buffer overrun when parsing %c in filename string
      adds  c519460745ec Allow !shape.size type operands in "shape.from_extents" op.
      adds  47acdec1dd5d [CUDA][HIP] Support accessing static device variable in ho [...]
      adds  9bde29629dfe [RISCV] Use a ComplexPattern for zexti32 to match sexti32.
      adds  efcdd598b766 [RISCV] Teach VSETVLI inserter to use VSETIVLI when possible.
      adds  7c926fee9300 Improve attribute documentation for nodebug on typedefs
      adds  b03bb054e19c [llvm] Check availability for os_signpost
      adds  392fd3f1bf9f update AMDGPU _Float16 support in clang doc
      adds  e9445765a570 [test] Improve SanitizerCoverage tests on !associated and comdat
      adds  151990dd94e5 [lld-macho] add code signature for native arm64 macOS
      adds  4bc7c8631ad6 [X86] Support amx-bf16 intrinsic.
      adds  a9b33ffb8f84 [ThinLTO][NewPM] Clean up dead code under -O0
      adds  841f6995cd33 [flang][fir][NFC] Move remaining types to TableGen type de [...]
      adds  082ec3ab0776 [flang][fir][NFC] Remove dead code.
      adds  b950de5c13ef [docs] Add a release note for the removing of -Wreturn-std [...]
      adds  c38000a9fb2c [Coroutine] Check indirect uses of alloca when checking li [...]
      adds  1c051b7b7042 [NFC][AIX] Rename aix-csr-vector.ll to aix-csr-vector-extabi.ll
No new revisions were added by this update.
Summary of changes:
 .../readability/AvoidConstParamsInDecls.cpp        |   38 +-
 .../test/clang-tidy/check_clang_tidy.py            |    9 +-
 .../checkers/modernize-loop-convert-reverse.cpp    |    7 -
 .../readability-avoid-const-params-in-decls.cpp    |   19 +
 clang/docs/LanguageExtensions.rst                  |    1 +
 clang/docs/ReleaseNotes.rst                        |    4 +
 clang/include/clang/AST/ASTContext.h               |    6 +
 clang/include/clang/Basic/AttrDocs.td              |    4 +-
 clang/include/clang/Basic/BuiltinsX86_64.def       |    1 +
 clang/include/clang/Driver/ToolChain.h             |   12 +-
 clang/lib/AST/ASTContext.cpp                       |   19 +-
 clang/lib/CodeGen/CGCUDANV.cpp                     |   11 +
 clang/lib/CodeGen/CodeGenModule.cpp                |   23 +-
 clang/lib/CodeGen/CodeGenModule.h                  |    4 +
 clang/lib/Driver/ToolChain.cpp                     |   21 +-
 clang/lib/Driver/ToolChains/BareMetal.cpp          |    5 +-
 clang/lib/Driver/ToolChains/BareMetal.h            |    9 +-
 clang/lib/Headers/amxintrin.h                      |   26 +-
 clang/lib/Parse/ParseExpr.cpp                      |    3 +-
 clang/test/CodeGen/X86/amx_api.c                   |    9 +-
 clang/test/CodeGenCUDA/device-var-linkage.cu       |   11 +-
 clang/test/CodeGenCUDA/managed-var.cu              |   28 +-
 clang/test/CodeGenCUDA/static-device-var-rdc.cu    |   97 ++
 clang/test/Driver/cl-options.c                     |    4 +-
 clang/test/Driver/fsanitize.c                      |   10 +-
 clang/test/Driver/instrprof-ld.c                   |    6 +-
 clang/test/Driver/sanitizer-ld.c                   |    8 +-
 clang/test/SemaCUDA/static-device-var.cu           |   50 +
 clang/test/SemaOpenCL/func.cl                      |   26 +-
 compiler-rt/lib/profile/InstrProfilingFile.c       |   18 +-
 .../test/profile/ContinuousSyncMode/get-filename.c |   32 +
 flang/include/flang/Optimizer/Dialect/FIRAttr.h    |   22 -
 flang/include/flang/Optimizer/Dialect/FIROps.td    |  244 ++--
 flang/include/flang/Optimizer/Dialect/FIRType.h    |  246 +---
 flang/include/flang/Optimizer/Dialect/FIRTypes.td  |  416 +++++-
 flang/lib/Optimizer/Dialect/FIRAttr.cpp            |   43 -
 flang/lib/Optimizer/Dialect/FIRDialect.cpp         |    2 +-
 flang/lib/Optimizer/Dialect/FIRType.cpp            | 1433 +++++++-------------
 flang/runtime/character.cpp                        |    3 +-
 flang/test/Fir/fir-ops.fir                         |   22 +-
 libc/cmake/modules/LLVMLibCLibraryRules.cmake      |    1 +
 libc/cmake/modules/LLVMLibCObjectRules.cmake       |    4 +
 libc/src/string/memory_utils/CMakeLists.txt        |   14 -
 libc/src/string/memory_utils/cacheline_size.h.def  |   27 -
 .../memory_utils/cacheline_size_aarch64.h.inc      |    3 -
 .../string/memory_utils/cacheline_size_arm.h.inc   |    9 -
 .../string/memory_utils/cacheline_size_ppc64.h.inc |    1 -
 .../string/memory_utils/cacheline_size_x86.h.inc   |    1 -
 .../memory_utils/cacheline_size_x86_64.h.inc       |    1 -
 libc/src/string/memory_utils/utils.h               |   24 +-
 libcxx/test/CMakeLists.txt                         |    2 +-
 .../tuple.tuple/tuple.assign/const_pair.pass.cpp   |    2 +-
 .../tuple.tuple/tuple.assign/convert_copy.pass.cpp |    8 +-
 .../tuple.tuple/tuple.assign/convert_move.pass.cpp |    8 +-
 .../tuple/tuple.tuple/tuple.assign/copy.pass.cpp   |   21 +-
 .../pairs/pairs.pair/assign_rv_pair.pass.cpp       |    2 +-
 .../pairs/pairs.pair/assign_rv_pair_U_V.pass.cpp   |    4 +-
 lld/MachO/OutputSegment.h                          |    1 +
 lld/MachO/SyntheticSections.cpp                    |   95 ++
 lld/MachO/SyntheticSections.h                      |   30 +-
 lld/MachO/Writer.cpp                               |   33 +
 lld/test/MachO/invalid/incompatible-arch-tapi.s    |    1 +
 lldb/include/lldb/Core/ValueObject.h               |  120 +-
 lldb/include/lldb/Core/ValueObjectUpdater.h        |   43 +
 lldb/include/lldb/Expression/UtilityFunction.h     |    5 +-
 .../include/lldb/Interpreter/CommandReturnObject.h |    2 -
 lldb/include/lldb/Target/Target.h                  |    4 +
 lldb/source/Commands/CommandObjectMemory.cpp       |    4 +-
 lldb/source/Core/CMakeLists.txt                    |    1 +
 lldb/source/Core/IOHandlerCursesGUI.cpp            |    5 +-
 lldb/source/Core/ValueObject.cpp                   |  177 +--
 lldb/source/Core/ValueObjectUpdater.cpp            |   56 +
 lldb/source/Expression/FunctionCaller.cpp          |   14 +-
 lldb/source/Expression/UtilityFunction.cpp         |    3 +-
 lldb/source/Interpreter/CommandReturnObject.cpp    |   15 +-
 .../ExpressionParser/Clang/ClangASTImporter.cpp    |   29 +-
 .../ExpressionParser/Clang/ClangASTImporter.h      |   17 +-
 .../Clang/ClangExpressionSourceCode.cpp            |    6 +-
 .../Clang/ClangExpressionSourceCode.h              |    1 +
 .../Clang/ClangUtilityFunction.cpp                 |   37 +-
 .../ExpressionParser/Clang/ClangUtilityFunction.h  |    5 +-
 .../Plugins/TypeSystem/Clang/TypeSystemClang.cpp   |    3 +-
 lldb/source/Target/Target.cpp                      |   11 +
 lldb/source/Target/TargetProperties.td             |    3 +
 lldb/test/Shell/Commands/command-disassemble.s     |    4 -
 llvm/docs/CommandGuide/lit.rst                     |    4 +
 llvm/include/llvm/BinaryFormat/MachO.h             |  197 +++
 llvm/include/llvm/IR/DebugInfo.h                   |    4 +-
 llvm/include/llvm/IR/DebugInfoMetadata.h           |    4 +-
 llvm/include/llvm/IR/IntrinsicsX86.td              |    6 +
 llvm/include/llvm/IR/Metadata.h                    |    6 +-
 llvm/include/llvm/Support/TrailingObjects.h        |   25 +-
 llvm/lib/CodeGen/CodeGenPrepare.cpp                |    4 +-
 .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp  |   45 +-
 llvm/lib/Passes/PassBuilder.cpp                    |   11 +-
 llvm/lib/Support/Signposts.cpp                     |   33 +-
 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp   |    8 +-
 llvm/lib/Target/AArch64/AArch64ISelLowering.h      |    8 +
 .../Target/AArch64/AArch64LoadStoreOptimizer.cpp   |   19 +-
 .../AArch64/GISel/AArch64InstructionSelector.cpp   |   16 +-
 .../Target/AMDGPU/AMDGPUInstructionSelector.cpp    |    2 +-
 .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp    |    4 +-
 llvm/lib/Target/AMDGPU/GCNSubtarget.h              |    3 +
 .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp      |    4 +-
 llvm/lib/Target/AMDGPU/SIDefines.h                 |   26 +-
 llvm/lib/Target/AMDGPU/SIISelLowering.cpp          |  121 +-
 llvm/lib/Target/AMDGPU/SIInstrInfo.cpp             |   56 +-
 llvm/lib/Target/AMDGPU/SIInstructions.td           |    4 +-
 llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp    |   23 +-
 llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp          |  125 +-
 llvm/lib/Target/AMDGPU/SIRegisterInfo.h            |   28 +-
 llvm/lib/Target/AMDGPU/SIRegisterInfo.td           |   59 +-
 llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp    |   18 +-
 llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.h      |    8 +-
 llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp    |   49 +-
 llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h      |    6 +-
 llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp |   35 +
 llvm/lib/Target/ARM/ARMInstrThumb2.td              |    3 +
 .../lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp |   22 +
 llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp        |   18 +
 llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h          |    1 +
 llvm/lib/Target/RISCV/RISCVISelLowering.cpp        |  101 +-
 llvm/lib/Target/RISCV/RISCVInstrInfo.td            |    4 +-
 llvm/lib/Target/RISCV/RISCVInstrInfoD.td           |    2 +-
 llvm/lib/Target/RISCV/RISCVInstrInfoF.td           |    2 +-
 llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td         |    2 +-
 llvm/lib/Target/X86/X86ExpandPseudo.cpp            |   12 +-
 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp            |    2 +-
 llvm/lib/Target/X86/X86InstrAMX.td                 |   10 +
 llvm/lib/Target/X86/X86LowerAMXType.cpp            |    3 +-
 llvm/lib/Target/X86/X86PreTileConfig.cpp           |    2 +
 llvm/lib/Target/X86/X86RegisterInfo.cpp            |    1 +
 llvm/lib/Transforms/Coroutines/CoroFrame.cpp       |   73 +-
 .../InstCombine/InstCombineMulDivRem.cpp           |   68 +-
 .../Instrumentation/AddressSanitizer.cpp           |    9 +-
 llvm/lib/Transforms/Utils/CloneFunction.cpp        |   16 +-
 llvm/lib/Transforms/Utils/ValueMapper.cpp          |   18 +-
 llvm/lib/Transforms/Vectorize/LoopVectorize.cpp    |    4 +-
 llvm/test/Analysis/BasicAA/recphi.ll               |   81 ++
 .../test/CodeGen/AArch64/GlobalISel/select-dup.mir |   44 +
 .../CodeGen/AArch64/ldst-nopreidx-sp-redzone.mir   |  407 ++++++
 llvm/test/CodeGen/AArch64/sadd_sat_vec.ll          |   54 +-
 llvm/test/CodeGen/AArch64/ssub_sat_vec.ll          |   54 +-
 .../llvm.amdgcn.raw.buffer.atomic.fadd.ll          |   12 +-
 .../llvm.amdgcn.struct.buffer.atomic.fadd.ll       |   22 +-
 .../AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll   |   29 +-
 ...-tuples.mir => alloc-aligned-tuples-gfx908.mir} |   12 -
 ...-tuples.mir => alloc-aligned-tuples-gfx90a.mir} |   68 +-
 .../test/CodeGen/AMDGPU/coalesce-vgpr-alignment.ll |    6 +-
 llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll  |  828 +++++++++++
 llvm/test/CodeGen/AMDGPU/dpp64_combine.mir         |   36 +-
 llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll    |   20 +-
 llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll      |   20 +-
 llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll        |   57 +-
 .../CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll |    2 +-
 llvm/test/CodeGen/AMDGPU/merge-load-store-agpr.mir |    4 +-
 .../test/CodeGen/AMDGPU/reserved-reg-in-clause.mir |   35 +-
 llvm/test/CodeGen/AMDGPU/twoaddr-fma-f64.mir       |   76 +-
 .../CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir |  121 ++
 llvm/test/CodeGen/ARM/sadd_sat.ll                  |  134 +-
 llvm/test/CodeGen/ARM/sadd_sat_plus.ll             |  150 +-
 llvm/test/CodeGen/ARM/ssub_sat.ll                  |  134 +-
 llvm/test/CodeGen/ARM/ssub_sat_plus.ll             |  152 +--
 ...{aix-csr-vector.ll => aix-csr-vector-extabi.ll} |    0
 llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv32.ll  |   90 +-
 llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv64.ll  |   90 +-
 llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll |  160 ++-
 llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll |  132 +-
 .../CodeGen/RISCV/rvv/fixed-vectors-extract.ll     |  266 +++-
 .../CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll |    3 +-
 .../CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll    |  318 ++---
 .../CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll    |   54 +-
 .../CodeGen/RISCV/rvv/fixed-vectors-fp-vrgather.ll |   21 +-
 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll    |  330 ++---
 .../test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll |  155 ++-
 .../RISCV/rvv/fixed-vectors-int-buildvec.ll        |   15 +-
 .../CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll   |   66 +-
 .../RISCV/rvv/fixed-vectors-int-splat-rv32.ll      |  112 +-
 .../RISCV/rvv/fixed-vectors-int-splat-rv64.ll      |   99 +-
 .../RISCV/rvv/fixed-vectors-int-vrgather.ll        |   30 +-
 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll   | 1360 +++++++------------
 .../RISCV/rvv/fixed-vectors-mask-load-store.ll     |   15 +-
 .../CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll  |   18 +-
 .../CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll  |   27 +-
 .../CodeGen/RISCV/rvv/fixed-vectors-vselect.ll     |   63 +-
 .../test/CodeGen/RISCV/rvv/vreductions-int-rv32.ll |   64 +-
 llvm/test/CodeGen/RISCV/rvv/zvlsseg-zero-vl.ll     |   50 +-
 llvm/test/CodeGen/RISCV/sadd_sat.ll                |   21 +-
 llvm/test/CodeGen/RISCV/sadd_sat_plus.ll           |   21 +-
 llvm/test/CodeGen/RISCV/ssub_sat.ll                |   46 +-
 llvm/test/CodeGen/RISCV/ssub_sat_plus.ll           |   46 +-
 llvm/test/CodeGen/RISCV/xaluo.ll                   |  119 +-
 llvm/test/CodeGen/Thumb2/mve-saturating-arith.ll   |  170 ++-
 llvm/test/CodeGen/X86/AMX/amx-tile-basic.ll        |    7 +-
 .../AddressSanitizer/global_metadata.ll            |    4 +-
 .../{global_metadata.ll => global_with_comdat.ll}  |   47 +-
 .../instrument-section-invalid-c-ident.ll          |    4 +-
 .../SanitizerCoverage/inline-bool-flag.ll          |   10 +-
 .../interposable-symbol-nocomdat.ll                |    6 +
 .../SanitizerCoverage/trace-pc-guard-comdat.ll     |    3 +
 .../SanitizerCoverage/trace-pc-guard-nocomdat.ll   |    3 +
 llvm/test/MC/AMDGPU/pal-registers.s                |   68 +
 llvm/test/MC/AMDGPU/sopp-err.s                     |   28 +
 llvm/test/MC/AMDGPU/sopp-gfx10.s                   |    6 +
 llvm/test/MC/AMDGPU/sopp-gfx9.s                    |   24 +
 llvm/test/MC/AMDGPU/sopp.s                         |   17 +-
 llvm/test/MC/ARM/basic-thumb2-instructions.s       |    6 +
 llvm/test/MC/ARM/thumb-function-address.s          |   42 +
 llvm/test/MC/ARM/thumb2-branches.s                 |    6 +
 llvm/test/MC/Disassembler/AMDGPU/sopp_vi.txt       |    6 +
 llvm/test/Other/new-pm-O0-defaults.ll              |    3 +
 llvm/test/Transforms/Coroutines/coro-alloca-07.ll  |  104 ++
 llvm/test/Transforms/Coroutines/coro-alloca-08.ll  |   83 ++
 llvm/test/Transforms/InstCombine/fdiv.ll           |   68 +
 .../LoopStrengthReduce/post-increment-insertion.ll |  125 ++
 ...bug-info-cloned-type-references-global-value.ll |   42 +
 .../llvm-objcopy/ELF/mirror-permissions-unix.test  |   12 +
 llvm/tools/llvm-objcopy/llvm-objcopy.cpp           |   24 +-
 llvm/unittests/ProfileData/CoverageMappingTest.cpp |    3 +
 llvm/unittests/Support/TypeTraitsTest.cpp          |   26 +
 llvm/utils/lit/lit/cl_arguments.py                 |    4 +
 llvm/utils/lit/lit/main.py                         |    7 +-
 .../{show-result-codes => ignore-fail}/fail.txt    |    0
 llvm/utils/lit/tests/Inputs/ignore-fail/lit.cfg    |    6 +
 .../lit/tests/Inputs/ignore-fail/unresolved.txt    |    0
 .../{shtest-format => ignore-fail}/xfail.txt       |    0
 llvm/utils/lit/tests/Inputs/ignore-fail/xpass.txt  |    2 +
 llvm/utils/lit/tests/ignore-fail.py                |   19 +
 mlir/docs/PassManagement.md                        |    3 +-
 .../Linalg/IR/LinalgNamedStructuredOpsSpec.tc      |  120 +-
 mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td   |   16 +
 mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLSLOps.td |   55 +
 mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td     |    4 +-
 mlir/include/mlir/IR/OpBase.td                     |    4 +-
 .../GPUCommon/ConvertKernelFuncToBlob.cpp          |    6 +-
 .../Conversion/StandardToSPIRV/StandardToSPIRV.cpp |    5 +-
 mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp           |   34 +
 mlir/lib/Dialect/Math/Transforms/CMakeLists.txt    |    1 +
 .../Math/Transforms/PolynomialApproximation.cpp    |  365 +++--
 mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp             |   24 +
 .../Transforms/TensorConstantBufferize.cpp         |    6 +-
 .../Dialect/Math/polynomial-approximation.mlir     |   19 +-
 mlir/test/Dialect/SPIRV/IR/glsl-ops.mlir           |   43 +
 mlir/test/Dialect/Shape/canonicalize.mlir          |   16 +-
 mlir/test/Target/SPIRV/glsl-ops.mlir               |    4 +-
 .../lib/Transforms/TestPolynomialApproximation.cpp |    4 +-
 .../mlir-cpu-runner/math_polynomial_approx.mlir    |   58 +-
 mlir/test/mlir-cuda-runner/all-reduce-and.mlir     |    2 +
 mlir/test/mlir-cuda-runner/all-reduce-max.mlir     |    2 +
 mlir/test/mlir-cuda-runner/all-reduce-min.mlir     |    2 +
 mlir/test/mlir-cuda-runner/all-reduce-op.mlir      |    2 +
 mlir/test/mlir-cuda-runner/all-reduce-or.mlir      |    2 +
 mlir/test/mlir-cuda-runner/all-reduce-region.mlir  |    2 +
 mlir/test/mlir-cuda-runner/all-reduce-xor.mlir     |    2 +
 mlir/test/mlir-cuda-runner/async.mlir              |    7 +-
 mlir/test/mlir-cuda-runner/gpu-to-cubin.mlir       |    2 +
 .../test/mlir-cuda-runner/multiple-all-reduce.mlir |    2 +
 mlir/test/mlir-cuda-runner/shuffle.mlir            |    2 +
 mlir/test/mlir-cuda-runner/two-modules.mlir        |    2 +
 .../mlir-linalg-ods-gen/test-linalg-ods-gen.tc     |   38 +-
 mlir/tools/mlir-cuda-runner/mlir-cuda-runner.cpp   |  114 +-
 .../mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp    |   38 +-
 openmp/cmake/OpenMPTesting.cmake                   |    2 +-
 openmp/libomptarget/include/Debug.h                |   16 +-
 openmp/libomptarget/include/omptargetplugin.h      |    5 +
 openmp/libomptarget/plugins/exports                |    1 +
 openmp/libomptarget/plugins/ve/src/rtl.cpp         |    2 +
 openmp/libomptarget/src/device.h                   |    2 +
 openmp/libomptarget/src/omptarget.cpp              |   13 +-
 openmp/libomptarget/src/rtl.cpp                    |    3 +
 openmp/libomptarget/src/rtl.h                      |    2 +
 openmp/libomptarget/test/offloading/bug49334.cpp   |  148 ++
 openmp/runtime/src/kmp_tasking.cpp                 |    3 +-
 openmp/runtime/test/ompt/callback.h                |   50 +-
 openmp/runtime/test/ompt/parallel/repeated_calls.c |    4 +-
 .../synchronization/barrier/implicit_task_data.c   |   10 +-
 openmp/runtime/test/ompt/synchronization/master.c  |    2 +-
 openmp/runtime/test/ompt/tasks/task_memory.c       |    6 +-
 .../tests/custom_data_storage/first-tool.h         |   48 +-
 279 files changed, 8296 insertions(+), 5504 deletions(-)
 create mode 100644 clang/test/CodeGenCUDA/static-device-var-rdc.cu
 create mode 100644 clang/test/SemaCUDA/static-device-var.cu
 create mode 100644 compiler-rt/test/profile/ContinuousSyncMode/get-filename.c
 delete mode 100644 libc/src/string/memory_utils/cacheline_size.h.def
 delete mode 100644 libc/src/string/memory_utils/cacheline_size_aarch64.h.inc
 delete mode 100644 libc/src/string/memory_utils/cacheline_size_arm.h.inc
 delete mode 100644 libc/src/string/memory_utils/cacheline_size_ppc64.h.inc
 delete mode 100644 libc/src/string/memory_utils/cacheline_size_x86.h.inc
 delete mode 100644 libc/src/string/memory_utils/cacheline_size_x86_64.h.inc
 create mode 100644 lldb/include/lldb/Core/ValueObjectUpdater.h
 create mode 100644 lldb/source/Core/ValueObjectUpdater.cpp
 create mode 100644 llvm/test/CodeGen/AArch64/ldst-nopreidx-sp-redzone.mir
 copy llvm/test/CodeGen/AMDGPU/{reserved-vgpr-tuples.mir => alloc-aligned-tuples-gf [...]
 rename llvm/test/CodeGen/AMDGPU/{reserved-vgpr-tuples.mir => alloc-aligned-tuples- [...]
 create mode 100644 llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
 rename llvm/test/CodeGen/PowerPC/{aix-csr-vector.ll => aix-csr-vector-extabi.ll} (100%)
 copy llvm/test/Instrumentation/AddressSanitizer/{global_metadata.ll => global_with [...]
 create mode 100644 llvm/test/MC/ARM/thumb-function-address.s
 create mode 100644 llvm/test/Transforms/Coroutines/coro-alloca-07.ll
 create mode 100644 llvm/test/Transforms/Coroutines/coro-alloca-08.ll
 create mode 100644 llvm/test/Transforms/ThinLTOBitcodeWriter/cfi-debug-info-cloned [...]
 copy llvm/utils/lit/tests/Inputs/{show-result-codes => ignore-fail}/fail.txt (100%)
 create mode 100644 llvm/utils/lit/tests/Inputs/ignore-fail/lit.cfg
 copy clang-tools-extra/clangd/test/Inputs/background-index/sub_dir/compile_flags.t [...]
 copy llvm/utils/lit/tests/Inputs/{shtest-format => ignore-fail}/xfail.txt (100%)
 create mode 100644 llvm/utils/lit/tests/Inputs/ignore-fail/xpass.txt
 create mode 100644 llvm/utils/lit/tests/ignore-fail.py
 create mode 100644 openmp/libomptarget/test/offloading/bug49334.cpp
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[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig updated (b94c215592bd -> 1c051b7b7042)