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from 80fa53ba4eb [AArch64][GlobalISel] Implement selection og G_MERGE of two [...] new 32e66b72648 [X86] Disable custom widening of signed/unsigned add/sub sa [...] new 48efaa117f9 AMDGPU/GlobalISel: Fix ValueMapping tables for i1 new 6493b367051 AMDGPU: Make i1/i64/v2i32 and/or/xor legal
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Summary of changes: lib/Target/AMDGPU/AMDGPUGenRegisterBankInfo.def | 63 +++++---- lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 8 +- lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 21 ++- lib/Target/X86/X86ISelLowering.cpp | 17 ++- test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir | 59 +++++++- test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir | 59 +++++++- test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir | 59 +++++++- .../AMDGPU/GlobalISel/regbankselect-and.mir | 156 +++++++++++++++++++-- .../CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir | 16 +-- .../AMDGPU/GlobalISel/regbankselect-trunc.mir | 59 +++++++- .../AMDGPU/GlobalISel/regbankselect-xor.mir | 16 +-- 11 files changed, 462 insertions(+), 71 deletions(-)