[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig updated (1f50697abc7 -> faaf1a53663)

18 Jun 2019


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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig
in repository toolchain/ci/llvm-project.
from  1f50697abc7 Various improvements to Clang MSVC Visualizer
      adds  a8dcd476887 Update the meeting page with papers/issues that are ready f [...]
      adds  8b1c53b5281 AMDGPU/GlobalISel: Implement select for G_ICMP and G_SELECT
      adds  5d00c3060e1 [AMDGPU] gfx1010 wave32 metadata
      adds  fee1949b358 AMDGPU/GlobalISel: Account for multiple defs when finding i [...]
      adds  a7f09f3c9e6 GlobalISel: Verify intrinsics
      adds  3e140066bce GlobalISel: Ignore callsite attributes when picking intrinsic type
      adds  6452bdd29b5 [LV] Suppress vectorization in some nontemporal cases
      adds  bb9adfdb4e8 [X86][AVX] Split under-aligned vector nt-stores.
      adds  0cbf37af1e9 gn build: Merge r363541
      adds  21184ec5c48 [GWP-ASan] Integration with Scudo [5].
      adds  b8e8b1769ff [clang][AST] Remove unnecessary 'const'.
      adds  ad04e7ad426 [AMDGPU] Pass to propagate ABI attributes from kernels to t [...]
      adds  6d741f29ec8 AMDGPU: Fold readlane/readfirstlane calls
      adds  a9191c8492a [AMDGPU] gfx1010 wavefrontsize intrinsic folding
      adds  2e550cabead Add tests for LWG 3206. NFC
      adds  05f77803f45 [MemorySSA] Add all MemoryPhis before filling their values.
      adds  5d942d5a95c AMDGPU: Make getreg intrinsic inaccessiblememonly
      adds  835999e48aa [X86][SSE] Scalarize under-aligned XMM vector nt-stores (PR42026)
      adds  bf3c59f79bc LiveInterval.h: add LiveRange::findIndexesLiveAt function - [...]
      adds  546006b64ea Update status of issue 3209
      adds  f3f968adcd5 [X86] Add TB_NO_REVERSE to some memory folding table entrie [...]
      adds  49537bbf74a [GlobalISel][AArch64] Fold G_SUB into G_ICMP when it's safe [...]
      adds  7a0098aa6e3 [MemorySSA] Don't use template when the clone is a simplifi [...]
      adds  daa1ae61429 [EarlyCSE] Fix hashing of self-compares
      adds  88afd753008 [test] Add wrap flags after D61934.
      adds  8af7198c6ca AMDGPU: Explicitly define a triple for some tests
      adds  58c75565f31 Reduced test case for pr42279 in advance of the relevant re [...]
      adds  ae4fcb97dde AMDGPU/GFX10: Don't generate s_code_end padding in the asm-printer
      adds  be8c669af05 [libc++] Update ABI list for ABI v2
      adds  79bc188dc24 Attempt to fix GWP-ASan build failure on sanitizer-android. [...]
      adds  15722626e32 [NFC] Assign a couple of LWG issues to myself
      adds  4f3b7364a45 PR42205: DebugInfio: Do not attempt to emit debug info meta [...]
      adds  f9626f27c8e Add color to the default thread and frame format.
      adds  cf73dc75da5 gn build: Merge r363584.
      adds  72adaf3ec85 gn build: Merge r363483.
      adds  2d26cf37d77 llgdb.py: Make sure to clean up the debugger on exit.
      adds  abccb1ad896 Clang :: Sema/wchar.c has long been failing on Solaris:
      adds  fe8bd96ebd6 Fix a bug w/inbounds invalidation in LFTR (recommit)
      adds  31382782873 [AMDGPU] Propagate function attributes thru bitcasts
      adds  17bd226b6a1 Stop counting pops in tsan/check_analyze.sh.
      adds  184c8ee9208 [globalisel] Fix iterator invalidation in the extload combines
      adds  496f77f3d39 Add convenience utility for replacing a range within a cont [...]
      adds  44475363e84 Teach getSCEVAtScope how to handle loop phis w/invariant op [...]
      adds  5745febe277 Rewrite ConstStructBuilder with a mechanism that can cope w [...]
      adds  689509edab4 [test][AArch64] Relax the check line for G_BRJT in legalize [...]
      adds  94bc88ebf4b Fix crash when checking a dependently-typed reference that  [...]
      adds  ca42687d62a [AMDGPU] gfx1010 subvector test. NFC.
      adds  8fbb88fbff5 [GWP-ASan] Disable GWP-ASan on Android for now.
      adds  121956108f2 [AMDGPU] Use custom inserter for gfx10 VOP2b
      adds  8df7f1a218f [clang-ifs] Clang Interface Stubs, first version.
      adds  36a7a982722 [Remarks][Driver] Use the specified format in the remarks f [...]
      adds  0e183008029 [X86] Make an assert in LowerSCALAR_TO_VECTOR stricter to m [...]
      adds  971ad74ba26 Use VR128X instead of FR32X/FR64X for the register class in [...]
      adds  f9bff2a55e7 Propagate fmf in IRTranslate for fneg
      adds  146882242fb [GlobalISel][Localizer] Rewrite localizer to run in 2 phase [...]
      adds  964909e4a6f [CMake] Fix the value of `config.target_cflags` for non-mac [...]
      adds  c3b6d777553 gn build: Merge r363626.
      adds  fb9ce100d19 hwasan: Add a tag_offset DWARF attribute to instrumented st [...]
      adds  d57f7cc15e2 hwasan: Use bits [3..11) of the ring buffer entry address a [...]
      adds  5a321b899e7 GlobalISel: Use the original flags when lowering fneg to fsub
      adds  77477009370 [llvm-strip] Error when using stdin twice
      adds  3c9f66dccf2 [asan_symbolize] Teach `asan_symbolize.py` to symbolicate p [...]
      adds  745632c63a5 [NFC] Split `Darwin/asan-symbolize-partial-report-with-modu [...]
      adds  9216358c211 Disable recently added Darwin symbolization tests for iOS.
      adds  1f7f64665c2 GlobalISel: Remove redundant pass initialization
      adds  8582ecd8d93 [X86] Introduce new MOVSSrm/MOVSDrm opcodes that use VR128  [...]
      adds  587427716c3 [X86] Remove MOVDI2SSrm/MOV64toSDrm/MOVSS2DImr/MOVSDto64mr  [...]
      adds  f4284f8a9d9 [X86] Move code that shrinks immediates for ((x << C1) op C [...]
      adds  e86b89ba46e [NFC] Fixing -DBUILD_SHARED_LIBS=ON problem caused by layer [...]
      adds  02a445c2453 [X86] Add i128 ctpop and i32/i64/i128 optsize test cases to [...]
      adds  4d36782446d [NFC] Undoing r363646 to fix bots.
      adds  2d94dd812ff Revert D60974 "[clang-ifs] Clang Interface Stubs, first version."
      adds  291e11ea025 [llvm-objdump] Tidy up AMDGCNPrettyPrinter
      adds  5136ea49948 Fix compiler warning by removing unused variable
      adds  69daf4a72da [SimplifyCFG] NFC, prof branch_weighs handling is simplified
      adds  afb17daedf9 Fix windows build for r363357
      adds  a1a4f5f12cc [DebugInfo][Docs] Document that prologue/epilogue variable  [...]
      adds  7dd529e54da [X86] Replace any_extend* vector extensions with zero_exten [...]
      adds  0265716b272 [NFC] Improve triple match of scripts that update tests
      adds  6658bfb171a [X86] Regenerate promote.ll. NFC.
      adds  43854e3ccc7 [SVE][IR] Scalable Vector IR Type with pr42210 fix
      adds  7e854e1cdd2 [AMDGPU] Speed up live-in virtual register set computaion i [...]
      adds  40fdd7a643b [clangd] Detect C++ language based on well-known file path  [...]
      adds  8ddf31bc33e [clangd] Parse files without extensions if we don't have a  [...]
      adds  8d41294c189 [clangd] Add a capability to enable completions with fixes.
      adds  5c64a8c4c69 [SystemZ]  Fix AHIMuxK pseudo expansion.
      adds  7a7009f7c82 [ARM] Some Thumb2ITBlock clean ups. NFC
      adds  d5ce8ec778c AMDGPU/GlobalISel: RegBankSelect for amdgcn.div.scale
      adds  23f03f5059c AMDGPU: Fix iterator crash in AMDGPUPromoteAlloca
      adds  e75e197ad87 AMDGPU: Remove unnecessary check for virtual register
      adds  bcb5ea00428 AMDGPU: Fold readlane from copy of SGPR or imm
      adds  83bacd8d72b [SelectionDAG] Legalize vaargs that require vector splitting
      adds  7001fe8d143 gn build: Merge r363649
      adds  3c8e2cdda5a gn build: Merge r363658
      adds  c99d9aee007 MCContext: Delete unused functions
      adds  f39f3bd056f AMDGPU: Change API for checking for exec modification
      adds  7a89909c842 Require commas to separate multiple GNU-style attributes in [...]
      adds  3b2f5df12c8 [MCA] Slightly refactor the bottleneck analysis view. NFCI
      adds  8d35dcd7039 AMDGPU: Add ds_gws_init / ds_gws_barrier intrinsics
      adds  45b10d2da5c [compiler-rt][SystemZ] Work around ASAN failures via -fno-p [...]
      adds  395fde753c9 [clangd] Add hidden tweaks to dump AST/selection.
      adds  9483bcf7815 [clangd] Remove the extra ";", NFC
      adds  d204987ada4 AMDGPU: Disable errno by default
      adds  677423997d6 [llvm-readobj] Allow --hex-dump/--string-dump to dump multi [...]
      adds  2acc7176271 AMDGPU: Add GWS instruction builtins
      adds  2fef12ccb19 Fix -Wunused-but-set-variable warning. NFCI.
      adds  74c83649547 [RISCV] Lower calls through PLT
      adds  a45292cbfd2 [CodeGen][ARM] Fix FP16 vector coercion
      adds  1fab01f92bd [libc++] Revert the addition of map/multimap CTAD
      adds  91185b69d12 [libc++] Re-apply XFAIL to is_base_of test that was inadver [...]
      adds  ed4a6025152 [ARM] Rename MVE instructions in Tablegen for consistency.
      adds  df9ee08b649 [clangd] Return vector<TextEdit> from applyTweak. NFC
      adds  c74fc6d5f96 [libc++] Implement P0608R3 - A sane variant converting constructor
      adds  9c8593934af [X86][AVX] extract_subvector(any_extend(x)) -> any_extend_v [...]
      adds  9aa25be1491 [TargetLowering] SimplifyDemandedVectorElts - support MUL a [...]
      adds  faaf1a53663 [ARM] Add MVE integer vector min/max instructions.
No new revisions were added by this update.
Summary of changes:
 clang-tools-extra/clangd/ClangdLSPServer.cpp       |   36 +-
 clang-tools-extra/clangd/ClangdServer.cpp          |   44 +-
 clang-tools-extra/clangd/ClangdServer.h            |   16 +-
 .../clangd/GlobalCompilationDatabase.cpp           |    6 +-
 clang-tools-extra/clangd/Protocol.cpp              |   11 +
 clang-tools-extra/clangd/Protocol.h                |   28 +
 clang-tools-extra/clangd/Selection.cpp             |    3 +
 .../clangd/clients/clangd-vscode/package.json      |    4 +
 clang-tools-extra/clangd/refactor/Tweak.h          |   44 +-
 .../clangd/refactor/tweaks/CMakeLists.txt          |    1 +
 .../clangd/refactor/tweaks/DumpAST.cpp             |  139 ++
 .../clangd/refactor/tweaks/RawStringLiteral.cpp    |   14 +-
 .../clangd/refactor/tweaks/SwapIfBranches.cpp      |   11 +-
 clang-tools-extra/clangd/tool/ClangdMain.cpp       |    6 +
 .../unittests/GlobalCompilationDatabaseTests.cpp   |    4 +
 .../clangd/unittests/SelectionTests.cpp            |   10 +
 clang-tools-extra/clangd/unittests/TweakTests.cpp  |   71 +-
 clang/docs/UsersManual.rst                         |    4 +-
 clang/include/clang/AST/Expr.h                     |    2 +-
 clang/include/clang/Basic/BuiltinsAMDGPU.def       |    2 +
 clang/lib/AST/Decl.cpp                             |    2 +-
 clang/lib/Basic/Targets/OSTargets.h                |    6 +-
 clang/lib/CodeGen/CGDebugInfo.cpp                  |    3 +
 clang/lib/CodeGen/CGExprConstant.cpp               | 1131 ++++++++-------
 clang/lib/CodeGen/TargetInfo.cpp                   |   36 +-
 clang/lib/Driver/ToolChains/AMDGPU.h               |    2 +
 clang/lib/Driver/ToolChains/Clang.cpp              |   10 +-
 clang/lib/Driver/ToolChains/Darwin.cpp             |    8 +-
 clang/lib/Parse/ParseDecl.cpp                      |   10 +-
 clang/test/CodeGen/arm-vfp16-arguments2.cpp        |   63 +
 .../debug-info-var-template-partial-spec.cpp       |   13 +
 clang/test/CodeGenCXX/designated-init.cpp          |   66 +
 clang/test/CodeGenOpenCL/builtins-amdgcn.cl        |   12 +
 clang/test/Driver/darwin-ld.c                      |    2 +-
 clang/test/Driver/fast-math.c                      |    6 +
 clang/test/Driver/opt-record.c                     |    1 +
 clang/test/Parser/attributes.c                     |   12 +-
 clang/test/Preprocessor/wchar_t.c                  |    7 +-
 clang/test/Sema/format-strings.c                   |    6 +-
 clang/test/Sema/wchar.c                            |    6 +-
 clang/test/SemaTemplate/dependent-expr.cpp         |    8 +
 compiler-rt/CMakeLists.txt                         |    9 +
 compiler-rt/cmake/config-ix.cmake                  |   31 +-
 compiler-rt/lib/asan/scripts/asan_symbolize.py     |   17 +-
 compiler-rt/lib/gwp_asan/CMakeLists.txt            |    1 +
 compiler-rt/lib/hwasan/hwasan_thread.cpp           |    5 +
 compiler-rt/lib/scudo/CMakeLists.txt               |    9 +
 compiler-rt/lib/scudo/scudo_allocator.cpp          |   47 +
 compiler-rt/lib/tsan/check_analyze.sh              |    2 -
 compiler-rt/test/asan/CMakeLists.txt               |   19 +-
 ...bolize-partial-report-no-external-symbolizer.cc |   38 +
 ...san-symbolize-partial-report-with-module-map.cc |   40 +
 compiler-rt/test/fuzzer/CMakeLists.txt             |   11 +-
 compiler-rt/test/gwp_asan/CMakeLists.txt           |    3 +-
 compiler-rt/test/gwp_asan/double_delete.cpp        |   15 +
 compiler-rt/test/gwp_asan/double_deletea.cpp       |   15 +
 compiler-rt/test/gwp_asan/double_free.cpp          |   15 +
 compiler-rt/test/gwp_asan/dummy_test.cc            |    4 -
 compiler-rt/test/gwp_asan/heap_buffer_overflow.cpp |   18 +
 .../test/gwp_asan/heap_buffer_underflow.cpp        |   18 +
 compiler-rt/test/gwp_asan/invalid_free_left.cpp    |   16 +
 compiler-rt/test/gwp_asan/invalid_free_right.cpp   |   16 +
 compiler-rt/test/gwp_asan/lit.cfg                  |   13 +
 compiler-rt/test/gwp_asan/page_size.h              |   13 +
 compiler-rt/test/gwp_asan/realloc.cpp              |   44 +
 compiler-rt/test/gwp_asan/repeated_alloc.cpp       |   28 +
 compiler-rt/test/gwp_asan/use_after_delete.cpp     |   18 +
 compiler-rt/test/gwp_asan/use_after_deletea.cpp    |   20 +
 compiler-rt/test/gwp_asan/use_after_free.cpp       |   20 +
 .../test/hwasan/TestCases/random-align-right.c     |   22 +-
 .../test/hwasan/TestCases/stack-history-length.c   |    5 +-
 compiler-rt/test/hwasan/lit.cfg                    |    2 +-
 compiler-rt/test/lit.common.cfg                    |    3 +
 compiler-rt/test/lit.common.configured.in          |    1 +
 compiler-rt/test/scudo/lit.cfg                     |    4 +
 compiler-rt/test/tsan/CMakeLists.txt               |   70 +-
 compiler-rt/test/ubsan/CMakeLists.txt              |    6 +-
 debuginfo-tests/llgdb.py                           |    7 +-
 libcxx/include/iterator                            |   16 -
 libcxx/include/map                                 |   57 +-
 libcxx/include/variant                             |   32 +-
 libcxx/lib/abi/x86_64-apple-darwin.v2.abilist      |   74 +
 .../associative/map/map.cons/deduct.fail.cpp       |  107 --
 .../associative/map/map.cons/deduct.pass.cpp       |  137 --
 .../associative/map/map.cons/deduct_const.pass.cpp |  107 --
 .../multimap/multimap.cons/deduct.fail.cpp         |  107 --
 .../multimap/multimap.cons/deduct.pass.cpp         |  137 --
 .../multimap/multimap.cons/deduct_const.pass.cpp   |  107 --
 .../meta/meta.rel/is_base_of_union.pass.cpp        |    6 +-
 .../time.cal.ymd.members/op.sys_days.pass.cpp      |   23 +
 .../variant.variant/variant.assign/T.pass.cpp      |   59 +-
 .../variant.variant/variant.assign/conv.fail.cpp   |   52 +
 .../variant.variant/variant.ctor/T.pass.cpp        |   60 +-
 .../variant.variant/variant.ctor/conv.fail.cpp     |   39 +
 libcxx/www/cxx2a_status.html                       |    2 +-
 libcxx/www/upcoming_meeting.html                   |   84 +-
 lldb/include/lldb/Core/UniqueCStringMap.h          |    6 +-
 .../test/macosx/nslog/TestDarwinNSLogOutput.py     |    2 +-
 lldb/source/Core/Debugger.cpp                      |   29 +-
 lldb/source/Core/FormatEntity.cpp                  |    4 +-
 llvm/docs/LangRef.rst                              |   57 +-
 llvm/docs/SourceLevelDebugging.rst                 |   17 +-
 llvm/include/llvm/ADT/DenseMapInfo.h               |   16 +
 llvm/include/llvm/ADT/STLExtras.h                  |   27 +
 llvm/include/llvm/Analysis/MemorySSAUpdater.h      |    8 +-
 llvm/include/llvm/Analysis/TargetTransformInfo.h   |   24 +
 .../llvm/Analysis/TargetTransformInfoImpl.h        |   18 +
 llvm/include/llvm/BinaryFormat/Dwarf.def           |    1 +
 llvm/include/llvm/BinaryFormat/Dwarf.h             |    5 +-
 llvm/include/llvm/CodeGen/GlobalISel/Localizer.h   |   12 +-
 llvm/include/llvm/CodeGen/LiveInterval.h           |   38 +
 llvm/include/llvm/IR/DerivedTypes.h                |   68 +-
 llvm/include/llvm/IR/Instructions.h                |    1 +
 llvm/include/llvm/IR/IntrinsicsAMDGPU.td           |   24 +-
 llvm/include/llvm/IR/Type.h                        |    1 +
 llvm/include/llvm/MC/MCContext.h                   |   15 -
 llvm/include/llvm/MCA/HardwareUnits/LSUnit.h       |    2 +-
 llvm/include/llvm/Support/AMDHSAKernelDescriptor.h |    1 +
 llvm/include/llvm/Support/ScalableSize.h           |   43 +
 .../Vectorize/LoopVectorizationLegality.h          |   16 +-
 llvm/lib/Analysis/MemorySSAUpdater.cpp             |   30 +-
 llvm/lib/Analysis/ScalarEvolution.cpp              |   44 +-
 llvm/lib/Analysis/TargetTransformInfo.cpp          |   14 +
 llvm/lib/AsmParser/LLLexer.cpp                     |    1 +
 llvm/lib/AsmParser/LLParser.cpp                    |   13 +-
 llvm/lib/AsmParser/LLToken.h                       |    1 +
 llvm/lib/BinaryFormat/Dwarf.cpp                    |    3 +
 llvm/lib/Bitcode/Reader/BitcodeReader.cpp          |    6 +-
 llvm/lib/Bitcode/Writer/BitcodeWriter.cpp          |    5 +-
 llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp   |    3 +
 llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp    |    3 +
 llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h      |    2 +
 llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp     |   92 +-
 llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp       |   33 +-
 llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp  |    4 +-
 llvm/lib/CodeGen/GlobalISel/Legalizer.cpp          |    4 +-
 llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp    |    3 +-
 llvm/lib/CodeGen/GlobalISel/Localizer.cpp          |  223 ++-
 llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp      |    1 -
 llvm/lib/CodeGen/MachineVerifier.cpp               |   29 +
 llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h      |    1 +
 .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp   |   23 +
 llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp   |    9 +
 llvm/lib/IR/AsmWriter.cpp                          |    5 +-
 llvm/lib/IR/DebugInfoMetadata.cpp                  |    6 +-
 llvm/lib/IR/LLVMContextImpl.h                      |    2 +-
 llvm/lib/IR/Type.cpp                               |   13 +-
 llvm/lib/IR/Verifier.cpp                           |   35 +
 llvm/lib/MC/MCContext.cpp                          |    8 -
 .../Target/AArch64/AArch64InstructionSelector.cpp  |  160 +-
 .../Target/AArch64/AArch64TargetTransformInfo.h    |    4 +
 llvm/lib/Target/AMDGPU/AMDGPU.h                    |   11 +-
 llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp        |   16 +-
 llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp      |   85 ++
 .../Target/AMDGPU/AMDGPUInstructionSelector.cpp    |  190 ++-
 llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h |    2 +
 llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp          |   70 +-
 llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp     |   14 +-
 .../Target/AMDGPU/AMDGPUPropagateAttributes.cpp    |  336 +++++
 llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp  |   74 +-
 llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp     |   22 +-
 llvm/lib/Target/AMDGPU/AMDKernelCodeT.h            |    8 +-
 .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp    |   32 +
 llvm/lib/Target/AMDGPU/CMakeLists.txt              |    1 +
 llvm/lib/Target/AMDGPU/DSInstructions.td           |    6 +-
 llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp           |    2 +-
 llvm/lib/Target/AMDGPU/GCNRegPressure.cpp          |    7 +-
 llvm/lib/Target/AMDGPU/GCNRegPressure.h            |   47 +
 llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp        |   28 +-
 llvm/lib/Target/AMDGPU/GCNSchedStrategy.h          |    3 +
 .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp   |    4 +
 llvm/lib/Target/AMDGPU/SIFoldOperands.cpp          |   60 +-
 llvm/lib/Target/AMDGPU/SIISelLowering.cpp          |   18 +
 llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp        |   28 +-
 llvm/lib/Target/AMDGPU/SIInstrInfo.cpp             |   58 +-
 llvm/lib/Target/AMDGPU/SIInstrInfo.h               |   13 +-
 llvm/lib/Target/AMDGPU/SIInstructions.td           |    7 +
 llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h     |   37 +-
 llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp          |    7 +-
 llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp    |    7 +
 llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp |   23 +
 llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h   |    4 +
 llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h  |    1 +
 llvm/lib/Target/AMDGPU/VOP2Instructions.td         |    4 +-
 llvm/lib/Target/ARM/ARM.h                          |    1 +
 llvm/lib/Target/ARM/ARMBaseInstrInfo.h             |   24 +-
 llvm/lib/Target/ARM/ARMInstrMVE.td                 |  441 +++---
 llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp     |   49 +-
 .../Target/ARM/Disassembler/ARMDisassembler.cpp    |   12 +-
 llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp          |   90 +-
 llvm/lib/Target/RISCV/RISCVISelLowering.cpp        |   18 +-
 llvm/lib/Target/RISCV/RISCVMCInstLower.cpp         |    3 +
 llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h        |    1 +
 llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp       |   10 +-
 .../Target/X86/MCTargetDesc/X86InstComments.cpp    |    6 +
 llvm/lib/Target/X86/X86FastISel.cpp                |   18 +-
 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp            |  246 ++--
 llvm/lib/Target/X86/X86ISelLowering.cpp            |   77 +-
 llvm/lib/Target/X86/X86InstrAVX512.td              |   90 +-
 llvm/lib/Target/X86/X86InstrCompiler.td            |   12 +-
 llvm/lib/Target/X86/X86InstrFoldTables.cpp         |   24 +-
 llvm/lib/Target/X86/X86InstrInfo.cpp               |   56 +-
 llvm/lib/Target/X86/X86InstrSSE.td                 |  164 +--
 llvm/lib/Target/X86/X86InstructionSelector.cpp     |   20 +-
 llvm/lib/Target/X86/X86TargetTransformInfo.cpp     |   35 +
 llvm/lib/Target/X86/X86TargetTransformInfo.h       |    2 +
 .../Transforms/InstCombine/InstCombineCalls.cpp    |   24 +
 .../Instrumentation/HWAddressSanitizer.cpp         |   73 +-
 llvm/lib/Transforms/Scalar/EarlyCSE.cpp            |    9 +-
 llvm/lib/Transforms/Scalar/IndVarSimplify.cpp      |  103 +-
 llvm/lib/Transforms/Utils/SimplifyCFG.cpp          |   64 +-
 .../Vectorize/LoopVectorizationLegality.cpp        |   32 +
 llvm/lib/Transforms/Vectorize/LoopVectorize.cpp    |    2 +-
 .../Analysis/MemorySSA/loop-rotate-inv-template.ll |   27 +
 llvm/test/Analysis/MemorySSA/update_unroll.ll      |   51 +
 llvm/test/Assembler/diexpression.ll                |    6 +-
 llvm/test/Bitcode/compatibility.ll                 |    4 +
 .../AArch64/GlobalISel/arm64-irtranslator.ll       |   28 +
 .../GlobalISel/legalizer-info-validation.mir       |    2 +-
 .../AArch64/GlobalISel/localizer-arm64-tti.ll      |   62 +
 llvm/test/CodeGen/AArch64/GlobalISel/localizer.mir |   87 ++
 .../CodeGen/AArch64/GlobalISel/opt-fold-cmn.mir    |  291 ++++
 .../prelegalizercombiner-extending-loads.mir       |    2 +
 .../test/CodeGen/AArch64/dbg-declare-tag-offset.ll |   47 +
 .../CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir |   59 +-
 .../CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir |  309 ++++
 .../GlobalISel/irtranslator-fast-math-flags.ll     |   31 +
 .../irtranslator-readnone-intrinsic-callsite.ll    |   21 +
 .../CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir    |   30 +
 .../regbankselect-amdgcn-s-buffer-load.mir         |   20 +-
 .../GlobalISel/regbankselect-amdgcn.div.scale.mir  |   67 +
 .../CodeGen/AMDGPU/constant-fold-mi-operands.ll    |    4 +-
 llvm/test/CodeGen/AMDGPU/fold-readlane.mir         |  250 ++++
 llvm/test/CodeGen/AMDGPU/gws-hazards.mir           |  103 ++
 .../AMDGPU/hsa-metadata-kernel-code-props-v3.ll    |   14 +-
 .../CodeGen/AMDGPU/hsa-metadata-wavefrontsize.ll   |   14 +
 llvm/test/CodeGen/AMDGPU/insert-skips-gws.mir      |   59 +
 .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll   |  179 +++
 .../test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll |  119 ++
 .../CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll    |   50 +-
 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll   |   46 +-
 .../CodeGen/AMDGPU/llvm.amdgcn.wavefrontsize.ll    |   84 ++
 llvm/test/CodeGen/AMDGPU/nop-data.ll               |    2 +-
 .../test/CodeGen/AMDGPU/promote-alloca-lifetime.ll |   28 +-
 .../propagate-attributes-bitcast-function.ll       |   23 +
 .../CodeGen/AMDGPU/propagate-attributes-clone.ll   |   87 ++
 .../AMDGPU/propagate-attributes-single-set.ll      |   72 +
 llvm/test/CodeGen/AMDGPU/s_addk_i32.ll             |    7 +-
 llvm/test/CodeGen/AMDGPU/s_code_end.ll             |   94 +-
 llvm/test/CodeGen/AMDGPU/s_mulk_i32.ll             |    4 +-
 llvm/test/CodeGen/AMDGPU/sopk-compares.ll          |    4 +-
 llvm/test/CodeGen/AMDGPU/sub.i16.ll                |    4 +-
 llvm/test/CodeGen/AMDGPU/subvector-test.mir        |   37 +
 .../CodeGen/AMDGPU/tail-duplication-convergent.ll  |   48 +
 llvm/test/CodeGen/ARM/mve-vpt-block.mir            |    6 +-
 llvm/test/CodeGen/MIR/X86/memory-operands.mir      |    6 +-
 llvm/test/CodeGen/PowerPC/legalize-vaarg.ll        |   52 +
 llvm/test/CodeGen/RISCV/calls.ll                   |  124 ++
 llvm/test/CodeGen/SystemZ/int-add-18.mir           |   20 +
 .../CodeGen/X86/GlobalISel/select-fconstant.mir    |   40 +-
 llvm/test/CodeGen/X86/evex-to-vex-compress.mir     |   20 +-
 llvm/test/CodeGen/X86/fast-isel-fneg-kill.ll       |    2 +-
 llvm/test/CodeGen/X86/legalize-vaarg.ll            |   79 +
 .../CodeGen/X86/merge-consecutive-stores-nt.ll     |  300 ++--
 llvm/test/CodeGen/X86/non-value-mem-operand.mir    |    6 +-
 llvm/test/CodeGen/X86/nontemporal-2.ll             |   12 +-
 llvm/test/CodeGen/X86/nontemporal-3.ll             | 1529 ++++++++++----------
 llvm/test/CodeGen/X86/popcnt.ll                    |  646 +++++++++
 llvm/test/CodeGen/X86/pr30821.mir                  |   18 +-
 llvm/test/CodeGen/X86/promote.ll                   |   10 +-
 .../HWAddressSanitizer/dbg-declare-tag-offset.ll   |   50 +
 .../Instrumentation/HWAddressSanitizer/prologue.ll |    7 +-
 llvm/test/MC/AMDGPU/hsa-diag-v3.s                  |   41 +
 llvm/test/MC/AMDGPU/hsa-gfx10-v3.s                 |  223 +++
 llvm/test/MC/AMDGPU/{hsa.s => hsa-gfx10.s}         |   22 +-
 llvm/test/MC/AMDGPU/hsa-wave-size.s                |   65 +
 llvm/test/MC/AMDGPU/hsa.s                          |    4 +-
 llvm/test/MC/AMDGPU/hsa_isa_version_attrs.s        |    2 +
 llvm/test/MC/ARM/mve-minmax.s                      |   58 +
 llvm/test/MC/Disassembler/ARM/mve-minmax.txt       |   48 +
 llvm/test/MachineVerifier/test_g_intrinsic.mir     |   38 +
 .../test_g_intrinsic_w_side_effects.mir            |   35 +
 llvm/test/Transforms/EarlyCSE/commute.ll           |   16 +
 .../IndVarSimplify/2011-10-27-lftrnull.ll          |    4 +-
 .../IndVarSimplify/2011-11-01-lftrptr.ll           |   10 +-
 .../Transforms/IndVarSimplify/exit_value_tests.ll  |   41 +-
 .../Transforms/IndVarSimplify/lftr-dead-ivs.ll     |    8 +-
 llvm/test/Transforms/IndVarSimplify/lftr.ll        |   33 +-
 llvm/test/Transforms/IndVarSimplify/pr39673.ll     |    4 +-
 .../InstCombine/AMDGPU/amdgcn-intrinsics.ll        |  125 ++
 .../Transforms/LoopVectorize/X86/nontemporal.ll    |  112 ++
 llvm/test/Transforms/LoopVectorize/nontemporal.ll  |   10 +-
 llvm/test/Verifier/scalable-aggregates.ll          |   27 +
 llvm/test/Verifier/scalable-global-vars.ll         |   26 +
 .../ELF/overlapping-sections-in-segments.test      |    1 +
 .../llvm-objcopy/ELF/overlapping-sections.test     |    1 +
 .../tools/llvm-objcopy/ELF/same-file-strip.test    |   26 +
 llvm/test/tools/llvm-readobj/hex-dump-multi.s      |   21 +
 llvm/test/tools/llvm-readobj/hex-dump.test         |   59 +
 llvm/test/tools/llvm-readobj/hexdump.test          |   32 -
 llvm/test/tools/llvm-readobj/print-hex.test        |   26 -
 llvm/test/tools/llvm-readobj/string-dump-multi.s   |   21 +
 llvm/test/tools/llvm-readobj/string-dump.test      |   17 +-
 llvm/tools/llvm-mca/Views/BottleneckAnalysis.cpp   |  104 +-
 llvm/tools/llvm-mca/Views/BottleneckAnalysis.h     |   53 +-
 llvm/tools/llvm-mca/llvm-mca.cpp                   |    6 +-
 llvm/tools/llvm-objcopy/CopyConfig.cpp             |   16 +-
 llvm/tools/llvm-objcopy/CopyConfig.h               |    7 +-
 llvm/tools/llvm-objcopy/llvm-objcopy.cpp           |    8 +-
 llvm/tools/llvm-objdump/llvm-objdump.cpp           |   26 +-
 llvm/tools/llvm-readobj/ObjDumper.cpp              |  209 +--
 llvm/tools/llvm-readobj/ObjDumper.h                |    6 +-
 llvm/tools/llvm-readobj/llvm-readobj.cpp           |    8 +-
 .../CodeGen/GlobalISel/LegalizerHelperTest.cpp     |   46 +
 llvm/unittests/IR/CMakeLists.txt                   |    1 +
 llvm/unittests/IR/VectorTypesTest.cpp              |  164 +++
 llvm/utils/UpdateTestChecks/asm.py                 |   69 +-
 .../secondary/clang/include/clang/Basic/BUILD.gn   |    8 -
 llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn    |    8 +-
 .../gn/secondary/compiler-rt/lib/hwasan/BUILD.gn   |    2 +
 llvm/utils/gn/secondary/compiler-rt/test/BUILD.gn  |    1 +
 llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn |    1 +
 .../CodeGen/partial_write_in_region_with_loop.ll   |    2 +-
 .../Isl/CodeGen/scev_expansion_in_nonaffine.ll     |    4 +-
 324 files changed, 11163 insertions(+), 3988 deletions(-)
 create mode 100644 clang-tools-extra/clangd/refactor/tweaks/DumpAST.cpp
 create mode 100644 clang/test/CodeGen/arm-vfp16-arguments2.cpp
 create mode 100644 clang/test/CodeGenCXX/debug-info-var-template-partial-spec.cpp
 create mode 100644 clang/test/CodeGenCXX/designated-init.cpp
 create mode 100644 compiler-rt/test/asan/TestCases/Darwin/asan-symbolize-partial-r [...]
 create mode 100644 compiler-rt/test/asan/TestCases/Darwin/asan-symbolize-partial-r [...]
 create mode 100644 compiler-rt/test/gwp_asan/double_delete.cpp
 create mode 100644 compiler-rt/test/gwp_asan/double_deletea.cpp
 create mode 100644 compiler-rt/test/gwp_asan/double_free.cpp
 delete mode 100644 compiler-rt/test/gwp_asan/dummy_test.cc
 create mode 100644 compiler-rt/test/gwp_asan/heap_buffer_overflow.cpp
 create mode 100644 compiler-rt/test/gwp_asan/heap_buffer_underflow.cpp
 create mode 100644 compiler-rt/test/gwp_asan/invalid_free_left.cpp
 create mode 100644 compiler-rt/test/gwp_asan/invalid_free_right.cpp
 create mode 100644 compiler-rt/test/gwp_asan/page_size.h
 create mode 100644 compiler-rt/test/gwp_asan/realloc.cpp
 create mode 100644 compiler-rt/test/gwp_asan/repeated_alloc.cpp
 create mode 100644 compiler-rt/test/gwp_asan/use_after_delete.cpp
 create mode 100644 compiler-rt/test/gwp_asan/use_after_deletea.cpp
 create mode 100644 compiler-rt/test/gwp_asan/use_after_free.cpp
 delete mode 100644 libcxx/test/std/containers/associative/map/map.cons/deduct.fail.cpp
 delete mode 100644 libcxx/test/std/containers/associative/map/map.cons/deduct.pass.cpp
 delete mode 100644 libcxx/test/std/containers/associative/map/map.cons/deduct_cons [...]
 delete mode 100644 libcxx/test/std/containers/associative/multimap/multimap.cons/d [...]
 delete mode 100644 libcxx/test/std/containers/associative/multimap/multimap.cons/d [...]
 delete mode 100644 libcxx/test/std/containers/associative/multimap/multimap.cons/d [...]
 create mode 100644 libcxx/test/std/utilities/variant/variant.variant/variant.assig [...]
 create mode 100644 libcxx/test/std/utilities/variant/variant.variant/variant.ctor/ [...]
 create mode 100644 llvm/include/llvm/Support/ScalableSize.h
 create mode 100644 llvm/lib/Target/AMDGPU/AMDGPUPropagateAttributes.cpp
 create mode 100644 llvm/test/Analysis/MemorySSA/loop-rotate-inv-template.ll
 create mode 100644 llvm/test/Analysis/MemorySSA/update_unroll.ll
 create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/localizer-arm64-tti.ll
 create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-cmn.mir
 create mode 100644 llvm/test/CodeGen/AArch64/dbg-declare-tag-offset.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fast-math-flags.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-readnone-intri [...]
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.scale.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/fold-readlane.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/gws-hazards.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/hsa-metadata-wavefrontsize.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/insert-skips-gws.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wavefrontsize.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/propagate-attributes-bitcast-function.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/propagate-attributes-clone.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/propagate-attributes-single-set.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/subvector-test.mir
 create mode 100644 llvm/test/CodeGen/PowerPC/legalize-vaarg.ll
 create mode 100644 llvm/test/CodeGen/SystemZ/int-add-18.mir
 create mode 100644 llvm/test/CodeGen/X86/legalize-vaarg.ll
 create mode 100644 llvm/test/Instrumentation/HWAddressSanitizer/dbg-declare-tag-offset.ll
 create mode 100644 llvm/test/MC/AMDGPU/hsa-gfx10-v3.s
 copy llvm/test/MC/AMDGPU/{hsa.s => hsa-gfx10.s} (91%)
 create mode 100644 llvm/test/MC/AMDGPU/hsa-wave-size.s
 create mode 100644 llvm/test/MachineVerifier/test_g_intrinsic.mir
 create mode 100644 llvm/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir
 create mode 100644 llvm/test/Transforms/LoopVectorize/X86/nontemporal.ll
 create mode 100644 llvm/test/Verifier/scalable-aggregates.ll
 create mode 100644 llvm/test/Verifier/scalable-global-vars.ll
 create mode 100644 llvm/test/tools/llvm-objcopy/ELF/same-file-strip.test
 create mode 100644 llvm/test/tools/llvm-readobj/hex-dump-multi.s
 create mode 100644 llvm/test/tools/llvm-readobj/hex-dump.test
 delete mode 100644 llvm/test/tools/llvm-readobj/hexdump.test
 delete mode 100644 llvm/test/tools/llvm-readobj/print-hex.test
 create mode 100644 llvm/test/tools/llvm-readobj/string-dump-multi.s
 create mode 100644 llvm/unittests/IR/VectorTypesTest.cpp
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[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig updated (1f50697abc7 -> faaf1a53663)