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from 321cee7e29d Daily bump. new 8bdfa8a67a5 RISC-V: Support RVV zvfh{min} vfloat16*_t mov and spill
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Summary of changes: gcc/config/riscv/riscv-vector-builtins-types.def | 7 ++ gcc/config/riscv/riscv.md | 1 + gcc/config/riscv/vector-iterators.md | 25 +++++ gcc/config/riscv/vector.md | 35 +++++++ gcc/testsuite/gcc.target/riscv/rvv/base/mov-14.c | 81 ++++++++++++++++ gcc/testsuite/gcc.target/riscv/rvv/base/spill-13.c | 108 +++++++++++++++++++++ 6 files changed, 257 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/mov-14.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/spill-13.c