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from d19bba6122b [FIX][AArch64] Add support for UDF instruction new 895148a2801 [DAGCombiner] narrow vector binops when extraction is cheap
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Summary of changes: lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 41 +++++++++---- test/CodeGen/X86/2012-04-26-sdglue.ll | 20 +++---- test/CodeGen/X86/avx-logic.ll | 32 +++++----- test/CodeGen/X86/avx-vzeroupper.ll | 12 ++-- test/CodeGen/X86/avx512-hadd-hsub.ll | 56 ++++++++--------- test/CodeGen/X86/avx512-insert-extract.ll | 8 +-- test/CodeGen/X86/avx512-skx-insert-subvec.ll | 4 +- test/CodeGen/X86/known-signbits-vector.ll | 12 +--- test/CodeGen/X86/madd.ll | 36 +++++------ test/CodeGen/X86/min-legal-vector-width.ll | 8 +-- test/CodeGen/X86/sad.ll | 22 +++---- test/CodeGen/X86/shrink_vmul.ll | 4 +- test/CodeGen/X86/vec_int_to_fp.ll | 36 ++++------- test/CodeGen/X86/vector-compare-all_of.ll | 16 ++--- test/CodeGen/X86/vector-compare-any_of.ll | 16 ++--- test/CodeGen/X86/vector-reduce-add.ll | 48 +++++++-------- test/CodeGen/X86/vector-reduce-and.ll | 72 +++++++++++----------- test/CodeGen/X86/vector-reduce-fadd-fast.ll | 90 ++++++++++------------------ test/CodeGen/X86/vector-reduce-fmul-fast.ll | 90 ++++++++++------------------ test/CodeGen/X86/vector-reduce-mul.ll | 60 +++++++++---------- test/CodeGen/X86/vector-reduce-or.ll | 72 +++++++++++----------- test/CodeGen/X86/vector-reduce-xor.ll | 72 +++++++++++----------- test/CodeGen/X86/vector-rotate-256.ll | 12 ++-- test/CodeGen/X86/vector-rotate-512.ll | 16 ++--- 24 files changed, 387 insertions(+), 468 deletions(-)