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from 95440171d0e c: Avoid _BitInt indexes > sizetype in ARRAY_REFs [PR113315] new ace4b8e7f9e arm: vld1q_types_x2 ACLE intrinsics new c8ec3e1327c arm: vld1q_types_x3 ACLE intrinsics new 84d713f6f45 arm: vld1q_types_x4 ACLE intrinsics new 2bd944af545 arm: vst1_types_x2 ACLE intrinsics new f06c6ad3174 arm: vst1_types_x3 ACLE intrinsics new 221912d34ee arm: vst1_types_x4 ACLE intrinsics new ccf041daa73 arm: vst1q_types_x2 ACLE intrinsics new 2a0e91d6c1a arm: vst1q_types_x3 ACLE intrinsics new a52fdae91d4 arm: vst1q_types_x4 ACLE intrinsics new d2b4ec9ea3f arm: vld1_types_x2 ACLE intrinsics new 4b887e59ace arm: vld1_types_x3 ACLE intrinsics new 9dadc9ccdda arm: vld1_types_x4 ACLE intrinsics
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Summary of changes: gcc/config/arm/arm_neon.h | 2032 +++++++++++++++++--- gcc/config/arm/arm_neon_builtins.def | 12 + gcc/config/arm/iterators.md | 6 + gcc/config/arm/neon.md | 249 +++ gcc/config/arm/unspecs.md | 8 + gcc/testsuite/gcc.target/arm/simd/vld1_base_xN_1.c | 176 ++ gcc/testsuite/gcc.target/arm/simd/vld1_bf16_xN_1.c | 23 + gcc/testsuite/gcc.target/arm/simd/vld1_fp16_xN_1.c | 23 + gcc/testsuite/gcc.target/arm/simd/vld1_p64_xN_1.c | 23 + .../gcc.target/arm/simd/vld1q_base_xN_1.c | 183 ++ .../gcc.target/arm/simd/vld1q_bf16_xN_1.c | 24 + .../gcc.target/arm/simd/vld1q_fp16_xN_1.c | 24 + gcc/testsuite/gcc.target/arm/simd/vld1q_p64_xN_1.c | 24 + gcc/testsuite/gcc.target/arm/simd/vst1_base_xN_1.c | 176 ++ gcc/testsuite/gcc.target/arm/simd/vst1_bf16_xN_1.c | 22 + gcc/testsuite/gcc.target/arm/simd/vst1_fp16_xN_1.c | 23 + gcc/testsuite/gcc.target/arm/simd/vst1_p64_xN_1.c | 23 + .../gcc.target/arm/simd/vst1q_base_xN_1.c | 185 ++ .../gcc.target/arm/simd/vst1q_bf16_xN_1.c | 24 + .../gcc.target/arm/simd/vst1q_fp16_xN_1.c | 24 + gcc/testsuite/gcc.target/arm/simd/vst1q_p64_xN_1.c | 24 + 21 files changed, 3018 insertions(+), 290 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arm/simd/vld1_base_xN_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vld1_bf16_xN_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vld1_fp16_xN_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vld1_p64_xN_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vld1q_bf16_xN_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vld1q_fp16_xN_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vld1q_p64_xN_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vst1_base_xN_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vst1_bf16_xN_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vst1_fp16_xN_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vst1_p64_xN_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vst1q_base_xN_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vst1q_bf16_xN_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vst1q_fp16_xN_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vst1q_p64_xN_1.c