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from 282d793c8d7 [DAGCombiner] Simplify test case from r348759 new b167de5e721 [llvm-mca] Add new tests for Exynos (NFC) new 67ce34f4c82 [AMDGPU] Add new Mode Register pass - minor fix new e9458697d15 [AArch64] Refactor the scheduling predicates
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Summary of changes: lib/Target/AArch64/AArch64SchedPredicates.td | 386 +++++++++++++++++---- lib/Target/AMDGPU/SIModeRegister.cpp | 2 +- .../llvm-mca/AArch64/Exynos/extended-register.s | 58 ++++ .../llvm-mca/AArch64/Exynos/register-offset.s | 46 +++ .../llvm-mca/AArch64/Exynos/shifted-register.s | 46 +++ 5 files changed, 476 insertions(+), 62 deletions(-) create mode 100644 test/tools/llvm-mca/AArch64/Exynos/extended-register.s create mode 100644 test/tools/llvm-mca/AArch64/Exynos/register-offset.s create mode 100644 test/tools/llvm-mca/AArch64/Exynos/shifted-register.s