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from 82ef6d6 [AVR] Enable generation of the TableGen assembly writer tables new a6c37a9 [x86][inline-asm][llvm] accept 'v' constraint
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Summary of changes: lib/Target/X86/X86ISelLowering.cpp | 15 +++ .../X86/inline-asm-avx-v-constraint-32bit.ll | 136 ++++++++++++++++++++ test/CodeGen/X86/inline-asm-avx-v-constraint.ll | 136 ++++++++++++++++++++ .../CodeGen/X86/inline-asm-avx512f-v-constraint.ll | 72 +++++++++++ .../X86/inline-asm-avx512vl-v-constraint-32bit.ll | 138 +++++++++++++++++++++ .../X86/inline-asm-avx512vl-v-constraint.ll | 121 ++++++++++++++++++ 6 files changed, 618 insertions(+) create mode 100644 test/CodeGen/X86/inline-asm-avx-v-constraint-32bit.ll create mode 100644 test/CodeGen/X86/inline-asm-avx-v-constraint.ll create mode 100644 test/CodeGen/X86/inline-asm-avx512f-v-constraint.ll create mode 100644 test/CodeGen/X86/inline-asm-avx512vl-v-constraint-32bit.ll create mode 100644 test/CodeGen/X86/inline-asm-avx512vl-v-constraint.ll