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from 30afc90 [X86][SSE] Merge SSE2 PINSRW lowering with SSE41 PINSRB/PINSR [...] new 447c100 [PowerPC] Fix sjlj pseduo instructions to use G8RC_NOX0 regis [...]
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Summary of changes: lib/Target/PowerPC/PPCInstrInfo.td | 5 +++-- test/CodeGen/PowerPC/sjlj_no0x.ll | 29 +++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+), 2 deletions(-) create mode 100644 test/CodeGen/PowerPC/sjlj_no0x.ll