[Tcwg-commits] [llvm] branch stable updated (8adfef39569 -> 70c1698fb07)

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from 8adfef39569 Updating branches/google/stable to r309660 adds c9e80fed227 [IRCE][NFC] Add assert that AddRecExpr's step is not zero adds 07e7c75eef7 [PM] Add a comment clarifying what a particular predicate i [...] adds 5c0c30bdd74 [IRCE][NFC] Add another assert that AddRecExpr's step is not zero adds 052dd78cb30 Support itineraries in TargetSubtargetInfo::getSchedInfoStr [...] adds 78f6716d995 [NFC] Remove obsolete profiling data from eq_ne test adds ca05253041c [PostDom] Fix typo in comment [NFC] adds c0ce68eb67d AMDGPU/GlobalISel: Add support for amdgpu_vs calling convention adds 1b7afc891a6 [X86] Regenerate big structure return test and check on x86 [...] adds c6a42e96ed1 [Hexagon] Convert HVX vector constants of i1 to i8 adds 16b949e997b [Mips] Fix for BBIT octeon instruction adds bb2981861c6 [DAG] Extend visitSCALAR_TO_VECTOR optimization to truncate [...] adds 645faa5ddf2 [DebugInfo] Use shrink_to_fit to simplify code. NFCI. adds 05485d71079 [PostDom] document the current handling of infinite loops a [...] adds dbe52533dc7 DebugInfo: Update flag description that'd been copypasted f [...] adds b97dd2dd484 [globalisel][tablegen] Removed unnecessary typedef pointed [...] adds e2cbc76f802 [InstCombine] Remove explicit check for impossible conditio [...] adds bf59b4ffe07 [X86] Added missing cpu to fix generic scheduling model tests adds e1059016008 [X86][SSSE3] Fix typos in pabsw/pmulhrsw tests for load fol [...] adds 2a519cbde98 [AVX-512] Don't use unmasked VMOVDQU8/16 for 8-bit or 16-bi [...] adds f6fecfacea8 [X86] Fix a crash in FEntryInserter Pass. adds ac7c13eebd3 [DAG] Move extload check in store merge. NFC. adds bba95e61a44 [X86][SSSE3] Added missing PHADDS/PHSUBS/PSIGN intrinsic schedules adds 4e3a6970073 [X86] Split bmi.ll into a bmi test and a bmi2 test. adds 42dea1205c3 [X86][SSE] Added missing PACKSS/PACKUS intrinsic schedules adds 790133a0528 [X86] Use BEXTR/BEXTRI for 64-bit 'and' with a large mask adds a8735a342e0 [DAG] Convert extload check to equivalent type check. NFC. adds 5250bac12f1 [CGP] use narrower types in memcmp expansion when possible adds 8ae6d281005 [X86][SSE] Added missing vector logic intrinsic schedules adds 9e6b2e7f9d3 [libFuzzer] temporarty remove pc-tables and disable test/fu [...] adds 8790231fa62 Revert "[DAG] Extend visitSCALAR_TO_VECTOR optimization to [...] adds 7e482e3a794 [X86][SSE3] Add scheduler tests for MONITOR/MWAIT adds b9614f55884 Pull out VectorNumElements value. NFC. adds 9cbd52dd728 [lanai] Add getIntImmCost in LanaiTargetTransformInfo. adds 3db8a6568e7 [AMDGPU] Put a function used only inside assert() under NDEBUG. adds c5f425b201b [Value Tracking] Refactor and/or logic into helper. NFC. adds a68b470abaa [DebugInfo] Don't turn dbg.declare into DBG_VALUE for stati [...] adds 43950949ad8 AMDGPU: Initial implementation of calls adds ff9e21161dc AMDGPU: Add test for r308774 adds 0d8a77755a7 [Value Tracking] Default argument to true and rename accord [...] adds 68a49615cae [DAG] Factor out common expressions. NFC. adds f9a65f9c7e9 AMDGPU: Fix handling of div_scale with undef inputs adds 39bec211f05 [AArch64] Rewrite stack frame handling for win64 vararg functions adds e08253200c9 [Hexagon] Fix some Clang-tidy modernize-use-using and Inclu [...] adds e72b881e286 [llvm-cov] Allow specifying distinct architectures for each [...] adds fbbab58fac7 [AArch64] Fix a typo in isExtFreeImpl() adds 2cd77a84868 Remove PrologEpilogInserter's usage of DBG_VALUE's offset field adds b0a0439255a PowerPC: Do not use llc -march in tests. adds fe7581c1d14 ARM: Do not use llc -march in tests. adds 68109d5dcfe Use helper function instead of manually constructing DBG_VA [...] adds 2d38e17cd05 [SCEV/IndVars] Always compute loop exiting values if the ba [...] adds 6aacb6c808d Assert that the offset of a MachineLocation is always 0. Th [...] adds 5b53ac928df [AMDGPU] Collapse adjacent SI_END_CF adds 88d9e5d6147 Remove unused accessor (NFC) adds 3499304a9a9 [AMDGPU] Turn s_and_saveexec_b64 into s_and_b64 if result i [...] adds d6fd4b09af6 Reland "[llvm][llvm-objcopy] Added support for outputting t [...] adds 9b08f328ab9 Update MIR testcase to reflect change in r309751. adds 5f53af36171 Revert "Reland "[llvm][llvm-objcopy] Added support for outp [...] adds cc3f143b8d5 Update LiveDebugValues to generate DIExpressions for spill [...] adds 3a6f6d93bf9 X86: Do not use llc -march in tests. adds 6e8db40d650 DAG: Undo and->or combine with FrameIndexes adds 01ddaaf5088 AMDGPU: Don't place arguments in emergency stack slot adds f5ed40bd2c8 [DAG] Refactor store merge subexpressions. NFC. adds dbd873dceb6 [AMDGPU] Fix asan error after last commit adds cbd284128f6 Update the new PM pipeline to make ICP aware if it is Sampl [...] adds 23e59ddf6d1 AMDGPU: Analyze callee resource usage in AsmPrinter adds 5474c6d8df7 AMDGPU: Fix emitting encoded calls adds 6023e68daed AMDGPU: Fix clobbering CSR VGPRs when spilling SGPR to it adds 759393be2d5 [PM] Fix a bug where through CGSCC iteration we can get inf [...] adds f7a9c73f745 [SimplifyCFG] Fix typo in comment. NFC adds b929c3e6e4f Fix the bug that parseAAPipeline is not invoked in runNewPM [...] adds 0c5b2b5297b [NewGVN] Remove a (now stale) comment. NFCI. adds 4b606092e93 [NewGVN] Fold single-use variables. NFCI. adds fb0e1f524b5 [InstCombine] Add test cases for 'or' and 'xor' to match th [...] adds e36182d580b [globalisel][tablegen] Do not merge memoperands from instru [...] adds bb326e25264 [MIR] Print target-specific constant pools adds b51029d1f12 [SLP] Fix for PR31880: shuffle and vectorize repeated scala [...] adds e764b9b3dc2 [SLPVectorizer] Test update, NFC. adds 340067cec49 [SLPVectorizer] Generalize interface of functions, NFC. adds e279499faf9 [InlineCost] Simplify more 'and' and 'or' operations. adds 1c11c833ab2 Assert that the offset in MachineLocation::set() is always [...] adds 7ab6937c028 [InlineCost] Remove redundant call. NFC. adds 1ce4e2320bd [AArch64] Simplify AES*Tied pseudo expansion (NFC). adds c334e7d9ca1 Remove unreachable code. (NFC) adds 8c82257cde3 Remove unused includes of MachineLocation.h (NFC) adds 749993640bf [AArch64] Improve the test of conditional branch fusion adds 29e9cdbd0d7 [DAG] Improve candidate pruning in store merge failure case. NFCI adds 810c1b6a3cc Remove the unused Offset field from MachineLocation (NFC) adds 981b5410cc1 AMDGPU: Restore using MRI to find highest used regs adds 5db8114aeaa Revert "[lit] Avoid copying llvm/utils/lit/tests/Inputs wit [...] adds c4d94abf28c Assert that the offset of a DBG_VALUE is always 0. (NFC) adds e97c5836a77 Xray docs with description of Flight Data Recorder binary format. adds dbf7ec5b15a [InstCombine] Add missing test case for (xor (sext (cmp)), [...] adds fac03ed36c7 [AsmParser][GAS-compatibility] Ignore an empty 'p2align' directive adds 3e9e87e5eab Revert "Xray docs with description of Flight Data Recorder [...] adds f49a9812117 [StackColoring] Update AliasAnalysis information in stack c [...] adds 95e74fa2386 [Dominators] Teach LoopDeletion to use the new incremental API adds 7fee9f87f42 [AArch64] Add Exynos M2 feature test (NFC) adds 82f73ee5b37 [NewGVN] Now that load coercion is enable, we pass this test. adds 07635d3971a [Power9] Exploit vector absolute difference instructions on [...] adds 61dba579bef DebugInfo: Test & handle (differently) non-zero DW_AT_ranges_base adds 80b5f5982af [InstCombine] Support sext in foldLogicCastConstant adds 43b62b6cb88 [InstCombine] Remove explicit code for folding (xor(zext(cm [...] adds 2600a677c98 Don't pass the code model to MC adds 99dd11f7e8f [PM] Split LoopUnrollPass and make partial unroller a funct [...] adds ef45a1fe1b8 [InstCombine] Remove unnecessary temporary APInt. NFCI adds 6795f26af55 [libFuzzer tests] Use substring comparison in libFuzzer tests adds c8df92092df LV: Don't insert runtime ptr checks on divergent targets adds 630a4acf814 Xray docs with description of Flight Data Recorder binary format. adds cd14d227ff2 AMDGPU/R600: Initialize more passes adds 34173def44a [pdbutil] Add a command to dump the FPM. adds 11625a0d5e4 [MSF] Move MSF unit tests to their own unittest target. adds 50b0dc9e5b9 [pdb/lld] Write a valid FPM. adds 58dd3a3775e AMDGPU/GlobalISel: Mark 32-bit G_FMUL as legal adds 51c47348285 Revert "[libFuzzer tests] Use substring comparison in libFu [...] adds f6b53455dfc [llvm-cov] Respect the value of the -show-instantiations option adds a8dfa81a141 [Coverage] Add an API to retrive all instantiations of a fu [...] adds c563b0447be Rely on autobrief, remove \briefs from a header. NFC. adds d7247b5f8fe Move two functions to a nicer spot. NFC. adds ca9f2fdb192 Fix the bug when SampleProfileWriter writes out number of c [...] adds 65d41d82355 [ARM] Tidy up banked registers encoding adds 9aafb854cc7 Delete Default and JITDefault code models adds 37ca700397a [RegisterCoalescer] Add wrapper for Erasing Instructions adds cec5ec447c1 Add LLVM_FALLTHROUGH. adds 98bb5a4f2ad [unittest] Remove TODO comment which caused concern adds a3b37112920 Fix the ppc jit tests. adds dfd6a10efb6 Fix WebAssembly target after r309911. adds 0e06563a628 [ARM] Use ADDCARRY / SUBCARRY adds daeea6f68d6 [globalisel][tablegen] Update a comment to use the name of [...] adds 511c1a306c8 [SCEV] Re-enable "Cache results of computeExitLimit" adds 47af16ef512 [X86] SET0 to use XMM registers where possible PR26018 PR32862 adds 14dbdbf7e41 [ARM] GlobalISel: Select simple G_GLOBAL_VALUE instructions adds 6eeae175e1c [Cloning] Move distinct GlobalVariable debug info metadata [...] adds f133b32f8e8 Removed unused variabled from unit test adds 441e1a2fef4 [SelectionDAG] Resolve PR33978. adds dd3b410ff32 llvm/Support/CodeGenCWrappers.h: Add missing "llvm/ADT/Opti [...] adds 7b9531eb3a4 Prune linefeed at eof. adds b587c9efc5e [LiveDebugVariables] Use lexical scope to trim debug value [...] adds c580a5c5dba [GlobalISel] Only merge memory ops for mayLoad or mayStore instrs. adds 34ac720fa28 [BDCE] add tests to show invalid/incomplete transforms adds 9360b2e1ac3 [NewGVN] fix typos; NFC adds 53e7817cd80 [TableGen] AsmMatcher: fix OpIdx computation when HasOption [...] adds 4247581cf26 Revert r309923, it caused PR34045. adds b6b032495a4 [DAG] Allow merging of stores of vector loads adds 61e4e61f04c Fix use after free in unit test. adds d865f4ba1b0 AMDGPU/SI: Don't fix a PHI under uniform branch in SIFixSGP [...] adds a162bccc8d2 [X86][AVX512] Tidied up v64i8 vector shuffle tests with triple adds c984bb052f3 Revert "[AArch64] Simplify AES*Tied pseudo expansion (NFC)." adds 5c7ada73483 [X86] Adding a test for vector shuffle extractions. adds b65c3a989fd Do not want to use BFI to get profile count for sample pgo adds aebcb9ce1d0 Disable loop peeling during full unrolling pass. adds 123eabac1fb Fix check-lit compatibility with multi-config CMake generators adds cdfc174d230 Fix llvm-for-windows-on-linux build after LLVM r272701. adds 6615aeaf28d test commit adds 48c84d8de63 [libFuzzer] Un-reverting change in tests after fixing the f [...] adds c593673c880 [llvm-pdbutil] Allow diff to force module equivalencies. adds 357013f05ef Move unit test to the proper location adds a75318a16e5 [LVI] Constant-propagate a zero extension of the switch con [...] adds 63c839af681 [PDB] Fix section contributions adds 0d362a25a44 [NewGVN] Fix the case where we have a phi-of-ops which goes away. adds f6eeaf64bbd [GlobalISel] Make GlobalISel a non-optional library. adds 4bcb1039534 DAG: Provide access to Pass instance from SelectionDAG adds a107abea4aa [Mips] Fix some Clang-tidy modernize-use-using and Include [...] adds 2bbed02c0b2 [Inliner] Increase threshold for hot callsites without PGO. adds c8c75789a0e AMDGPU: Add analysis pass for function argument info adds 6b658aae964 Fix typo. adds c60159767dc AMDGPU: Pass special input registers to functions adds 7f318aee571 [llvm-pdbutil] Add an option to only dump specific module indices. adds 25237b0bdef Support: WOA64 and WOA Signals adds 688929ea0f3 AMDGPU: Fix implicitarg.ptr handling special inputs adds dfb2cfedfcc AMDGPU: Remove error on calls for amdgcn adds 0856e7acd5f AMDGPU: Don't use report_fatal_error for unsupported call types adds dad922aba23 Use profile summary to disable peeling for huge working sets adds dbc0730a1e5 AMDGPU: Remove pointless asserts adds 4bc3e833018 Revert "[TableGen] AsmMatcher: fix OpIdx computation when H [...] adds ca0f9bbbd85 Disable libFuzzer tests on Windows adds 0f0fd421927 [llvm-cov] NFC: make_unique-ify two allocations adds c7e789c8430 [llvm-cov] Ignore unclosed line segments when setting line counts adds 1a05d247fa7 [AMDGPU] Add missing hazard for DPP-after-EXEC-write adds f413d6c7a3b Teach GlobalSRA to update the debug info for split-up globals. adds 89c78d2b591 [Support] Update comments about stdout, raw_fd_ostream, and outs() adds cff44d51e8b Reland "[llvm][llvm-objcopy] Added support for outputting t [...] adds dbdaecd1134 Revert r310014 as it breaks build lld-x86_64-darwin13 adds e9c33c9ee0c Un-revert r310014: false revert, it wasn't the cause of bui [...] adds 2801a44d3fc Prevent unused warning in non-assert builds (introduced in [...] adds 3dadee38546 Fix SCEVExitLimitForget tests to make Sanitizer happy adds 28374e93344 [InstCombine] Remove unnecessary casts. NFC adds 0852af30cb1 [InstCombine] Move the call to foldSelectICmpAnd into foldS [...] adds e307afaedb4 Revert "[llvm][llvm-objcopy] Added support for outputting t [...] adds 0114fa18c0e [IRCE] Recognize loops with unsigned latch conditions adds 3acb6cc980d [AVR] Update target machine to use new constructor parameters adds 58d552619fa Avoid comparison between signed and unsigned in SCEVExitLim [...] adds 6069fa8531d [AMDGPU] Preserve inverted bit in SI_IF in presence of SI_KILL adds 9a16b8eafb1 [IRCE] Handle loops with step different from 1/-1 adds b7e74df94f8 Do not declare a variable which is used only in assert. NFC adds 389880910a2 [Polly][PM] Register polly passes with the opt tool for the [...] adds 9f963413727 [mips][microMIPS] Extending size reduction pass with ADDIUS [...] adds 35b05a20338 [AMDGPU] Fixed MSVC build break adds 8a7f23753e3 Add some tests for cast+clamp/min/max before D33186. adds 406ae0691e5 [InstCombine] Canonicalize clamp of float types to minmax i [...] adds f27bcb0a8e7 [DSE] Merge stores when the later store only writes to memo [...] adds c5cebfc196b [DAGCombiner] Extending pattern detection for vector shuffle. adds 13725274b07 [AMDGPU][MC] Enabled expressions as operands adds 4e29225d159 [InstCombine] narrow lshr with constant adds 4c314d6d301 [ThinLTO] Add FunctionAttrs to ThinLTO index adds 19f5e627c38 [InstCombine] Use ConstantInt::getFalse to reduce some code. NFC adds 582a2bb8aff [InstCombine] Remove the (not (sext)) case from foldBoolSex [...] adds 201cf7ea262 [InstCombine] Fold single-use variable into assert. adds 16768cea344 Adjust the hotness threshold from 99.9% to 99%. adds ad5495ac8c2 [AArch64] Fix an assertion for pre-index generation with un [...] adds e2caf82c168 [ConstantInt] Use ConstantInt::getValue instead of Constant [...] adds c7429cbd063 [ArgPromotion] Preserve alignment of byval argument in new alloca adds b20675f7961 [ARM] Use searchable-table for banked registers adds f4bea569899 [Inliner] Fix a typo in option description. NFC. adds 32fab3343b1 Port libFuzzer tests to LIT. Do not require two-stage build [...] adds dd5a2532737 Drop Windows support from libFuzzer tests. adds e22da6aaf16 Fixing buildbots: do not register check-fuzzer if clang or [...] adds 0e5ac4b910d [Support] Remove getPathFromOpenFD, it was unused adds 3b0297768d9 [MachineOperand] Add ChangeToTargetIndex method. NFC adds 7af89e579da [AMDGPU] Add an llvm.amdgcn.wqm intrinsic for WQM adds 6ba48659282 [AMDGPU] refactor WQM pass in preparation for WWM (NFCI) adds ecf573917ab [AMDGPU] Add support for Whole Wavefront Mode adds c300b1a6d37 [AMDGPU] Implement llvm.amdgcn.set.inactive intrinsic adds abc4b62a7d0 [libFuzzer] make trace-pc.test more reliable adds cb6d1820b8f Fix PR33514 adds 48ff7cfe277 [SystemZ] Eliminate unnecessary serialization operations adds e6a2101d1d2 [SystemZ] Add support for 128-bit atomic load/store/cmpxchg adds ba96863e68b [libFuzzer tests] Only enable libFuzzer tests if -DLIBFUZZE [...] adds 1b307569a67 [InstCombine] auto-generate test checks; NFC adds c4d2f876808 [libFuzzer] split one test into several adds 6c8e8aeeac2 [llvm-pdbutil] Dump image section headers. adds 6a3fa85472c [libFuzzer] remove the now redundant 'LLVMFuzzer-' prefix f [...] adds 369072e5441 [libFuzzer] make a test more robust adds 3fbb046df61 [GlobalISel] Remove a stall comment in CMake. adds f646c276318 [GlobalISel] Remove the GISelAccessor API. adds edab1e126cf [SCEV] Preserve NSW information for sext(subtract). adds 5b11a64fa00 Revert r310058, it caused PR34073. adds 310c521bc42 [InstCombine] add vector tests for truncated math; NFC adds 4aabf12607f Revert r310055, it caused PR34074. adds 645c1ad4296 Remove unused include directive and un-break the module build. adds d7f757cc823 [libFuzzer] re-enable fuzzer-printcovpcs.test adds 125fb1e9a91 Reland "[llvm][llvm-objcopy] Added support for outputting t [...] adds ebe12ac5efc [pdbutil] When dumping section contribs, show the section name. adds d3a55a8f885 BlockPlacement: add a flag to force cold block outlining w/ [...] adds 7028c653a2f Fix broken PDB tests. adds 033f8efd27b [Support] Use FILE_SHARE_DELETE to fix RemoveFileOnSignal o [...] adds 09cd7162757 [InstCombine] narrow truncated add/sub/mul with constant adds 2d30fac6e9d Enable llvm-pdbutil to list enumerations using native PDB reader adds 0b67c739d88 [libFuzzer] print PCs using the in-binary PC-table instead [...] adds fdd2cc8254c [llvm][llvm-objcopy] When outputting to binary don't output [...] adds 39007cc8d00 [X86] Regenerate the fsin/fcos instruction test using updat [...] adds dea6df77652 [libFuzzer] use the in-binary pc table (instead of PCs capt [...] adds 2b6fdd5413e [X86] Teach fastisel to select calls to dllimport functions adds b2f312fddff Commit the local change I had to make my test pass adds a64054eb616 [InstCombine] In foldSelectICmpAnd, if we need to to trunca [...] adds 854685a9f99 [LCG] Remove the use of the parent sets to compute connecti [...] adds fa104687bc7 [LCG] Remove the complex walk of the parent sets to update [...] adds e9f7200d87b [LCG] Rather than walking the directed graph structure to u [...] adds 9468df99c11 [LCG] When removing a dead function and clearing out the da [...] adds d2f3f4a06ac [LCG] Replace an implicit bool operator with a named functi [...] adds a4861e0c2b3 [AArch64] LSE Atomics reorg - part 1 adds 95f263eb86d [LCG] Add the concept of a "dead" node and use it to avoid [...] adds 8d16ccbe0f8 [LCG] Re-implement the basic isParentOf, isAncestorOf, isCh [...] adds 3ae1e28f671 [LCG] Completely remove the parent set and leaf tracking fo [...] adds e1f2d6cc65c IPRA: Don't crash on null getCallPreservedMask adds e291555dd31 [LCG] Fold otherwise unused variable into assert. adds 0b26163a3b0 [LCG] Remove yet another variable only used inside of asserts. adds d08104f67e7 [ARM] Add registers to debuginfo MIR test cases. adds d47a4f24aa5 [ARM] The ARM backend is MachineVerifier clean now. adds 1ca12abf840 [InstCombine] refactor trunc(binop) transforms; NFCI adds f24c4662b3b [SLPVectorizer] Add extra parameter to setInsertPointAfterB [...] adds 6eef5df328e [InstCombine] Support vector splats in foldSelectICmpAnd. adds c5136a32820 [InstCombine] Teach the code that pulls logical operators t [...] adds e9e9a558ffc [InstCombine] Fold (C - X) ^ signmask -> (C + signmask - X). adds 96fa22223c5 [InstCombine] Regenerate test28_sub test case in xor.ll tha [...] adds 549896a7368 [ADT] Add a much simpler loop to DenseMap::clear when the t [...] adds a8f11c10872 [X86] Enable isel to use the PAUSE instruction even when SS [...] adds 946e6ed8ac6 [InstCombine] Support ~(c-X) --> X+(-c-1) and ~(X-c) --> (- [...] adds 1256b9b46d2 [X86][X87] Add test case for PR34080 adds 5d99b15d8dc [AVR] Compute code model if one is not provided adds f8f02104796 [X86][X87] Regenerate inline-asm tests adds f47cc28d02e [X86] Add comment to match closing Defs = [FPSW]. NFCI. adds f49c4011ef9 [x86] use more shift or LEA for select-of-constants adds 4e37712e3ba AMDGPU: Fix typo in feature description adds 157c9319f62 [llvm-dlltool] Map the "arm64" machine type adds 4bd72a825d3 [SLPVectorizer][X86] Cleanup test case. NFCI adds 6b4cc4f3b52 [InstCombine] Support '(C - X) ^ signmask -> (C + signmask [...] adds dc2e525e034 [InstCombine] Support (X ^ C1) & C2 --> (X & C2) ^ (C1&C2) [...] adds 694731848f0 [InstCombine] Remove shift handling from OptAndOp. adds 02e5755a7d6 [Reassociate] Try to bail out early when canonicalizing. adds 14cde8c1932 [Reassociate] Use a range loop for clarity. NFCI. adds ab13f9b9386 [SelectionDAG] reset NewNodesMustHaveLegalTypes flag betwee [...] adds 483cdb41d22 Add -asan-force-dynamic-shadow test adds 56bb9a42a7c [asan] Disable checking of arguments passed by value for -- [...] adds 1b06abdb2cd [asan] Fix asan dynamic shadow check before copyArgsPassedB [...] adds 1103886c3dd [ARM] Fix assembly and disassembly for VMRS/VMSR adds a801c3fa924 [X86][AVX] Added test for broadcast shuffle with undefs (PR34041) adds 97d9ed0d066 [llvm-objdump] Use PRIx64 for output of ARM64_RELOC_ADDEND adds 9676036f42b [AMDGPU][MC] Corrected VOP3 version of v_interp_* instructi [...] adds f87ba7b7014 [X86][LLVM]Expanding Supports lowerInterleavedStore() in X8 [...] adds 38a5f526fd3 [DebugInfo][DWARF] Use PRIx64 explicitly in output. adds b02dd20ac22 [TableGen] AsmMatcher: fix OpIdx computation when HasOption [...] adds 4362efa895a [SLP] General improvements of SLP vectorization process. adds 22e14e2efdc [DAG] Extend visitSCALAR_TO_VECTOR optimization to truncate [...] adds 20e83eb1936 Revert "[SLP] General improvements of SLP vectorization process." adds 2e48864110d AMDGPU: Cleanup subtarget features adds aa4edb14222 Fix typo in comment adds a64c8c9af1e [SLP] General improvements of SLP vectorization process. adds a09f2fcb334 [DebugInfo][DWARF] Correct some usages of PRIx32 to PRIx64 adds f5ceedaf338 [x86] revert r310208 to investigate test-suite failures (PR [...] adds 54c7a7568e1 [X86][AVX] Cleanup subvector broadcast tests - remove old p [...] adds 7d915c62a66 [DebugInfo][DWARF] Address paulr's comment on rL310253. adds e90e1d3d183 [X86][AVX] Add full test coverage of subvector_broadcasts f [...] adds a4262847c8f AMDGPU: Use a custom areInlineCompatible adds 4dc104b36bf [InstCombine] Support (X | C1) & C2 --> (X & C2^(C1&C2)) | [...] adds 4f81bb6abb0 AMDGPU: Remove FixControlFlowLiveIntervals pass adds f1b4625e0b2 AMDGPU: Remove redundant opt level check adds e525b474efe AMDGPU: Remove -mcpu=SI adds 4026c85e904 [AMDGPU] Add pseudo "old" source to all DPP instructions adds 45ff2ea308c Removing an unused variable that was missed with the refact [...] adds b6ff06ef35a Reapply fix PR23384 (part 3 of 3) r304824 (was reverted in [...] adds 6858db5aed8 Move the SampleProfileLoader right after EarlyFPM. adds 1fea7c97d1c [llvm-pdbutil] Don't crash when a section contrib's isect i [...] adds 79302ff8ea6 Do not instrument libFuzzer itself when built with -DLLVM_U [...] adds ed5628c9fc7 [Object] Initialize LoadConfig member to null adds d71b0d40d28 AMDGPU: Implement getMinimumNopSize adds 72edb0839f6 [X86][AVX] Added test for broadcast shuffle from binary sou [...] adds 7f0f9c85316 [KnownBits] Fix copy pasto in comment. NFC adds 468107aa761 [libFuzzer] simplify the implementation of -print_coverage=1 adds 7550cbd415a [libFuzzer] remove stale code adds 1aea6403666 [libFuzzer] simplify code, NFC adds 5ca94f31eed [AMDGPU] Fix some Clang-tidy modernize-use-using and Includ [...] adds f4c6127fb89 [PM] Fix new LoopUnroll function pass by invalidating loop [...] adds 6b0837c5dae [PM] Relax the spelling of a pass name slightly in this test. adds 84577c6f352 AMDGPU: Also remove SI from docs adds 39aad0ab082 AMDGPU: Move R600 parts of AMDGPUISelDAGToDAG into their own class adds 56199e7135e AMDGPU: Fix warnings introduced by r310336 new 70c1698fb07 Updating branches/google/stable to r310337

The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: CMakeLists.txt | 7 +- docs/AMDGPUUsage.rst | 3 +- docs/CommandGuide/llvm-cov.rst | 12 +- docs/GlobalISel.rst | 2 - docs/LibFuzzer.rst | 8 +- docs/XRay.rst | 3 + docs/XRayFDRFormat.rst | 401 ++ docs/index.rst | 1 + include/llvm/ADT/DenseMap.h | 22 +- include/llvm/Analysis/CGSCCPassManager.h | 23 +- include/llvm/Analysis/InlineCost.h | 4 + include/llvm/Analysis/LazyCallGraph.h | 78 +- include/llvm/Analysis/ProfileSummaryInfo.h | 6 + include/llvm/Analysis/ScalarEvolution.h | 39 +- include/llvm/Analysis/TargetTransformInfoImpl.h | 4 +- include/llvm/Analysis/ValueTracking.h | 3 +- include/llvm/CodeGen/CommandFlags.h | 28 +- include/llvm/CodeGen/GlobalISel/GISelAccessor.h | 39 - .../llvm/CodeGen/GlobalISel/InstructionSelector.h | 9 + .../CodeGen/GlobalISel/InstructionSelectorImpl.h | 16 +- include/llvm/CodeGen/MIRYamlMapping.h | 5 +- include/llvm/CodeGen/MachineOperand.h | 9 + include/llvm/CodeGen/SelectionDAG.h | 6 +- include/llvm/DebugInfo/DWARF/DWARFUnit.h | 2 +- include/llvm/DebugInfo/MSF/MSFCommon.h | 34 +- include/llvm/DebugInfo/MSF/MSFStreamLayout.h | 35 - include/llvm/DebugInfo/MSF/MappedBlockStream.h | 4 +- .../llvm/DebugInfo/PDB/Native/DbiStreamBuilder.h | 5 +- .../llvm/DebugInfo/PDB/Native/NativeEnumSymbol.h | 60 + .../llvm/DebugInfo/PDB/Native/NativeEnumTypes.h | 51 + include/llvm/DebugInfo/PDB/Native/NativeSession.h | 6 + include/llvm/DebugInfo/PDB/Native/PDBFile.h | 5 +- include/llvm/DebugInfo/PDB/Native/PDBFileBuilder.h | 2 + include/llvm/DebugInfo/PDB/PDBSymbol.h | 4 +- include/llvm/ExecutionEngine/ExecutionEngine.h | 2 +- include/llvm/IR/DIBuilder.h | 10 +- include/llvm/IR/IntrinsicsAMDGPU.td | 26 + include/llvm/IR/ModuleSummaryIndex.h | 23 +- include/llvm/IR/ModuleSummaryIndexYAML.h | 5 +- include/llvm/IR/PatternMatch.h | 24 + include/llvm/LTO/Config.h | 5 +- include/llvm/MC/MCObjectFileInfo.h | 7 +- include/llvm/MC/MachineLocation.h | 30 +- include/llvm/Object/COFF.h | 2 +- .../llvm/ProfileData/Coverage/CoverageMapping.h | 202 +- include/llvm/Support/CodeGen.h | 2 +- include/llvm/Support/CodeGenCWrappers.h | 18 +- include/llvm/Support/FileSystem.h | 6 - include/llvm/Support/GenericDomTree.h | 14 +- include/llvm/Support/GenericDomTreeConstruction.h | 2 +- include/llvm/Support/KnownBits.h | 2 +- include/llvm/Support/MathExtras.h | 5 + include/llvm/Support/TargetRegistry.h | 55 +- include/llvm/Support/raw_ostream.h | 9 +- include/llvm/Target/TargetMachine.h | 2 +- include/llvm/Target/TargetSelectionDAG.td | 103 +- include/llvm/Transforms/Scalar.h | 2 +- include/llvm/Transforms/Scalar/LoopUnrollPass.h | 36 +- include/llvm/Transforms/Vectorize/SLPVectorizer.h | 17 +- lib/Analysis/BranchProbabilityInfo.cpp | 2 +- lib/Analysis/CGSCCPassManager.cpp | 8 + lib/Analysis/InlineCost.cpp | 105 +- lib/Analysis/LazyCallGraph.cpp | 311 +- lib/Analysis/LazyValueInfo.cpp | 120 +- lib/Analysis/ModuleSummaryAnalysis.cpp | 23 +- lib/Analysis/ProfileSummaryInfo.cpp | 54 +- lib/Analysis/ScalarEvolution.cpp | 90 +- lib/Analysis/ValueTracking.cpp | 182 +- lib/Bitcode/Reader/BitcodeReader.cpp | 52 +- lib/Bitcode/Writer/BitcodeWriter.cpp | 21 +- lib/CodeGen/AsmPrinter/CodeViewDebug.cpp | 21 +- lib/CodeGen/AsmPrinter/DebugLocEntry.h | 2 +- lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 28 +- lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 20 +- lib/CodeGen/AsmPrinter/DwarfDebug.h | 1 - lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 6 +- lib/CodeGen/CodeGenPrepare.cpp | 7 +- lib/CodeGen/FEntryInserter.cpp | 4 +- lib/CodeGen/GlobalISel/CMakeLists.txt | 42 +- lib/CodeGen/GlobalISel/GlobalISel.cpp | 8 - lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 19 +- lib/CodeGen/LLVMTargetMachine.cpp | 1 - lib/CodeGen/LiveDebugValues.cpp | 9 +- lib/CodeGen/LiveDebugVariables.cpp | 97 +- lib/CodeGen/MIRParser/MIRParser.cpp | 4 + lib/CodeGen/MIRPrinter.cpp | 15 +- lib/CodeGen/MachineBlockPlacement.cpp | 7 +- lib/CodeGen/MachineInstr.cpp | 19 +- lib/CodeGen/MachineModuleInfo.cpp | 4 +- lib/CodeGen/PrologEpilogInserter.cpp | 13 +- lib/CodeGen/RegUsageInfoCollector.cpp | 8 +- lib/CodeGen/RegisterCoalescer.cpp | 30 +- lib/CodeGen/ScheduleDAGInstrs.cpp | 2 +- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 271 +- lib/CodeGen/SelectionDAG/FastISel.cpp | 7 +- lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 4 +- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 7 + lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 5 +- lib/CodeGen/StackColoring.cpp | 8 +- lib/CodeGen/TargetSubtargetInfo.cpp | 13 +- lib/DebugInfo/DWARF/DWARFContext.cpp | 4 +- lib/DebugInfo/DWARF/DWARFDebugAranges.cpp | 4 +- lib/DebugInfo/DWARF/DWARFUnit.cpp | 27 +- lib/DebugInfo/DWARF/DWARFVerifier.cpp | 8 +- lib/DebugInfo/MSF/MSFBuilder.cpp | 46 +- lib/DebugInfo/MSF/MSFCommon.cpp | 24 + lib/DebugInfo/MSF/MappedBlockStream.cpp | 43 +- lib/DebugInfo/PDB/CMakeLists.txt | 2 + lib/DebugInfo/PDB/Native/DbiStreamBuilder.cpp | 13 - lib/DebugInfo/PDB/Native/NativeEnumSymbol.cpp | 108 + lib/DebugInfo/PDB/Native/NativeEnumTypes.cpp | 59 + lib/DebugInfo/PDB/Native/NativeExeSymbol.cpp | 4 + lib/DebugInfo/PDB/Native/NativeSession.cpp | 41 +- lib/DebugInfo/PDB/Native/PDBFile.cpp | 7 +- lib/DebugInfo/PDB/Native/PDBFileBuilder.cpp | 28 + lib/ExecutionEngine/ExecutionEngine.cpp | 2 +- lib/ExecutionEngine/ExecutionEngineBindings.cpp | 4 +- lib/ExecutionEngine/TargetSelect.cpp | 9 +- lib/Fuzzer/CMakeLists.txt | 37 +- lib/Fuzzer/FuzzerLoop.cpp | 16 +- lib/Fuzzer/FuzzerTracePC.cpp | 207 +- lib/Fuzzer/FuzzerTracePC.h | 11 +- lib/Fuzzer/FuzzerUtil.cpp | 10 - lib/Fuzzer/FuzzerUtil.h | 2 - lib/Fuzzer/test/CMakeLists.txt | 241 +- lib/Fuzzer/test/InitializeTest.cpp | 2 +- lib/Fuzzer/test/ShrinkControlFlowTest.cpp | 7 +- lib/Fuzzer/test/afl-driver-extra-stats.test | 14 +- lib/Fuzzer/test/afl-driver-stderr.test | 8 +- lib/Fuzzer/test/afl-driver.test | 13 +- lib/Fuzzer/test/bad-strcmp.test | 3 +- lib/Fuzzer/test/caller-callee.test | 3 +- lib/Fuzzer/test/cleanse.test | 3 +- lib/Fuzzer/test/coverage.test | 12 +- lib/Fuzzer/test/cxxstring.test | 4 +- lib/Fuzzer/test/disable-leaks.test | 3 +- lib/Fuzzer/test/dump_coverage.test | 22 +- lib/Fuzzer/test/equivalence-signals.test | 6 +- lib/Fuzzer/test/equivalence.test | 7 +- lib/Fuzzer/test/exit-report.test | 3 +- lib/Fuzzer/test/exit_on_src_pos.test | 8 + lib/Fuzzer/test/extra-counters.test | 3 +- lib/Fuzzer/test/fuzzer-customcrossover.test | 4 +- .../test/fuzzer-customcrossoverandmutate.test | 3 +- lib/Fuzzer/test/fuzzer-custommutator.test | 3 +- lib/Fuzzer/test/fuzzer-dict.test | 6 +- lib/Fuzzer/test/fuzzer-dirs.test | 8 +- lib/Fuzzer/test/fuzzer-fdmask.test | 12 +- lib/Fuzzer/test/fuzzer-finalstats.test | 5 +- lib/Fuzzer/test/fuzzer-flags.test | 11 +- lib/Fuzzer/test/fuzzer-leak.test | 24 +- lib/Fuzzer/test/fuzzer-oom-with-profile.test | 3 +- lib/Fuzzer/test/fuzzer-oom.test | 10 +- lib/Fuzzer/test/fuzzer-printcovpcs.test | 3 +- lib/Fuzzer/test/fuzzer-runs.test | 7 +- lib/Fuzzer/test/fuzzer-seed.test | 3 +- lib/Fuzzer/test/fuzzer-segv.test | 5 +- lib/Fuzzer/test/fuzzer-singleinputs.test | 11 +- lib/Fuzzer/test/fuzzer-threaded.test | 9 +- lib/Fuzzer/test/fuzzer-timeout.test | 10 +- lib/Fuzzer/test/fuzzer-traces-hooks.test | 17 - lib/Fuzzer/test/fuzzer-ubsan.test | 3 +- lib/Fuzzer/test/fuzzer.test | 54 +- lib/Fuzzer/test/inline-8bit-counters.test | 3 +- .../test/inline-8bit-counters/CMakeLists.txt | 12 - lib/Fuzzer/test/lit.cfg | 34 +- lib/Fuzzer/test/lit.site.cfg.in | 6 +- lib/Fuzzer/test/memcmp.test | 3 + lib/Fuzzer/test/memcmp64.test | 3 + lib/Fuzzer/test/merge-posix.test | 6 +- lib/Fuzzer/test/merge-summary.test | 6 +- lib/Fuzzer/test/merge.test | 16 +- lib/Fuzzer/test/minimize_crash.test | 9 +- lib/Fuzzer/test/minimize_two_crashes.test | 6 +- lib/Fuzzer/test/no-coverage/CMakeLists.txt | 29 - lib/Fuzzer/test/overwrite-input.test | 3 +- lib/Fuzzer/test/recommended-dictionary.test | 6 + lib/Fuzzer/test/reduce_inputs.test | 8 +- lib/Fuzzer/test/repeated-bytes.test | 3 +- lib/Fuzzer/test/shrink.test | 8 +- lib/Fuzzer/test/simple-cmp.test | 3 +- lib/Fuzzer/test/standalone.test | 6 +- lib/Fuzzer/test/strcmp.test | 4 + lib/Fuzzer/test/strncmp.test | 4 + lib/Fuzzer/test/strstr.test | 4 + lib/Fuzzer/test/swap-cmp.test | 3 +- lib/Fuzzer/test/trace-malloc-2.test | 4 +- lib/Fuzzer/test/trace-malloc.test | 4 +- lib/Fuzzer/test/trace-pc.test | 3 +- lib/Fuzzer/test/trace-pc/CMakeLists.txt | 12 - lib/Fuzzer/test/ubsan/CMakeLists.txt | 12 - lib/Fuzzer/test/ulimit.test | 5 +- lib/Fuzzer/test/uninstrumented/CMakeLists.txt | 13 - lib/Fuzzer/test/value-profile-cmp.test | 3 +- lib/Fuzzer/test/value-profile-cmp2.test | 3 +- lib/Fuzzer/test/value-profile-cmp3.test | 3 +- lib/Fuzzer/test/value-profile-cmp4.test | 3 +- lib/Fuzzer/test/value-profile-div.test | 3 +- lib/Fuzzer/test/value-profile-load.test | 4 +- lib/Fuzzer/test/value-profile-mem.test | 3 +- lib/Fuzzer/test/value-profile-set.test | 3 +- lib/Fuzzer/test/value-profile-strcmp.test | 3 +- lib/Fuzzer/test/value-profile-strncmp.test | 3 +- lib/Fuzzer/test/value-profile-switch.test | 6 +- lib/IR/DIBuilder.cpp | 29 +- lib/IR/Verifier.cpp | 2 +- lib/LTO/LTO.cpp | 5 +- lib/LTO/LTOBackend.cpp | 29 +- lib/LTO/LTOCodeGenerator.cpp | 5 +- lib/LTO/ThinLTOCodeGenerator.cpp | 6 +- lib/MC/MCObjectFileInfo.cpp | 33 +- lib/MC/MCParser/AsmParser.cpp | 9 +- lib/Object/ModuleSymbolTable.cpp | 2 +- lib/Passes/PassBuilder.cpp | 59 +- lib/Passes/PassRegistry.def | 4 +- lib/ProfileData/Coverage/CoverageMapping.cpp | 21 +- lib/ProfileData/SampleProfWriter.cpp | 5 +- lib/Support/Atomic.cpp | 4 +- lib/Support/Unix/Path.inc | 47 - lib/Support/Windows/Path.inc | 43 +- lib/Support/Windows/Signals.inc | 29 +- lib/Support/raw_ostream.cpp | 17 +- lib/Target/AArch64/AArch64CallLowering.cpp | 4 - .../AArch64/AArch64DeadRegisterDefinitionsPass.cpp | 112 +- lib/Target/AArch64/AArch64FrameLowering.cpp | 52 +- lib/Target/AArch64/AArch64GenRegisterBankInfo.def | 4 - lib/Target/AArch64/AArch64ISelLowering.cpp | 4 +- lib/Target/AArch64/AArch64InstrAtomics.td | 68 +- lib/Target/AArch64/AArch64InstrFormats.td | 80 + lib/Target/AArch64/AArch64InstructionSelector.cpp | 4 - lib/Target/AArch64/AArch64LegalizerInfo.cpp | 4 - lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp | 19 +- lib/Target/AArch64/AArch64RegisterBankInfo.cpp | 4 - lib/Target/AArch64/AArch64SchedThunderX2T99.td | 133 + lib/Target/AArch64/AArch64Subtarget.cpp | 65 +- lib/Target/AArch64/AArch64Subtarget.h | 20 +- lib/Target/AArch64/AArch64TargetMachine.cpp | 56 +- lib/Target/AArch64/AArch64TargetMachine.h | 14 +- lib/Target/AArch64/CMakeLists.txt | 28 +- .../AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp | 25 - lib/Target/AMDGPU/AMDGPU.h | 34 +- lib/Target/AMDGPU/AMDGPU.td | 14 +- lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp | 131 + lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h | 177 + lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 184 +- lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 36 +- lib/Target/AMDGPU/AMDGPUCallingConv.td | 4 + lib/Target/AMDGPU/AMDGPUFrameLowering.h | 4 - lib/Target/AMDGPU/AMDGPUGenRegisterBankInfo.def | 4 - lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 312 +- lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 56 +- lib/Target/AMDGPU/AMDGPUISelLowering.h | 25 +- lib/Target/AMDGPU/AMDGPUInstrInfo.cpp | 4 +- lib/Target/AMDGPU/AMDGPUInstrInfo.td | 16 + lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 6 +- lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 17 +- lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 4 - lib/Target/AMDGPU/AMDGPURegisterInfo.cpp | 14 + lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp | 4 + lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 56 +- lib/Target/AMDGPU/AMDGPUSubtarget.h | 29 +- lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 97 +- lib/Target/AMDGPU/AMDGPUTargetMachine.h | 10 +- lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 13 + lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 29 + lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 88 +- lib/Target/AMDGPU/CMakeLists.txt | 30 +- lib/Target/AMDGPU/FLATInstructions.td | 17 +- lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 9 +- .../AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp | 7 + lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h | 2 + .../AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp | 6 + lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 2 +- lib/Target/AMDGPU/Processors.td | 10 +- lib/Target/AMDGPU/R600ClauseMergePass.cpp | 15 +- lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp | 12 +- lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp | 12 +- lib/Target/AMDGPU/R600FrameLowering.h | 4 + lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp | 7 + lib/Target/AMDGPU/R600Packetizer.cpp | 10 +- lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 36 +- .../AMDGPU/SIFixControlFlowLiveIntervals.cpp | 88 - lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 62 +- lib/Target/AMDGPU/SIFixWWMLiveness.cpp | 202 + lib/Target/AMDGPU/SIFrameLowering.cpp | 72 +- lib/Target/AMDGPU/SIFrameLowering.h | 5 + lib/Target/AMDGPU/SIISelLowering.cpp | 803 +++- lib/Target/AMDGPU/SIISelLowering.h | 28 + lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 121 +- lib/Target/AMDGPU/SIInsertWaits.cpp | 21 +- lib/Target/AMDGPU/SIInstrInfo.cpp | 113 +- lib/Target/AMDGPU/SIInstrInfo.h | 45 +- lib/Target/AMDGPU/SIInstrInfo.td | 28 +- lib/Target/AMDGPU/SIInstructions.td | 84 + lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 11 +- lib/Target/AMDGPU/SILowerControlFlow.cpp | 38 +- lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 137 +- lib/Target/AMDGPU/SIMachineFunctionInfo.h | 184 +- lib/Target/AMDGPU/SIOptimizeExecMasking.cpp | 42 +- lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 183 + lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 42 +- lib/Target/AMDGPU/SIRegisterInfo.cpp | 66 +- lib/Target/AMDGPU/SIRegisterInfo.h | 26 +- lib/Target/AMDGPU/SIRegisterInfo.td | 12 + lib/Target/AMDGPU/SIWholeQuadMode.cpp | 290 +- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 15 +- lib/Target/AMDGPU/VOP1Instructions.td | 11 +- lib/Target/AMDGPU/VOP2Instructions.td | 9 +- lib/Target/AMDGPU/VOP3Instructions.td | 89 +- lib/Target/AMDGPU/VOPInstructions.td | 21 + lib/Target/ARM/ARMCallLowering.cpp | 4 - lib/Target/ARM/ARMFrameLowering.cpp | 2 - lib/Target/ARM/ARMISelDAGToDAG.cpp | 39 +- lib/Target/ARM/ARMISelLowering.cpp | 4 +- lib/Target/ARM/ARMInstrVFP.td | 80 +- lib/Target/ARM/ARMInstructionSelector.cpp | 61 +- lib/Target/ARM/ARMLegalizerInfo.cpp | 4 - lib/Target/ARM/ARMRegisterBankInfo.cpp | 4 - lib/Target/ARM/ARMSubtarget.cpp | 60 +- lib/Target/ARM/ARMSubtarget.h | 17 +- lib/Target/ARM/ARMSystemRegister.td | 48 + lib/Target/ARM/ARMTargetMachine.cpp | 25 +- lib/Target/ARM/ARMTargetMachine.h | 14 +- lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 47 +- lib/Target/ARM/CMakeLists.txt | 26 +- lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 24 + lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | 50 +- lib/Target/ARM/Utils/ARMBaseInfo.cpp | 11 +- lib/Target/ARM/Utils/ARMBaseInfo.h | 11 + lib/Target/AVR/AVRTargetMachine.cpp | 17 +- lib/Target/AVR/AVRTargetMachine.h | 6 +- lib/Target/BPF/BPFTargetMachine.cpp | 12 +- lib/Target/BPF/BPFTargetMachine.h | 4 +- lib/Target/Hexagon/HexagonAsmPrinter.cpp | 98 +- lib/Target/Hexagon/HexagonAsmPrinter.h | 21 +- lib/Target/Hexagon/HexagonISelLowering.cpp | 36 + lib/Target/Hexagon/HexagonMCInstLower.cpp | 20 +- lib/Target/Hexagon/HexagonRegisterInfo.h | 1 - lib/Target/Hexagon/HexagonTargetMachine.cpp | 21 +- lib/Target/Hexagon/HexagonTargetMachine.h | 4 +- lib/Target/Hexagon/HexagonTargetTransformInfo.cpp | 9 +- lib/Target/Hexagon/HexagonTargetTransformInfo.h | 18 +- lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h | 13 +- .../Hexagon/MCTargetDesc/HexagonMCChecker.cpp | 68 +- lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.h | 71 +- .../Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp | 81 +- .../Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h | 28 +- .../Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp | 15 +- .../Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp | 26 +- .../Hexagon/MCTargetDesc/HexagonMCInstrInfo.h | 31 +- .../Hexagon/MCTargetDesc/HexagonMCShuffler.cpp | 9 +- .../Hexagon/MCTargetDesc/HexagonMCShuffler.h | 34 +- .../Hexagon/MCTargetDesc/HexagonShuffler.cpp | 65 +- lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.h | 89 +- lib/Target/Hexagon/RDFCopy.cpp | 23 +- lib/Target/Hexagon/RDFCopy.h | 17 +- lib/Target/Hexagon/RDFGraph.cpp | 9 +- lib/Target/Hexagon/RDFGraph.h | 62 +- lib/Target/Hexagon/RDFLiveness.cpp | 39 +- lib/Target/Hexagon/RDFLiveness.h | 52 +- lib/Target/Hexagon/RDFRegisters.cpp | 15 +- lib/Target/Hexagon/RDFRegisters.h | 47 +- lib/Target/Lanai/LanaiTargetMachine.cpp | 16 +- lib/Target/Lanai/LanaiTargetMachine.h | 3 +- lib/Target/Lanai/LanaiTargetTransformInfo.h | 27 + lib/Target/MSP430/MSP430TargetMachine.cpp | 13 +- lib/Target/MSP430/MSP430TargetMachine.h | 4 +- lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 25 +- lib/Target/Mips/MicroMipsSizeReduction.cpp | 115 +- lib/Target/Mips/Mips16HardFloat.cpp | 58 +- lib/Target/Mips/Mips16InstrInfo.cpp | 32 +- lib/Target/Mips/Mips16InstrInfo.h | 17 +- lib/Target/Mips/MipsAnalyzeImmediate.cpp | 6 +- lib/Target/Mips/MipsAnalyzeImmediate.h | 16 +- lib/Target/Mips/MipsAsmPrinter.cpp | 53 +- lib/Target/Mips/MipsAsmPrinter.h | 51 +- lib/Target/Mips/MipsConstantIslandPass.cpp | 20 +- lib/Target/Mips/MipsDelaySlotFiller.cpp | 21 +- lib/Target/Mips/MipsFastISel.cpp | 9 +- lib/Target/Mips/MipsHazardSchedule.cpp | 22 +- lib/Target/Mips/MipsISelLowering.cpp | 62 +- lib/Target/Mips/MipsISelLowering.h | 75 +- lib/Target/Mips/MipsInstrInfo.cpp | 33 +- lib/Target/Mips/MipsInstrInfo.h | 20 +- lib/Target/Mips/MipsLongBranch.cpp | 13 +- lib/Target/Mips/MipsMCInstLower.cpp | 13 +- lib/Target/Mips/MipsMCInstLower.h | 28 +- lib/Target/Mips/MipsOptimizePICCall.cpp | 43 +- lib/Target/Mips/MipsRegisterInfo.cpp | 19 +- lib/Target/Mips/MipsRegisterInfo.h | 10 +- lib/Target/Mips/MipsSEFrameLowering.cpp | 4 +- lib/Target/Mips/MipsSEFrameLowering.h | 9 +- lib/Target/Mips/MipsSEISelLowering.cpp | 46 +- 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