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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-aarch64-bootstrap_O1 in repository toolchain/ci/gcc.
from fc24ea23742 dwarf2out: Fix debug info for 2 byte floats [PR99388] adds d2de43b775a Daily bump. adds d0a5e8e1a84 rs6000: Convert the vector set variable idx to DImode [PR98914] adds 0ec7641ee18 rs6000: Fix some unexpected empty split conditions adds fc9c4e5fc50 debug: Fix __int128 handling in dwarf2out [PR99562] adds 0e792ee11aa Fortran: Fix 'name' bound size [PR99688] adds 540dace2ed3 PR target/99702: Check RTL type before get value adds c38f679eebf mklog: add new argument --directory. adds c4519fe3db3 C++ modules: fix alloc-dealloc-mismatch ASAN issue adds b931e4792b8 tree-optimization/99694 - fix value-numbering PHIs adds 57d9ac67280 Warn to not add debug hook targets adds 150a829accd arm: Fix MVE ICEs with vector moves and -mpure-code [PR97252] adds 87e3c2ef682 c++: duplicate alias templates with decltype [PR 99425] adds 00b46c00c8d libstdc++: Add noexcept to std::begin etc as per LWG 2280 and 3537 adds ba16797fe69 ubsan: Don't test for NaNs if those do not exist (PR97926) adds 02f2dc441b1 [PR99581] Define relaxed memory and use it for aarch64 adds 2bfd081f1bc c++: Cross-module partial specialiations [PR 99480] adds 7c1006135dd libstdc++: Implement string_view range constructor for C++20 adds 8b744f46a24 Daily bump. adds 441e1980cea Update gcc sv.po. adds 88081d38bd8 Handle setting of 1-bit anti-ranges uniformly. adds e54da1b6b39 mklog: fix test_mklog.py tests. adds a28cc94a275 cprop_hardreg: Ensure replacement reg has compatible mode [ [...] adds 3e07e7a6a7f c++: Diagnose references to void in structured bindings [PR99650] adds a9604fcbb29 RISC-V: Support -mlittle-endian and -mbig-endian adds cd1e2f63253 RISC-V: Add riscv{32,64}be with big endian as default adds f1af1326d26 RISC-V: Update soft-fp config for big-endian adds 28bddf0e322 RISC-V: Fix trampoline generation on big endian adds 4eb3a801a5e RISC-V: Update shift-shift-5.c testcase for big endian adds 7ac4dfec391 RISC-V: Fix matches against subreg with a bytenum of 0 in riscv.md adds fffefe3d9d1 RISC-V: Fix riscv_subword() for big endian adds ffa6a7fba1f tree-optimization/99721 - avoid SLP nodes we cannot schedule adds 6acd6692f1a c++: Over-zealous assert [PR 99239] adds 9c89c9e9c6b x86: Add __volatile__ to __cpuid and __cpuid_count adds d7cea7ceff9 aarch64: Make aarch64_add_offset work with -ftrapv [PR99540] adds 212f4988f37 Fortran: Fix func decl mismatch [PR93660] adds 831f9f768eb c++: Fix bogus warning in deprecated namespace [PR99318] adds baef0cffb58 libstdc++: Disable "ALT128" long double support for Clang adds 3c0351f287e testsuite/arm: Add arm_v8_2a_fp16_neon and arm_v8_2a_bf16_n [...] adds aa706c46366 testsuite/arm: Add arm_v8_2a_i8mm options in gcc.target/arm [...] adds 451c51e8ed3 testsuite/arm: Remove useless -mfloat-abi option adds fcfad74515d testsuite/arm: Add arm_softfp_ok or arm_hard_ok as needed. adds 1843341b129 testsuite/arm: Add arm_hard_ok check in armv8_2-fp16-scalar-2.c adds bed1736f3aa testsuite/arm: Fix -mfloat-abi order in arm_v8_2a_bf16_neon [...] adds 165bc67beb4 testsuite/arm: Fix -mfloat-abi order in arm_v8_1m_mve_ok_no [...] adds 3c3c0042736 testsuite/arm: Add arm_dsp_ok effective target and use it i [...] adds 6b1f841ce0c Add forgotten attribution on PR target/99593 testcase. adds 09f08fef71f libstdc++: Avoid accidental ADL when calling make_reverse_iterator adds 19599551045 MAINTAINERS: add myself as static analyzer maintainer adds d1aa5f57db7 libstdc++: Improve test for views::reverse adds b61461ac7f9 fwprop: Fix single_use_p calculation
No new revisions were added by this update.
Summary of changes: MAINTAINERS | 1 + contrib/ChangeLog | 4 + contrib/mklog.py | 9 +- gcc/ChangeLog | 109 +++ gcc/DATESTAMP | 2 +- gcc/common/config/riscv/riscv-common.c | 5 + gcc/config.gcc | 15 + gcc/config/aarch64/aarch64.c | 2 +- gcc/config/aarch64/constraints.md | 2 +- gcc/config/arm/arm-protos.h | 2 +- gcc/config/arm/arm.c | 32 +- gcc/config/arm/constraints.md | 7 + gcc/config/arm/mve.md | 2 +- gcc/config/arm/vec-common.md | 5 + gcc/config/i386/cpuid.h | 36 +- gcc/config/riscv/elf.h | 4 +- gcc/config/riscv/freebsd.h | 4 +- gcc/config/riscv/linux.h | 4 +- gcc/config/riscv/predicates.md | 5 + gcc/config/riscv/riscv.c | 28 +- gcc/config/riscv/riscv.h | 12 +- gcc/config/riscv/riscv.md | 70 +- gcc/config/riscv/riscv.opt | 8 + gcc/config/rs6000/rs6000.c | 39 +- gcc/config/rs6000/rs6000.md | 28 +- gcc/config/rs6000/vsx.md | 10 +- gcc/cp/ChangeLog | 26 + gcc/cp/cp-tree.h | 7 +- gcc/cp/decl.c | 8 +- gcc/cp/decl2.c | 3 +- gcc/cp/module.cc | 108 +-- gcc/cp/pt.c | 38 +- gcc/debug.h | 4 + gcc/doc/invoke.texi | 12 + gcc/doc/md.texi | 28 +- gcc/doc/sourcebuild.texi | 11 + gcc/dwarf2out.c | 10 +- gcc/fortran/ChangeLog | 7 + gcc/fortran/match.c | 6 +- gcc/fortran/resolve.c | 2 +- gcc/fortran/trans-decl.c | 6 +- gcc/fortran/trans-types.c | 21 +- gcc/fwprop.c | 81 +- gcc/genoutput.c | 1 + gcc/genpreds.c | 75 +- gcc/gensupport.c | 1 + gcc/ira-costs.c | 1 + gcc/ira-lives.c | 1 + gcc/ira.c | 1 + gcc/lra-constraints.c | 7 +- gcc/po/sv.po | 1013 +++++--------------- gcc/recog.c | 2 + gcc/regcprop.c | 3 +- gcc/reload.c | 1 + gcc/rtl-ssa/accesses.h | 13 + gcc/rtl-ssa/member-fns.inl | 28 + gcc/rtl.def | 1 + gcc/stmt.c | 3 +- gcc/testsuite/ChangeLog | 38 + gcc/testsuite/g++.dg/cpp0x/attributes-namespace6.C | 21 + gcc/testsuite/g++.dg/cpp0x/gen-attrs-73.C | 20 + gcc/testsuite/g++.dg/cpp1z/decomp55.C | 19 + gcc/testsuite/g++.dg/modules/pr99239_a.H | 13 + gcc/testsuite/g++.dg/modules/pr99239_b.H | 12 + gcc/testsuite/g++.dg/modules/pr99425-1.h | 11 + gcc/testsuite/g++.dg/modules/pr99425-1_a.H | 4 + gcc/testsuite/g++.dg/modules/pr99425-1_b.H | 19 + gcc/testsuite/g++.dg/modules/pr99425-1_c.C | 11 + gcc/testsuite/g++.dg/modules/pr99425-2_a.X | 7 + gcc/testsuite/g++.dg/modules/pr99425-2_b.X | 4 + gcc/testsuite/g++.dg/modules/pr99480_a.H | 10 + gcc/testsuite/g++.dg/modules/pr99480_b.H | 9 + gcc/testsuite/g++.dg/template/pr99425.C | 45 + gcc/testsuite/gcc.dg/pr99296.c | 7 + gcc/testsuite/gcc.dg/torture/pr99694.c | 27 + gcc/testsuite/gcc.dg/vect/pr99540.c | 20 + gcc/testsuite/gcc.target/arm/acle/dsp_arith.c | 4 +- .../gcc.target/arm/armv8_1m-fp16-move-1.c | 3 +- .../gcc.target/arm/armv8_1m-fp32-move-1.c | 3 +- .../gcc.target/arm/armv8_1m-fp64-move-1.c | 3 +- .../gcc.target/arm/armv8_1m-shift-imm-1.c | 2 +- .../gcc.target/arm/armv8_1m-shift-reg-1.c | 2 +- .../gcc.target/arm/armv8_2-fp16-scalar-2.c | 2 + gcc/testsuite/gcc.target/arm/bf16_dup.c | 2 +- gcc/testsuite/gcc.target/arm/bf16_reinterpret.c | 2 +- gcc/testsuite/gcc.target/arm/bfloat16_scalar_1_1.c | 3 +- .../gcc.target/arm/bfloat16_scalar_typecheck.c | 2 + gcc/testsuite/gcc.target/arm/bfloat16_simd_1_1.c | 3 +- gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c | 1 + gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c | 1 + gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c | 1 + gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c | 1 + gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c | 1 + .../gcc.target/arm/bfloat16_vector_typecheck_1.c | 2 + .../gcc.target/arm/bfloat16_vector_typecheck_2.c | 6 +- .../arm/mve/intrinsics/mve_vector_float2.c | 2 + .../gcc.target/arm/mve/intrinsics/mve_vector_int.c | 2 + .../arm/mve/intrinsics/mve_vector_uint.c | 2 + .../arm/mve/intrinsics/mve_vector_uint1.c | 2 + .../arm/mve/intrinsics/mve_vector_uint2.c | 2 + .../gcc.target/arm/mve/intrinsics/vgetq_lane_s64.c | 3 +- .../gcc.target/arm/mve/intrinsics/vgetq_lane_u64.c | 3 +- .../gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c | 3 +- .../gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c | 3 +- gcc/testsuite/gcc.target/arm/pr51534.c | 2 +- gcc/testsuite/gcc.target/arm/pr51968.c | 3 +- gcc/testsuite/gcc.target/arm/simd/bf16_ma_1.c | 3 +- gcc/testsuite/gcc.target/arm/simd/bf16_mmla_1.c | 3 +- gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c | 1 + gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c | 1 + gcc/testsuite/gcc.target/arm/simd/vdot-2-1.c | 3 +- gcc/testsuite/gcc.target/arm/simd/vdot-2-2.c | 3 +- gcc/testsuite/gcc.target/arm/simd/vmmla_1.c | 3 +- gcc/testsuite/gcc.target/powerpc/pr98914.c | 11 + gcc/testsuite/gcc.target/powerpc/pr99581.c | 17 + gcc/testsuite/gcc.target/riscv/pr99702.c | 7 + gcc/testsuite/gcc.target/riscv/shift-shift-5.c | 4 + .../gcc.target/s390/vector/long-double-asm-abi.c | 26 + .../gfortran.dg/gomp/declare-simd-coarray-lib.f90 | 12 + gcc/testsuite/gfortran.dg/vect/pr99721.f90 | 11 + gcc/testsuite/lib/target-supports.exp | 48 +- gcc/tree-ssa-sccvn.c | 2 + gcc/tree-vect-slp.c | 15 +- gcc/ubsan.c | 12 +- gcc/value-range.cc | 31 + gcc/value-range.h | 2 + libgcc/config/riscv/sfp-machine.h | 4 + libstdc++-v3/ChangeLog | 21 + libstdc++-v3/include/bits/c++config | 5 +- libstdc++-v3/include/bits/range_access.h | 12 +- libstdc++-v3/include/std/ranges | 12 +- libstdc++-v3/include/std/string_view | 33 +- .../basic_string_view/cons/char/range_c++20.cc | 170 ++++ .../basic_string_view/cons/wchar_t/range_c++20.cc | 170 ++++ .../24_iterators/range_access/range_access.cc | 30 + .../range_access/range_access_cpp14.cc | 15 + .../range_access/range_access_cpp17.cc | 14 + .../testsuite/std/ranges/adaptors/reverse.cc | 19 + 138 files changed, 1951 insertions(+), 1111 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp0x/attributes-namespace6.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/gen-attrs-73.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/decomp55.C create mode 100644 gcc/testsuite/g++.dg/modules/pr99239_a.H create mode 100644 gcc/testsuite/g++.dg/modules/pr99239_b.H create mode 100644 gcc/testsuite/g++.dg/modules/pr99425-1.h create mode 100644 gcc/testsuite/g++.dg/modules/pr99425-1_a.H create mode 100644 gcc/testsuite/g++.dg/modules/pr99425-1_b.H create mode 100644 gcc/testsuite/g++.dg/modules/pr99425-1_c.C create mode 100644 gcc/testsuite/g++.dg/modules/pr99425-2_a.X create mode 100644 gcc/testsuite/g++.dg/modules/pr99425-2_b.X create mode 100644 gcc/testsuite/g++.dg/modules/pr99480_a.H create mode 100644 gcc/testsuite/g++.dg/modules/pr99480_b.H create mode 100644 gcc/testsuite/g++.dg/template/pr99425.C create mode 100644 gcc/testsuite/gcc.dg/pr99296.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr99694.c create mode 100644 gcc/testsuite/gcc.dg/vect/pr99540.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr98914.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr99581.c create mode 100644 gcc/testsuite/gcc.target/riscv/pr99702.c create mode 100644 gcc/testsuite/gcc.target/s390/vector/long-double-asm-abi.c create mode 100644 gcc/testsuite/gfortran.dg/gomp/declare-simd-coarray-lib.f90 create mode 100644 gcc/testsuite/gfortran.dg/vect/pr99721.f90 create mode 100644 libstdc++-v3/testsuite/21_strings/basic_string_view/cons/char/r [...] create mode 100644 libstdc++-v3/testsuite/21_strings/basic_string_view/cons/wchar_ [...]