[Tcwg-commits] [llvm] branch master updated (1e1e4fd87f7 -> a3d9e32efb0)

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from 1e1e4fd87f7 [AArch64][GlobalISel] Optimize conditional branches followe [...] new a3d9e32efb0 [RISCV] Fix ICE in isDesirableToCommuteWithShift

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Summary of changes: lib/Target/RISCV/RISCVISelLowering.cpp | 2 +- test/CodeGen/RISCV/add-before-shl.ll | 19 +++++++++++++++++++ 2 files changed, 20 insertions(+), 1 deletion(-)