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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allmodconfig in repository toolchain/ci/gcc.
from 1eccf995561 i386: Require OPTION_MASK_ISA_SSE2 for __builtin_ia32_movq1 [...] adds 20c6c0c8b18 xtensa: backport fix for PR target/91880 adds 79b59676531 xtensa: backport fix for PR target/94584 adds d998a89f9c5 Daily bump. adds 0f1cf13ecee middle-end/94479 - fix gimplification of address adds baf3a5a9424 Fix target/94557 PowerPC regression on GCC 9 (variable vec_ [...]
No new revisions were added by this update.
Summary of changes: gcc/ChangeLog | 35 +++++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/rs6000/rs6000.c | 13 +++++++--- gcc/config/xtensa/xtensa.c | 5 ++-- gcc/config/xtensa/xtensa.md | 6 ++--- gcc/gimplify.c | 4 ++- gcc/testsuite/ChangeLog | 24 +++++++++++++++++ gcc/testsuite/gcc.dg/torture/pr94479.c | 12 +++++++++ gcc/testsuite/gcc.target/xtensa/pr91880.c | 10 ++++++++ gcc/testsuite/gcc.target/xtensa/pr94584.c | 24 +++++++++++++++++ gcc/testsuite/gcc.target/xtensa/xtensa.exp | 41 ++++++++++++++++++++++++++++++ 11 files changed, 166 insertions(+), 10 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/torture/pr94479.c create mode 100644 gcc/testsuite/gcc.target/xtensa/pr91880.c create mode 100644 gcc/testsuite/gcc.target/xtensa/pr94584.c create mode 100644 gcc/testsuite/gcc.target/xtensa/xtensa.exp