This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig in repository toolchain/ci/llvm-monorepo.
from 2cb5f6aa125 [X86][LoopVectorize] Replace -mcpu=skylake-avx512 with -mat [...] adds 9c6a5a5ab96 [projects] Use add_llvm_external_project for implicit projects adds cb613a06cd4 [Basic] Move DiagnosticsEngine::dump from .h to .cpp adds 22f2c57121e [clangd] Recommit the "AnyScope" changes in requests.json b [...] adds fbf9ddf6bd3 [RISCV] Remove RV64I SLLW/SRLW/SRAW patterns and add new te [...] adds 4f1de661e03 [ThinLTO] Allow importing of functions with var args adds 74d0d799b5f [X86] Remove stale FIXME from test case. NFC adds 6ffdbeca450 Specify constant context in constant emitter adds e6d8ff3a935 Correct indentation. adds 726127213ef [InstCombine] Support ssub.sat canonicalization for non-splats adds 6b84eb3d753 [SelectionDAG] Improve SimplifyDemandedBits to SimplifyDema [...] adds 622a21668fb [llvm-readobj] Improve dynamic section iteration NFC. adds dc45647033f [AMDGPU] Split 64-Bit XNOR to 64-Bit NOT/XOR adds 75cf1d1c788 [TTI] Reduction costs only need to include a single extract [...] adds 90d989cf619 Introduce a way to allow the ASan dylib on Darwin platforms [...] adds bb349a9cf48 [X86] Don't use zero_extend_vector_inreg for mulhu lowering [...] adds 9cbd2834d77 Replace w16/w17 in machine-outliner.mir with w11/w12 adds 97cb2c39713 [MachineOutliner][AArch64] Improve checks for stack instructions adds 79a5e65e897 [X86] Add vXi8 division/remainder by non-splat constant tes [...] adds 3eab6254b70 OpenCL: Extend argument promotion rules to vector types adds 4b0bcfcc53b OpenCL: Improve vector printf warnings
No new revisions were added by this update.
Summary of changes: clang-tools-extra/test/clangd/Inputs/requests.json | 14 +- clang/include/clang/AST/FormatString.h | 24 +- clang/include/clang/Basic/Diagnostic.h | 6 +- clang/lib/AST/ExprConstant.cpp | 1 + clang/lib/AST/FormatString.cpp | 43 +- clang/lib/AST/FormatStringParsing.h | 4 + clang/lib/AST/PrintfFormatString.cpp | 49 ++- clang/lib/Basic/Diagnostic.cpp | 8 + clang/lib/CodeGen/CGExprConstant.cpp | 3 +- clang/lib/CodeGen/ConstantEmitter.h | 3 + clang/lib/Sema/SemaExpr.cpp | 23 +- clang/test/Analysis/builtin-functions.cpp | 6 +- clang/test/CodeGen/builtin-constant-p.c | 168 ++++++++ clang/test/CodeGenOpenCL/printf.cl | 39 ++ clang/test/SemaOpenCL/format-strings-fixit.cl | 24 ++ clang/test/SemaOpenCL/printf-format-strings.cl | 80 +++- compiler-rt/lib/asan/asan_fuchsia.cc | 7 + compiler-rt/lib/asan/asan_internal.h | 5 + compiler-rt/lib/asan/asan_linux.cc | 7 + compiler-rt/lib/asan/asan_malloc_mac.cc | 21 + compiler-rt/lib/asan/asan_rtems.cc | 6 + compiler-rt/lib/asan/asan_rtl.cc | 8 + compiler-rt/lib/asan/asan_win.cc | 7 + .../lib/sanitizer_common/sanitizer_platform.h | 9 + .../test/asan/TestCases/Darwin/init_for_dlopen.cc | 46 ++ .../sanitizer_common/ios_commands/iossim_run.py | 2 +- llvm/include/llvm/CodeGen/BasicTTIImpl.h | 7 +- llvm/lib/Analysis/ModuleSummaryAnalysis.cpp | 11 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 8 +- llvm/lib/IR/Constants.cpp | 19 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 24 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 59 ++- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 3 + llvm/lib/Target/RISCV/RISCVInstrInfo.td | 27 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 19 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 9 +- llvm/projects/CMakeLists.txt | 2 +- .../Analysis/CostModel/AArch64/vector-reduce.ll | 44 +- .../Analysis/CostModel/X86/reduce-add-widen.ll | 174 ++++---- llvm/test/Analysis/CostModel/X86/reduce-add.ll | 162 +++---- .../Analysis/CostModel/X86/reduce-and-widen.ll | 344 +++++++-------- llvm/test/Analysis/CostModel/X86/reduce-and.ll | 344 +++++++-------- .../Analysis/CostModel/X86/reduce-mul-widen.ll | 268 ++++++------ llvm/test/Analysis/CostModel/X86/reduce-mul.ll | 288 ++++++------- .../test/Analysis/CostModel/X86/reduce-or-widen.ll | 344 +++++++-------- llvm/test/Analysis/CostModel/X86/reduce-or.ll | 344 +++++++-------- .../Analysis/CostModel/X86/reduce-smax-widen.ll | 132 +++--- llvm/test/Analysis/CostModel/X86/reduce-smax.ll | 120 +++--- .../Analysis/CostModel/X86/reduce-smin-widen.ll | 132 +++--- llvm/test/Analysis/CostModel/X86/reduce-smin.ll | 120 +++--- .../Analysis/CostModel/X86/reduce-umax-widen.ll | 132 +++--- llvm/test/Analysis/CostModel/X86/reduce-umax.ll | 120 +++--- .../Analysis/CostModel/X86/reduce-umin-widen.ll | 132 +++--- llvm/test/Analysis/CostModel/X86/reduce-umin.ll | 120 +++--- .../Analysis/CostModel/X86/reduce-xor-widen.ll | 344 +++++++-------- llvm/test/Analysis/CostModel/X86/reduce-xor.ll | 344 +++++++-------- llvm/test/Analysis/CostModel/X86/reduction.ll | 92 ++-- llvm/test/Bitcode/thinlto-function-summary.ll | 5 +- .../CodeGen/AArch64/machine-outliner-remarks.ll | 14 +- llvm/test/CodeGen/AArch64/machine-outliner.ll | 1 + llvm/test/CodeGen/AArch64/machine-outliner.mir | 126 +++--- llvm/test/CodeGen/AMDGPU/idot8.ll | 402 ++++++++--------- llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll | 15 +- llvm/test/CodeGen/AMDGPU/xnor.ll | 86 +++- llvm/test/CodeGen/RISCV/alu32.ll | 11 +- llvm/test/CodeGen/RISCV/alu64.ll | 17 +- .../test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll | 187 +++++--- llvm/test/CodeGen/RISCV/rv64i-tricky-shifts.ll | 44 ++ llvm/test/CodeGen/X86/combine-sdiv.ll | 230 +++++----- llvm/test/CodeGen/X86/pr35918.ll | 200 +++++---- llvm/test/CodeGen/X86/rotate-extract-vector.ll | 2 - llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll | 389 ++++++++++++++++- llvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll | 297 +++++++++++++ llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll | 265 ++++++++++++ llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll | 474 +++++++++++++++++++-- llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll | 448 ++++++++++++++++--- llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll | 274 ++++++++++++ llvm/test/CodeGen/X86/vector-rotate-128.ll | 18 +- llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll | 4 - llvm/test/CodeGen/X86/vector-shift-shl-128.ll | 18 +- .../CodeGen/X86/vector-shift-shl-sub128-widen.ll | 36 +- llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll | 79 ++-- llvm/test/Transforms/FunctionImport/funcimport.ll | 12 +- .../Transforms/InstCombine/saturating-add-sub.ll | 9 +- llvm/test/Transforms/SLPVectorizer/X86/PR39774.ll | 74 +++- .../SLPVectorizer/X86/horizontal-minmax.ll | 135 ++---- .../SLPVectorizer/X86/reduction_unrolled.ll | 255 ++++------- .../Transforms/SLPVectorizer/X86/remark_horcost.ll | 25 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 12 +- 89 files changed, 5811 insertions(+), 3254 deletions(-) create mode 100644 clang/test/CodeGen/builtin-constant-p.c create mode 100644 clang/test/CodeGenOpenCL/printf.cl create mode 100644 clang/test/SemaOpenCL/format-strings-fixit.cl create mode 100644 compiler-rt/test/asan/TestCases/Darwin/init_for_dlopen.cc create mode 100644 llvm/test/CodeGen/RISCV/rv64i-tricky-shifts.ll