[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig updated (79cbb003c53 -> 88cadb894ce)

30 Dec 2020


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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig
in repository toolchain/ci/llvm-project.
from  79cbb003c53 [RISCV] Don't use tail agnostic policy on instructions wher [...]
      adds  6df161a2fbf [IROutliner] Adding a cost model, and debug option to turn  [...]
      adds  278aa65cc49 [IR] Let IRBuilder's CreateVectorSplat/CreateShuffleVector  [...]
      adds  f7f09e2b1c8 [RISCV] Fill out basic integer RVV ISel patterns
      adds  21a3a0225d8 [SLP] replace local reduction enum with RecurrenceKind; NFCI
      adds  df7ddeea668 [mlir][python] Add FlatSymbolRef attribute.
      adds  8d18bc8e6db [Utils] reduce code in createTargetReduction(); NFC
      adds  145cbef5879 Copy demangle changes from libcxxabi to llvm with cp_to_llvm.sh.
      adds  6027e05dbfc [SimplifyCFG] Teach SimplifyEqualityComparisonWithOnlyPrede [...]
      adds  fe9bdd96215 [SimplifyCFG] Teach SimplifyEqualityComparisonWithOnlyPrede [...]
      adds  18c407bf4c1 [SimplifyCFG] Teach HoistThenElseCodeToIf() to preserve DomTree
      adds  b8121b2e62d [SimplifyCFG] Teach SinkCommonCodeFromPredecessors() to pre [...]
      adds  d4c0abb4a31 [SimplifyCFG] Teach FoldCondBranchOnPHI() to preserve DomTree
      adds  307156246f7 [SimplifyCFG] Teach mergeConditionalStoreToAddress() to pre [...]
      adds  ec0b671a614 [SimplifyCFG] Teach SimplifyCondBranchToCondBranch() to pre [...]
      adds  39a56f7f172 [SimplifyCFG] Teach SimplifyTerminatorOnSelect() to preserv [...]
      adds  df4a931c63b [IROutliner] Adding OptRemarks to the IROutliner Pass
      adds  e03266994af [mlir] Skip empty op-pipelines in inliner textual opt parsing
      adds  673b12e76ff [tsan] Remove stdlib.h from dd_interceptors.cpp
      adds  4e74480e023 [NFC][sanitizer] Simplify InternalLowerBound
      adds  ababeca34b3 [NFC][sanitizer] Add SortAndDedup function
      adds  3c0d36f977d [NFC][lsan] Add nested leak in test
      adds  f5665a24862 [mlir][python] Add Operation.verify().
      adds  14056c88d66 [mlir][Python] Add an Operation.name property
      adds  5fd2b3a1246 [mlir] Add error message when failing to add pass
      adds  7e5a187de31 CrashReason: Add MTE tag check faults to the list of crash  [...]
      adds  fddb4174495 [llvm-elfabi] Add flag to preserve timestamp when output is [...]
      adds  21314940c48 Reland "[NewPM][CodeGen] Introduce CodeGenPassBuilder to he [...]
      adds  92207b2ccea [gn build] Port 21314940c48
      adds  2c8f5bd5394 [MLIR] Make ComplexType buildable if its element type is buildable
      adds  58ce477676c Fix DRR pattern when attributes and operands are interleave [...]
      adds  16c8f6e9134 Revert "Reland "[NewPM][CodeGen] Introduce CodeGenPassBuild [...]
      adds  a373eacb567 [gn build] Port 16c8f6e9134
      adds  480936e741d Reland "[NewPM][CodeGen] Introduce CodeGenPassBuilder to he [...]
      adds  57b8afda10b [gn build] Port 480936e741d
      adds  6da00336248 [RISCV] Define vsext/vzext intrinsics.
      adds  d034a94e7b3 Revert "[llvm-elfabi] Add flag to preserve timestamp when o [...]
      adds  9a5261efd75 [lsan] Parse suppressions just before leak reporting
      adds  9b25b8068df [NFC][lsan] Extract PrintResults function
      adds  8a1f1a100cc [mlir][python] Aggressively avoid name collisions in genera [...]
      adds  5efc71e119d [ORC] Move Orc RPC code into Shared, rename some RPC types.
      adds  f904d50c29f [PowerPC] Remaining KnownBits should be constant when perfo [...]
      adds  e3e25cfb44b [PowerPC] Add mir test to show effect of `optimizeCompareIn [...]
      adds  096b02ebbff [RISCV] Add intrinsics for vcompress instruction
      adds  f76e83bfbba [Analysis] Use llvm::append_range (NFC)
      adds  16d20e2554e [Transforms/Utils] Construct SmallVector with iterator rang [...]
      adds  329b887286a [Analysis, IR] Use *Map::lookup (NFC)
      adds  11f41cd4451 [mlir][python] Install generated dialect sources.
      adds  a1d05892668 [llvm-elfabi] Add flag to preserve timestamp when output is [...]
      adds  18c3e795f7c [Verifier] Remove declaration of method that was removed 8. [...]
      adds  bf286b00e9e [X86][test] Improve global address offset folding tests
      adds  981a0bd8581 [X86] Add x86_amx type for intel AMX.
      adds  ff6fd385524 [libc] Add implementations of rounding functions which depe [...]
      adds  109e0736620 [ConstraintElimination] Add tests for select form and/or (NFC)
      adds  71867ed5e66 [IROutliner] Adding support for swift errors
      adds  eeb99c2ac26 Revert "[IROutliner] Adding support for swift errors"
      adds  30feb93036e [IROutliner] Adding support for swift errors in the IROutliner
      adds  2820a2ca3a0 Move -fno-semantic-interposition dso_local logic from Targe [...]
      adds  6e9755bb80c [X86] Refactor AMX test case, remove unnecessary code.
      adds  abb4cd3e749 [mlir][Python] Initial Affine Map Python Bindings.
      adds  bfedd5d2b65 [ConstraintElimination] Add support for select form of and/or
      adds  e6e64046002 [SimplifyCFG] Add tests for select form and/or for creating [...]
      adds  3f0b637d6b3 [libc++] [docs] Mark contract-related papers as removed fro [...]
      adds  e47e313d647 [mlir] Fix a typo MemRefType -> UnrankedMemRefType
      adds  9b29610228c Use unary CreateShuffleVector if possible
      adds  420d046d6bd clang-format, address warnings
      adds  16c2067cf21 [X86][AMX] Fix compilation warning introduced by 981a0bd8.
      adds  c6035a7bdf2 Remove functions from *-inseltpoison.ll tests if unnecessary
      adds  e90ea76380d [IR] remove 'NoNan' param when creating FP reductions
      adds  2016f2c8a76 Fixes warning 'enumeration value not handled in switch'.
      adds  3567908d8ce [SLP] add fadd reduction test to show broken FMF propagation; NFC
      adds  ed507bc4d5e [mlir] NFC - Fix SubViewOp printing
      adds  9b5a3d67b49 [mlir] Fix indexing of first offset operand in ops that imp [...]
      adds  b0d6bebe90d [ELF] Drop '>>> defined in ' for locations of linker synthe [...]
      adds  9c0c123b0b4 [CMake][tsan] Remove --sysroot=.
       new  fe431103b63 [IROutliner] Adding option to enable outlining from linkonc [...]
       new  70de7e0d9a9 [compiler-rt] FuzzedDataProvider: Add PickValueInArray for  [...]
       new  88cadb894ce [PowerPC][test] Add explicit dso_local to definitions in EL [...]
The 3 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
 clang/lib/CodeGen/CGBuiltin.cpp                    |   23 +-
 clang/lib/CodeGen/CGExpr.cpp                       |   16 +-
 clang/lib/CodeGen/CGExprScalar.cpp                 |    6 +-
 clang/lib/CodeGen/CodeGenModule.cpp                |   13 +-
 .../SystemZ/builtins-systemz-zvector-constrained.c |    4 +-
 .../CodeGen/SystemZ/builtins-systemz-zvector.c     |   44 +-
 .../builtins-systemz-zvector2-constrained.c        |    8 +-
 .../CodeGen/SystemZ/builtins-systemz-zvector2.c    |    8 +-
 clang/test/CodeGen/SystemZ/zvector.c               |  128 +-
 clang/test/CodeGen/X86/amx_api.c                   |   13 +-
 clang/test/CodeGen/X86/avx-builtins.c              |   34 +-
 clang/test/CodeGen/X86/avx2-builtins.c             |   22 +-
 clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c |  192 +--
 clang/test/CodeGen/X86/avx512bw-builtins.c         |   12 +-
 clang/test/CodeGen/X86/avx512dq-builtins.c         |   24 +-
 clang/test/CodeGen/X86/avx512f-builtins.c          |   56 +-
 .../CodeGen/X86/avx512vl-builtins-constrained.c    |    8 +-
 clang/test/CodeGen/X86/avx512vl-builtins.c         |   52 +-
 clang/test/CodeGen/X86/avx512vlbw-builtins.c       |   16 +-
 clang/test/CodeGen/X86/avx512vldq-builtins.c       |   12 +-
 clang/test/CodeGen/X86/f16c-builtins-constrained.c |    4 +-
 clang/test/CodeGen/X86/f16c-builtins.c             |    4 +-
 clang/test/CodeGen/X86/sse2-builtins.c             |    6 +-
 clang/test/CodeGen/arm-mve-intrinsics/compare.c    |  336 ++---
 .../test/CodeGen/arm-mve-intrinsics/cplusplus.cpp  |    4 +-
 clang/test/CodeGen/arm-mve-intrinsics/dup.c        |   96 +-
 clang/test/CodeGen/arm-mve-intrinsics/ternary.c    |   80 +-
 clang/test/CodeGen/arm-mve-intrinsics/vaddq.c      |   24 +-
 clang/test/CodeGen/arm-mve-intrinsics/vhaddq.c     |   36 +-
 clang/test/CodeGen/arm-mve-intrinsics/vhsubq.c     |   36 +-
 clang/test/CodeGen/arm-mve-intrinsics/vmovl.c      |   16 +-
 clang/test/CodeGen/arm-mve-intrinsics/vmovn.c      |   16 +-
 clang/test/CodeGen/arm-mve-intrinsics/vmulq.c      |   48 +-
 clang/test/CodeGen/arm-mve-intrinsics/vqaddq.c     |   24 +-
 clang/test/CodeGen/arm-mve-intrinsics/vqdmulhq.c   |   24 +-
 clang/test/CodeGen/arm-mve-intrinsics/vqdmullbq.c  |   16 +-
 clang/test/CodeGen/arm-mve-intrinsics/vqdmulltq.c  |   16 +-
 clang/test/CodeGen/arm-mve-intrinsics/vqrdmulhq.c  |   24 +-
 clang/test/CodeGen/arm-mve-intrinsics/vqsubq.c     |   24 +-
 clang/test/CodeGen/arm-mve-intrinsics/vrev.c       |   30 +-
 clang/test/CodeGen/arm-mve-intrinsics/vsubq.c      |   24 +-
 clang/test/CodeGen/arm64-abi-vector.c              |    8 +-
 clang/test/CodeGen/builtins-ppc-p10vector.c        |    8 +-
 clang/test/CodeGen/matrix-type-operators.c         |   60 +-
 clang/test/CodeGen/semantic-interposition-no.c     |   23 +
 clang/test/CodeGen/vecshift.c                      |   36 +-
 clang/test/CodeGenCXX/matrix-type-operators.cpp    |   28 +-
 clang/test/CodeGenCXX/vector-conditional.cpp       |   76 +-
 clang/test/CodeGenCXX/vector-splat-conversion.cpp  |    4 +-
 clang/test/CodeGenOpenCL/as_type.cl                |   14 +-
 clang/test/CodeGenOpenCL/bool_cast.cl              |    4 +-
 clang/test/CodeGenOpenCL/partial_initializer.cl    |    2 +-
 clang/test/CodeGenOpenCL/preserve_vec3.cl          |    4 +-
 clang/test/CodeGenOpenCL/shifts.cl                 |    4 +-
 clang/test/CodeGenOpenCL/vectorLoadStore.cl        |    2 +-
 clang/test/CodeGenOpenCL/vector_literals_valid.cl  |   18 +-
 compiler-rt/include/fuzzer/FuzzedDataProvider.h    |    9 +
 .../fuzzer/tests/FuzzedDataProviderUnittest.cpp    |   14 +
 compiler-rt/lib/lsan/lsan_common.cpp               |  114 +-
 compiler-rt/lib/lsan/lsan_common_fuchsia.cpp       |    4 +-
 .../lib/sanitizer_common/sanitizer_common.h        |   32 +-
 .../lib/sanitizer_common/sanitizer_stackdepot.cpp  |    3 +-
 .../tests/sanitizer_common_test.cpp                |   69 +-
 compiler-rt/lib/tsan/CMakeLists.txt                |   15 -
 compiler-rt/lib/tsan/dd/dd_interceptors.cpp        |   11 +-
 .../test/lsan/TestCases/suppressions_file.cpp      |   16 +-
 libc/config/linux/x86_64/entrypoints.txt           |    9 +
 libc/spec/stdc.td                                  |   12 +
 libc/src/math/CMakeLists.txt                       |  108 ++
 libc/src/math/llrint.cpp                           |   19 +
 libc/src/math/llrint.h                             |   18 +
 libc/src/math/llrintf.cpp                          |   19 +
 libc/src/math/llrintf.h                            |   18 +
 libc/src/math/llrintl.cpp                          |   19 +
 libc/src/math/llrintl.h                            |   18 +
 libc/src/math/lrint.cpp                            |   18 +
 libc/src/math/lrint.h                              |   18 +
 libc/src/math/lrintf.cpp                           |   18 +
 libc/src/math/lrintf.h                             |   18 +
 libc/src/math/lrintl.cpp                           |   19 +
 libc/src/math/lrintl.h                             |   18 +
 libc/src/math/rint.cpp                             |   18 +
 libc/src/math/rint.h                               |   18 +
 libc/src/math/rintf.cpp                            |   18 +
 libc/src/math/rintf.h                              |   18 +
 libc/src/math/rintl.cpp                            |   18 +
 libc/src/math/rintl.h                              |   18 +
 libc/test/src/math/CMakeLists.txt                  |  135 ++
 libc/test/src/math/RIntTest.h                      |  138 ++
 libc/test/src/math/RoundToIntegerTest.h            |  177 ++-
 libc/test/src/math/llrint_test.cpp                 |   13 +
 libc/test/src/math/llrintf_test.cpp                |   13 +
 libc/test/src/math/llrintl_test.cpp                |   14 +
 libc/test/src/math/lrint_test.cpp                  |   13 +
 libc/test/src/math/lrintf_test.cpp                 |   13 +
 libc/test/src/math/lrintl_test.cpp                 |   13 +
 libc/test/src/math/rint_test.cpp                   |   13 +
 libc/test/src/math/rintf_test.cpp                  |   13 +
 libc/test/src/math/rintl_test.cpp                  |   13 +
 libc/utils/FPUtil/NearestIntegerOperations.h       |  118 +-
 libc/utils/MPFRWrapper/MPFRUtils.cpp               |   48 +
 libc/utils/MPFRWrapper/MPFRUtils.h                 |    5 +
 libcxx/docs/Cxx2aStatusPaperStatus.csv             |    4 +-
 lld/ELF/Relocations.cpp                            |   10 +-
 lld/test/ELF/x86-64-gotpc-err.s                    |   21 +-
 lldb/source/Plugins/Process/POSIX/CrashReason.cpp  |   25 +
 lldb/source/Plugins/Process/POSIX/CrashReason.h    |    2 +
 llvm/include/llvm-c/Core.h                         |    7 +
 llvm/include/llvm/Analysis/DDG.h                   |    2 +-
 llvm/include/llvm/Analysis/IntervalIterator.h      |    2 +-
 llvm/include/llvm/Analysis/RegionInfoImpl.h        |    3 +-
 llvm/include/llvm/Analysis/VectorUtils.h           |   10 +-
 llvm/include/llvm/Bitcode/LLVMBitCodes.h           |    3 +-
 llvm/include/llvm/CodeGen/CodeGenPassBuilder.h     | 1144 +++++++++++++++++
 llvm/include/llvm/CodeGen/MachinePassRegistry.def  |  197 +++
 llvm/include/llvm/CodeGen/TargetPassConfig.h       |    4 +
 llvm/include/llvm/CodeGen/ValueTypes.td            |    1 +
 llvm/include/llvm/Demangle/ItaniumDemangle.h       |    8 +-
 llvm/include/llvm/Demangle/Utility.h               |    2 +-
 .../Orc/OrcRPCTargetProcessControl.h               |    4 +-
 .../ExecutionEngine/Orc/OrcRemoteTargetClient.h    |    9 +-
 .../ExecutionEngine/Orc/OrcRemoteTargetRPCAPI.h    |  282 +++--
 .../ExecutionEngine/Orc/OrcRemoteTargetServer.h    |    5 +-
 .../Orc/{RPC => Shared}/FDRawByteChannel.h         |   14 +-
 .../ExecutionEngine/Orc/{RPC => Shared}/RPCUtils.h |  250 ++--
 .../Orc/{RPC => Shared}/RawByteChannel.h           |   25 +-
 .../RPCSerialization.h => Shared/Serialization.h}  |  262 ++--
 .../Orc/TargetProcess/OrcRPCTPCServer.h            |   86 +-
 llvm/include/llvm/IR/DataLayout.h                  |    2 +
 llvm/include/llvm/IR/IRBuilder.h                   |    8 +-
 llvm/include/llvm/IR/Intrinsics.h                  |    3 +-
 llvm/include/llvm/IR/Intrinsics.td                 |    2 +
 llvm/include/llvm/IR/IntrinsicsRISCV.td            |   40 +-
 llvm/include/llvm/IR/IntrinsicsX86.td              |   32 +-
 llvm/include/llvm/IR/Type.h                        |   12 +-
 llvm/include/llvm/InterfaceStub/ELFObjHandler.h    |    5 +-
 llvm/include/llvm/Support/MachineValueType.h       |    4 +-
 llvm/include/llvm/Target/CGPassBuilderOption.h     |   65 +
 llvm/include/llvm/Target/TargetMachine.h           |   29 +
 llvm/include/llvm/Transforms/IPO/IROutliner.h      |   45 +-
 llvm/lib/Analysis/AliasSetTracker.cpp              |    2 +-
 llvm/lib/Analysis/ConstantFolding.cpp              |   15 +-
 llvm/lib/Analysis/DDG.cpp                          |    2 +-
 llvm/lib/Analysis/DependenceGraphBuilder.cpp       |    3 +-
 llvm/lib/Analysis/IRSimilarityIdentifier.cpp       |   12 +-
 llvm/lib/Analysis/LazyValueInfo.cpp                |    2 +-
 llvm/lib/Analysis/ScalarEvolution.cpp              |    4 +-
 llvm/lib/Analysis/TargetLibraryInfo.cpp            |    4 +-
 llvm/lib/Analysis/VectorUtils.cpp                  |    3 +-
 llvm/lib/AsmParser/LLLexer.cpp                     |    1 +
 llvm/lib/Bitcode/Reader/BitcodeReader.cpp          |    3 +
 llvm/lib/Bitcode/Writer/BitcodeWriter.cpp          |    1 +
 llvm/lib/CodeGen/CMakeLists.txt                    |    1 +
 llvm/lib/CodeGen/CodeGenPassBuilder.cpp            |   25 +
 llvm/lib/CodeGen/CodeGenPrepare.cpp                |    3 +-
 llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp    |    3 +-
 llvm/lib/CodeGen/LLVMTargetMachine.cpp             |   35 +-
 llvm/lib/CodeGen/TargetPassConfig.cpp              |  161 ++-
 llvm/lib/CodeGen/ValueTypes.cpp                    |    3 +
 llvm/lib/ExecutionEngine/Orc/Shared/RPCError.cpp   |   14 +-
 llvm/lib/IR/AsmWriter.cpp                          |    1 +
 llvm/lib/IR/AutoUpgrade.cpp                        |   21 +-
 llvm/lib/IR/ConstantFold.cpp                       |    2 +-
 llvm/lib/IR/Core.cpp                               |    8 +
 llvm/lib/IR/DataLayout.cpp                         |    2 +
 llvm/lib/IR/Function.cpp                           |    9 +-
 llvm/lib/IR/IRBuilder.cpp                          |   31 +-
 llvm/lib/IR/LLVMContextImpl.cpp                    |    1 +
 llvm/lib/IR/LLVMContextImpl.h                      |    2 +-
 llvm/lib/IR/PassRegistry.cpp                       |    6 +-
 llvm/lib/IR/SafepointIRVerifier.cpp                |    3 +-
 llvm/lib/IR/Type.cpp                               |   15 +
 llvm/lib/IR/Verifier.cpp                           |    2 -
 llvm/lib/InterfaceStub/ELFObjHandler.cpp           |   39 +-
 .../Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp   |    3 +-
 .../Target/AMDGPU/AMDGPULowerKernelArguments.cpp   |    3 +-
 .../Target/AMDGPU/AMDGPURewriteOutArguments.cpp    |    3 +-
 .../lib/Target/Hexagon/HexagonTargetObjectFile.cpp |    1 +
 llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp   |    3 +-
 llvm/lib/Target/PowerPC/PPCISelLowering.cpp        |   10 +-
 llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td    |  216 +++-
 llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td |   29 +
 llvm/lib/Target/TargetMachine.cpp                  |    8 -
 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp            |    4 +-
 llvm/lib/Target/X86/X86ISelLowering.cpp            |    7 +-
 llvm/lib/Target/X86/X86InterleavedAccess.cpp       |    3 +-
 llvm/lib/Target/X86/X86LowerAMXType.cpp            |  455 ++++---
 llvm/lib/Target/X86/X86RegisterInfo.td             |    2 +-
 llvm/lib/Transforms/IPO/IROutliner.cpp             |  330 ++++-
 .../Transforms/InstCombine/InstCombineCalls.cpp    |    3 +-
 .../InstCombine/InstCombineLoadStoreAlloca.cpp     |    4 +
 .../Transforms/Instrumentation/MemorySanitizer.cpp |   11 +-
 .../Transforms/Scalar/ConstraintElimination.cpp    |   25 +-
 .../Transforms/Scalar/LowerMatrixIntrinsics.cpp    |   10 +-
 llvm/lib/Transforms/Scalar/SROA.cpp                |   19 +-
 llvm/lib/Transforms/Utils/Local.cpp                |    4 +-
 llvm/lib/Transforms/Utils/LoopUtils.cpp            |   42 +-
 llvm/lib/Transforms/Utils/LowerInvoke.cpp          |    2 +-
 .../Transforms/Utils/PromoteMemoryToRegister.cpp   |    2 +-
 .../Transforms/Utils/ScalarEvolutionExpander.cpp   |    6 +-
 llvm/lib/Transforms/Utils/SimplifyCFG.cpp          |  124 +-
 llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp    |  390 +++---
 .../AArch64/aarch64-interleaved-ld-combine.ll      |   42 +-
 llvm/test/CodeGen/AMDGPU/lower-kernargs.ll         |   16 +-
 .../AMDGPU/rewrite-out-arguments-address-space.ll  |    2 +-
 llvm/test/CodeGen/AMDGPU/rewrite-out-arguments.ll  |   24 +-
 .../Generic/expand-experimental-reductions.ll      |   34 +-
 llvm/test/CodeGen/PowerPC/alias.ll                 |   10 +-
 llvm/test/CodeGen/PowerPC/atomics-constant.ll      |    2 +-
 llvm/test/CodeGen/PowerPC/dsolocal-pic.ll          |  124 ++
 llvm/test/CodeGen/PowerPC/dsolocal-static.ll       |  123 ++
 llvm/test/CodeGen/PowerPC/elf-common.ll            |   17 +-
 llvm/test/CodeGen/PowerPC/f128-arith.ll            |   48 +-
 llvm/test/CodeGen/PowerPC/f128-compare.ll          |   24 +-
 llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll  |   40 +-
 llvm/test/CodeGen/PowerPC/float-load-store-pair.ll |   36 +-
 llvm/test/CodeGen/PowerPC/fma-combine.ll           |   22 +-
 llvm/test/CodeGen/PowerPC/func-addr.ll             |    2 +-
 llvm/test/CodeGen/PowerPC/macro-fusion.ll          |    2 +-
 llvm/test/CodeGen/PowerPC/mcm-11.ll                |    4 +-
 llvm/test/CodeGen/PowerPC/mcm-3.ll                 |    4 +-
 llvm/test/CodeGen/PowerPC/mcm-obj-2.ll             |    6 +-
 llvm/test/CodeGen/PowerPC/mcm-obj.ll               |   40 +-
 llvm/test/CodeGen/PowerPC/mma-acc-memops.ll        |   40 +-
 llvm/test/CodeGen/PowerPC/p10-setbc-ri.ll          |  125 +-
 llvm/test/CodeGen/PowerPC/p10-setbc-rr.ll          |  213 ++--
 llvm/test/CodeGen/PowerPC/p10-setbcr-ri.ll         |   44 +-
 llvm/test/CodeGen/PowerPC/p10-setbcr-rr.ll         |  247 ++--
 llvm/test/CodeGen/PowerPC/p10-setnbc-ri.ll         |  203 ++-
 llvm/test/CodeGen/PowerPC/p10-setnbc-rr.ll         |  309 ++---
 llvm/test/CodeGen/PowerPC/p10-setnbcr-ri.ll        |   80 +-
 llvm/test/CodeGen/PowerPC/p10-setnbcr-rr.ll        |  336 +++--
 llvm/test/CodeGen/PowerPC/pcrel-tls-local-exec.ll  |   14 +-
 llvm/test/CodeGen/PowerPC/peephole-align.ll        |   30 +-
 llvm/test/CodeGen/PowerPC/peephole-cmp-eq.mir      |   44 +
 llvm/test/CodeGen/PowerPC/pie.ll                   |    4 +-
 llvm/test/CodeGen/PowerPC/ppc64-calls.ll           |   12 +-
 llvm/test/CodeGen/PowerPC/ppc64-nonfunc-calls.ll   |   10 +-
 .../CodeGen/PowerPC/ppc64-sibcall-shrinkwrap.ll    |    4 +-
 llvm/test/CodeGen/PowerPC/ppc64-sibcall.ll         |   50 +-
 llvm/test/CodeGen/PowerPC/pr32140.ll               |   41 +-
 llvm/test/CodeGen/PowerPC/pr48388.ll               |   41 +
 llvm/test/CodeGen/PowerPC/preemption.ll            |  302 -----
 llvm/test/CodeGen/PowerPC/sched-addi.ll            |    4 +-
 .../PowerPC/tailcall-speculatable-callee.ll        |    2 +-
 llvm/test/CodeGen/PowerPC/tailcall-string-rvo.ll   |    4 +-
 llvm/test/CodeGen/PowerPC/tailcall1-64.ll          |    4 +-
 llvm/test/CodeGen/PowerPC/testComparesi32gtu.ll    |   30 +-
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 llvm/test/CodeGen/PowerPC/testComparesieqsc.ll     |   38 +-
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 llvm/test/CodeGen/PowerPC/testComparesllgeuc.ll    |  102 +-
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 llvm/test/CodeGen/PowerPC/testComparesllgeull.ll   |  102 +-
 llvm/test/CodeGen/PowerPC/testComparesllgeus.ll    |  102 +-
 llvm/test/CodeGen/PowerPC/testCompareslllesc.ll    |   16 +-
 llvm/test/CodeGen/PowerPC/testCompareslllesi.ll    |   16 +-
 llvm/test/CodeGen/PowerPC/testCompareslllesll.ll   |   30 +-
 llvm/test/CodeGen/PowerPC/testComparesllless.ll    |   16 +-
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 llvm/test/CodeGen/PowerPC/testComparesllleui.ll    |  111 +-
 llvm/test/CodeGen/PowerPC/testComparesllleull.ll   |  108 +-
 llvm/test/CodeGen/PowerPC/testComparesllleus.ll    |  111 +-
 llvm/test/CodeGen/PowerPC/testComparesllltsll.ll   |   95 +-
 llvm/test/CodeGen/PowerPC/testComparesllltuc.ll    |   52 +-
 llvm/test/CodeGen/PowerPC/testComparesllltus.ll    |   52 +-
 llvm/test/CodeGen/PowerPC/testComparesllnesll.ll   |   34 +-
 llvm/test/CodeGen/PowerPC/testComparesllneull.ll   |   34 +-
 llvm/test/CodeGen/PowerPC/tls.ll                   |    6 +-
 llvm/test/CodeGen/RISCV/rvv/vand-sdnode-rv32.ll    | 1333 ++++++++++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vand-sdnode-rv64.ll    | 1305 +++++++++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll      |  650 ++++++++++
 llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll      |  830 ++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode-rv32.ll   |  559 ++++++++
 llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode-rv64.ll   |  531 ++++++++
 llvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll          |  664 ++++++++++
 llvm/test/CodeGen/RISCV/rvv/vsext-rv64.ll          | 1162 +++++++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv32.ll    | 1069 ++++++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv64.ll    | 1041 +++++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vsub-sdnode-rv32.ll    |  805 ++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vsub-sdnode-rv64.ll    |  777 ++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vxor-sdnode-rv32.ll    | 1333 ++++++++++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vxor-sdnode-rv64.ll    | 1305 +++++++++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vzext-rv32.ll          |  664 ++++++++++
 llvm/test/CodeGen/RISCV/rvv/vzext-rv64.ll          | 1162 +++++++++++++++++
 llvm/test/CodeGen/X86/AMX/amx-across-func.ll       |   28 +-
 llvm/test/CodeGen/X86/AMX/amx-config.ll            |   40 +-
 llvm/test/CodeGen/X86/AMX/amx-intrinsic-chain.ll   |   25 +-
 llvm/test/CodeGen/X86/AMX/amx-spill.ll             |   56 +-
 llvm/test/CodeGen/X86/AMX/amx-type.ll              |  235 ++--
 llvm/test/CodeGen/X86/fold-add-pcrel.ll            |   41 -
 llvm/test/CodeGen/X86/fold-add.ll                  |  125 +-
 .../CodeGen/X86/semantic-interposition-comdat.ll   |   28 -
 .../X86/semantic-interposition-infer-dsolocal.ll   |   46 -
 llvm/test/Instrumentation/MemorySanitizer/clmul.ll |   16 +-
 llvm/test/Transforms/ConstraintElimination/and.ll  |   67 +
 llvm/test/Transforms/ConstraintElimination/or.ll   |   61 +
 llvm/test/Transforms/GVNSink/indirect-call.ll      |    2 +-
 llvm/test/Transforms/GVNSink/sink-common-code.ll   |    2 +-
 llvm/test/Transforms/IROutliner/extraction.ll      |    2 +-
 llvm/test/Transforms/IROutliner/illegal-allocas.ll |    2 +-
 llvm/test/Transforms/IROutliner/illegal-assumes.ll |    2 +-
 .../test/Transforms/IROutliner/illegal-branches.ll |    2 +-
 llvm/test/Transforms/IROutliner/illegal-callbr.ll  |    2 +-
 llvm/test/Transforms/IROutliner/illegal-calls.ll   |    2 +-
 .../test/Transforms/IROutliner/illegal-catchpad.ll |    2 +-
 llvm/test/Transforms/IROutliner/illegal-cleanup.ll |    2 +-
 llvm/test/Transforms/IROutliner/illegal-frozen.ll  |    2 +-
 llvm/test/Transforms/IROutliner/illegal-gep.ll     |    2 +-
 llvm/test/Transforms/IROutliner/illegal-invoke.ll  |    2 +-
 .../Transforms/IROutliner/illegal-landingpad.ll    |    2 +-
 llvm/test/Transforms/IROutliner/illegal-memcpy.ll  |    2 +-
 llvm/test/Transforms/IROutliner/illegal-memmove.ll |    2 +-
 llvm/test/Transforms/IROutliner/illegal-memset.ll  |    2 +-
 .../Transforms/IROutliner/illegal-phi-nodes.ll     |    2 +-
 llvm/test/Transforms/IROutliner/illegal-vaarg.ll   |    2 +-
 llvm/test/Transforms/IROutliner/legal-debug.ll     |    2 +-
 llvm/test/Transforms/IROutliner/opt-remarks.ll     |  184 +++
 .../IROutliner/outlining-address-taken.ll          |    2 +-
 .../IROutliner/outlining-commutative-fp.ll         |    2 +-
 .../Transforms/IROutliner/outlining-commutative.ll |    2 +-
 .../IROutliner/outlining-constants-vs-registers.ll |    2 +-
 .../Transforms/IROutliner/outlining-cost-model.ll  |  183 +++
 ...-constants.ll => outlining-debug-statements.ll} |   33 +-
 .../IROutliner/outlining-different-constants.ll    |    2 +-
 .../IROutliner/outlining-different-globals.ll      |    2 +-
 .../outlining-different-output-blocks.ll           |    2 +-
 .../IROutliner/outlining-different-structure.ll    |    2 +-
 llvm/test/Transforms/IROutliner/outlining-odr.ll   |   70 +
 .../IROutliner/outlining-remapped-outputs.ll       |    2 +-
 .../IROutliner/outlining-same-constants.ll         |    2 +-
 .../IROutliner/outlining-same-globals.ll           |    2 +-
 .../IROutliner/outlining-same-output-blocks.ll     |    2 +-
 .../Transforms/IROutliner/outlining-swift-error.ll |   47 +
 .../amdgcn-demanded-vector-elts-inseltpoison.ll    |   28 +-
 .../AMDGPU/amdgcn-demanded-vector-elts.ll          |  278 ++--
 .../X86/x86-vector-shifts-inseltpoison.ll          |   36 +-
 .../InstCombine/X86/x86-vector-shifts.ll           |   36 +-
 .../Transforms/InstCombine/assume-inseltpoison.ll  |  633 +---------
 .../Transforms/InstCombine/bswap-inseltpoison.ll   |  784 +-----------
 .../InstCombine/canonicalize-vector-insert.ll      |   16 +-
 .../Transforms/InstCombine/fmul-inseltpoison.ll    | 1129 +----------------
 .../Transforms/InstCombine/gep-inbounds-null.ll    |    2 +-
 llvm/test/Transforms/InstCombine/getelementptr.ll  |    4 +-
 .../shuffle-select-narrow-inseltpoison.ll          |   12 +-
 .../InstCombine/shuffle-select-narrow.ll           |   12 +-
 .../InstCombine/type_pun-inseltpoison.ll           |    2 +-
 llvm/test/Transforms/InstCombine/type_pun.ll       |    2 +-
 .../InstCombine/vec_shuffle-inseltpoison.ll        |   16 +-
 llvm/test/Transforms/InstCombine/vec_shuffle.ll    |   16 +-
 llvm/test/Transforms/InstCombine/vscale_cmp.ll     |    8 +-
 .../AArch64/interleaved-accesses-inseltpoison.ll   |    4 +-
 .../AArch64/interleaved-accesses.ll                |  100 +-
 .../ARM/interleaved-accesses-inseltpoison.ll       |    8 +-
 .../InterleavedAccess/ARM/interleaved-accesses.ll  |    8 +-
 .../X86/interleavedStore-inseltpoison.ll           |   12 +-
 .../InterleavedAccess/X86/interleavedStore.ll      |   12 +-
 .../AArch64/arbitrary-induction-step.ll            |   12 +-
 .../outer_loop_test1_no_explicit_vect_width.ll     |    8 +-
 .../Transforms/LoopVectorize/AMDGPU/packed-math.ll |    4 +-
 .../ARM/mve-gather-scatter-tailpred.ll             |   20 +-
 .../LoopVectorize/ARM/mve-reduction-types.ll       |   36 +-
 .../Transforms/LoopVectorize/ARM/pointer_iv.ll     |   82 +-
 llvm/test/Transforms/LoopVectorize/ARM/sphinx.ll   |    6 +-
 .../LoopVectorize/ARM/tail-folding-not-allowed.ll  |    2 +-
 .../PowerPC/optimal-epilog-vectorization.ll        |  680 ++++++++--
 .../LoopVectorize/PowerPC/widened-massv-call.ll    |    4 +-
 .../PowerPC/widened-massv-vfabi-attr.ll            |    4 +-
 .../LoopVectorize/X86/consecutive-ptr-uniforms.ll  |    8 +-
 .../Transforms/LoopVectorize/X86/constant-fold.ll  |   10 +-
 .../LoopVectorize/X86/cost-model-assert.ll         |   16 +-
 .../Transforms/LoopVectorize/X86/interleaving.ll   |    4 +-
 .../LoopVectorize/X86/invariant-load-gather.ll     |   16 +-
 .../X86/invariant-store-vectorization.ll           |   48 +-
 .../LoopVectorize/X86/load-deref-pred.ll           |   16 +-
 .../LoopVectorize/X86/masked_load_store.ll         |   64 +-
 .../LoopVectorize/X86/metadata-enable.ll           |   84 +-
 llvm/test/Transforms/LoopVectorize/X86/optsize.ll  |  162 ++-
 .../X86/outer_loop_test1_no_explicit_vect_width.ll |    8 +-
 llvm/test/Transforms/LoopVectorize/X86/pr34438.ll  |    4 +-
 .../Transforms/LoopVectorize/X86/small-size.ll     |   24 +-
 .../LoopVectorize/X86/tail_loop_folding.ll         |   16 +-
 .../Transforms/LoopVectorize/X86/uniform_mem_op.ll |   48 +-
 .../LoopVectorize/X86/vect.omp.force.small-tc.ll   |   20 +-
 .../X86/x86-interleaved-accesses-masked-group.ll   |  174 +--
 .../LoopVectorize/consecutive-ptr-uniforms.ll      |    4 +-
 .../LoopVectorize/dont-fold-tail-for-const-TC.ll   |    4 +-
 .../dont-fold-tail-for-divisible-TC.ll             |    4 +-
 .../first-order-recurrence-complex.ll              |    8 +-
 .../Transforms/LoopVectorize/float-induction.ll    |   44 +-
 .../LoopVectorize/float-minmax-instruction-flag.ll |   12 +-
 .../Transforms/LoopVectorize/if-pred-stores.ll     |    8 +-
 .../Transforms/LoopVectorize/induction-step.ll     |   32 +-
 llvm/test/Transforms/LoopVectorize/induction.ll    |   12 +-
 .../LoopVectorize/interleaved-accesses-1.ll        |    4 +-
 .../interleaved-accesses-pred-stores.ll            |    6 +-
 .../LoopVectorize/interleaved-accesses.ll          |   64 +-
 .../LoopVectorize/invariant-store-vectorization.ll |   18 +-
 llvm/test/Transforms/LoopVectorize/loop-form.ll    |    4 +-
 .../Transforms/LoopVectorize/minmax_reduction.ll   |    4 +-
 .../multiple-strides-vectorization.ll              |    4 +-
 .../LoopVectorize/optimal-epilog-vectorization.ll  |  119 +-
 llvm/test/Transforms/LoopVectorize/optsize.ll      |    4 +-
 .../Transforms/LoopVectorize/outer_loop_test1.ll   |    4 +-
 .../Transforms/LoopVectorize/outer_loop_test2.ll   |    8 +-
 .../Transforms/LoopVectorize/pointer-induction.ll  |   66 +-
 .../LoopVectorize/pr39417-optsize-scevchecks.ll    |    4 +-
 .../LoopVectorize/pr44488-predication.ll           |    8 +-
 .../LoopVectorize/pr46525-expander-insertpoint.ll  |   52 +-
 llvm/test/Transforms/LoopVectorize/reduction.ll    |   36 +-
 .../scalable-loop-unpredicated-body-scalar-tail.ll |    6 +-
 .../Transforms/LoopVectorize/select-reduction.ll   |   16 +-
 llvm/test/Transforms/LoopVectorize/vector-geps.ll  |    4 +-
 .../bigger-expressions-double.ll                   |  895 ++++++-------
 .../Transforms/LowerMatrixIntrinsics/const-gep.ll  |   56 +-
 .../LowerMatrixIntrinsics/load-align-volatile.ll   |    2 +-
 .../multiply-add-sub-double-row-major.ll           |   80 +-
 .../multiply-double-contraction-fmf.ll             |   64 +-
 .../multiply-double-contraction.ll                 |   64 +-
 .../multiply-double-row-major.ll                   |  243 ++--
 .../LowerMatrixIntrinsics/multiply-double.ll       |  240 ++--
 .../multiply-float-contraction-fmf.ll              |   64 +-
 .../multiply-float-contraction.ll                  |   64 +-
 .../LowerMatrixIntrinsics/multiply-float.ll        |  240 ++--
 .../LowerMatrixIntrinsics/multiply-fused-loops.ll  |  224 ++--
 .../multiply-fused-multiple-blocks.ll              |  420 +++---
 .../multiply-fused-volatile.ll                     |  440 +++----
 .../LowerMatrixIntrinsics/multiply-fused.ll        |   32 +-
 .../multiply-i32-row-major.ll                      |  243 ++--
 .../LowerMatrixIntrinsics/multiply-i32.ll          |  240 ++--
 .../LowerMatrixIntrinsics/propagate-backward.ll    |   24 +-
 .../propagate-backwards-unsupported.ll             |  411 +++++-
 .../LowerMatrixIntrinsics/propagate-forward.ll     |   32 +-
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 .../LowerMatrixIntrinsics/store-align-volatile.ll  |   18 +-
 .../LowerMatrixIntrinsics/strided-load-double.ll   |   24 +-
 .../LowerMatrixIntrinsics/strided-load-float.ll    |   24 +-
 .../LowerMatrixIntrinsics/strided-load-i32.ll      |   24 +-
 .../LowerMatrixIntrinsics/strided-store-double.ll  |   18 +-
 .../LowerMatrixIntrinsics/strided-store-float.ll   |   18 +-
 .../LowerMatrixIntrinsics/strided-store-i32.ll     |   18 +-
 .../transpose-double-row-major.ll                  |   26 +-
 .../LowerMatrixIntrinsics/transpose-double.ll      |   20 +-
 .../transpose-float-row-major.ll                   |   26 +-
 .../LowerMatrixIntrinsics/transpose-float.ll       |   20 +-
 .../transpose-i32-row-major.ll                     |   26 +-
 .../LowerMatrixIntrinsics/transpose-i32.ll         |   20 +-
 .../X86/scalarization-inseltpoison.ll              |    2 +-
 .../Transforms/PhaseOrdering/X86/scalarization.ll  |    2 +-
 .../PhaseOrdering/X86/shuffle-inseltpoison.ll      |   14 +-
 llvm/test/Transforms/PhaseOrdering/X86/shuffle.ll  |   14 +-
 llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll     |    4 +-
 .../X86/vector-reductions-expanded.ll              |   34 +-
 .../PhaseOrdering/X86/vector-reductions.ll         |   14 +-
 .../RewriteStatepointsForGC/scalar-base-vector.ll  |   12 +-
 .../Transforms/SLPVectorizer/AArch64/PR38339.ll    |    6 +-
 .../SLPVectorizer/AMDGPU/horizontal-store.ll       |   30 +-
 .../Transforms/SLPVectorizer/AMDGPU/reduction.ll   |   54 +-
 llvm/test/Transforms/SLPVectorizer/X86/PR32086.ll  |    6 +-
 llvm/test/Transforms/SLPVectorizer/X86/PR39774.ll  |    4 +-
 llvm/test/Transforms/SLPVectorizer/X86/PR40310.ll  |    2 +-
 .../Transforms/SLPVectorizer/X86/commutativity.ll  |   38 +-
 .../X86/external_user_jumbled_load-inseltpoison.ll |    2 +-
 .../X86/external_user_jumbled_load.ll              |   12 +-
 llvm/test/Transforms/SLPVectorizer/X86/extract.ll  |   10 +-
 llvm/test/Transforms/SLPVectorizer/X86/hoist.ll    |    2 +-
 .../Transforms/SLPVectorizer/X86/horizontal.ll     |   35 +
 .../insert-element-build-vector-inseltpoison.ll    |    6 +-
 .../X86/insert-element-build-vector.ll             |   12 +-
 .../SLPVectorizer/X86/jumbled-load-multiuse.ll     |    6 +-
 .../X86/jumbled-load-shuffle-placement.ll          |    8 +-
 .../SLPVectorizer/X86/jumbled-load-used-in-phi.ll  |    8 +-
 .../Transforms/SLPVectorizer/X86/jumbled-load.ll   |   18 +-
 .../SLPVectorizer/X86/jumbled_store_crash.ll       |    6 +-
 .../SLPVectorizer/X86/load-merge-inseltpoison.ll   |    2 +-
 .../Transforms/SLPVectorizer/X86/load-merge.ll     |    2 +-
 llvm/test/Transforms/SLPVectorizer/X86/partail.ll  |    2 +-
 llvm/test/Transforms/SLPVectorizer/X86/phi.ll      |   12 +-
 llvm/test/Transforms/SLPVectorizer/X86/pr47623.ll  |    2 +-
 .../SLPVectorizer/X86/reduction_loads.ll           |    4 +-
 .../SLPVectorizer/X86/reorder_repeated_ops.ll      |    4 +-
 .../X86/reuse-extracts-in-wider-vect.ll            |    2 +-
 .../Transforms/SLPVectorizer/X86/store-jumbled.ll  |    2 +-
 .../SLPVectorizer/X86/stores_vectorize.ll          |    2 +-
 .../SLPVectorizer/X86/vectorize-reorder-reuse.ll   |    6 +-
 .../Transforms/SLPVectorizer/slp-max-phi-size.ll   |    4 +-
 llvm/test/Transforms/SROA/vector-promotion.ll      |   18 +-
 llvm/test/Transforms/Scalarizer/vector-gep.ll      |   12 +-
 .../SimplifyCFG/2004-12-10-SimplifyCFGCrash.ll     |    2 +-
 .../Transforms/SimplifyCFG/2005-06-16-PHICrash.ll  |    2 +-
 .../SimplifyCFG/2008-07-13-InfLoopMiscompile.ll    |    2 +-
 llvm/test/Transforms/SimplifyCFG/BrUnwind.ll       |    2 +-
 llvm/test/Transforms/SimplifyCFG/HoistCode.ll      |    2 +-
 llvm/test/Transforms/SimplifyCFG/InfLoop.ll        |    2 +-
 .../Transforms/SimplifyCFG/UncondBranchToReturn.ll |    2 +-
 .../Transforms/SimplifyCFG/X86/critedge-assume.ll  |    2 +-
 .../Transforms/SimplifyCFG/X86/empty-cleanuppad.ll |    2 +-
 llvm/test/Transforms/SimplifyCFG/X86/pr39187-g.ll  |    2 +-
 .../Transforms/SimplifyCFG/branch-phi-thread.ll    |    2 +-
 .../SimplifyCFG/debug-info-thread-phi.ll           |    2 +-
 llvm/test/Transforms/SimplifyCFG/extract-cost.ll   |    2 +-
 .../Transforms/SimplifyCFG/hoist-common-code.ll    |    2 +-
 .../Transforms/SimplifyCFG/hoist-with-range.ll     |    2 +-
 .../SimplifyCFG/implied-cond-matching-imm.ll       |    2 +-
 .../Transforms/SimplifyCFG/iterative-simplify.ll   |    2 +-
 .../Transforms/SimplifyCFG/merge-cond-stores-2.ll  |    2 +-
 .../Transforms/SimplifyCFG/merge-cond-stores.ll    |    2 +-
 llvm/test/Transforms/SimplifyCFG/pr34131.ll        |    2 +-
 llvm/test/Transforms/SimplifyCFG/pr39807.ll        |    2 +-
 llvm/test/Transforms/SimplifyCFG/pr46638.ll        |    2 +-
 .../SimplifyCFG/preserve-store-alignment.ll        |    2 +-
 .../Transforms/SimplifyCFG/sink-common-code.ll     |    2 +-
 .../SimplifyCFG/switch-on-const-select.ll          |    2 +-
 llvm/test/Transforms/SimplifyCFG/switch_create.ll  |  139 +-
 .../test/Transforms/SimplifyCFG/unprofitable-pr.ll |    2 +-
 .../AMDGPU/as-transition-inseltpoison.ll           |    2 +-
 .../VectorCombine/AMDGPU/as-transition.ll          |    2 +-
 .../X86/extract-binop-inseltpoison.ll              |   40 +-
 .../Transforms/VectorCombine/X86/extract-binop.ll  |   40 +-
 .../VectorCombine/X86/extract-cmp-binop.ll         |    8 +-
 .../Transforms/VectorCombine/X86/extract-cmp.ll    |   10 +-
 .../VectorCombine/X86/load-inseltpoison.ll         |   38 +-
 llvm/test/Transforms/VectorCombine/X86/load.ll     |   38 +-
 .../VectorCombine/X86/shuffle-inseltpoison.ll      |   10 +-
 llvm/test/Transforms/VectorCombine/X86/shuffle.ll  |   50 +-
 .../tools/llvm-elfabi/preserve-dates-stub.test     |   19 +
 .../test/tools/llvm-elfabi/preserve-dates-tbe.test |    8 +
 llvm/tools/lli/ChildTarget/ChildTarget.cpp         |    6 +-
 llvm/tools/lli/RemoteJITUtils.h                    |    4 +-
 llvm/tools/lli/lli.cpp                             |    8 +-
 llvm/tools/llvm-c-test/echo.cpp                    |    2 +
 llvm/tools/llvm-elfabi/llvm-elfabi.cpp             |   33 +-
 .../llvm-jitlink-executor.cpp                      |    8 +-
 llvm/tools/llvm-jitlink/llvm-jitlink.cpp           |   10 +-
 llvm/tools/llvm-jitlink/llvm-jitlink.h             |    8 +-
 llvm/unittests/ExecutionEngine/Orc/QueueChannel.h  |   12 +-
 .../unittests/ExecutionEngine/Orc/RPCUtilsTest.cpp |  104 +-
 llvm/unittests/IR/PatternMatch.cpp                 |   11 +-
 llvm/utils/TableGen/CodeGenTarget.cpp              |    1 +
 llvm/utils/TableGen/IntrinsicEmitter.cpp           |    4 +-
 llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn  |    1 +
 mlir/include/mlir-c/Bindings/Python/Interop.h      |   21 +
 mlir/include/mlir/Bindings/Python/Attributes.td    |   16 +-
 mlir/include/mlir/Dialect/StandardOps/IR/Ops.td    |   33 +-
 mlir/include/mlir/IR/OpBase.td                     |   13 +-
 mlir/include/mlir/Interfaces/ViewLikeInterface.td  |   31 +-
 mlir/lib/Bindings/Python/CMakeLists.txt            |   19 +
 mlir/lib/Bindings/Python/IRModules.cpp             |   90 +-
 mlir/lib/Bindings/Python/IRModules.h               |   22 +
 mlir/lib/Dialect/StandardOps/IR/Ops.cpp            |    2 +-
 mlir/lib/Pass/PassRegistry.cpp                     |   11 +-
 mlir/lib/Transforms/Inliner.cpp                    |    4 +
 mlir/test/Bindings/Python/ir_affine_map.py         |   24 +
 mlir/test/Bindings/Python/ir_attributes.py         |   14 +
 mlir/test/Bindings/Python/ir_operation.py          |   27 +-
 mlir/test/Pass/invalid-pass.mlir                   |    6 +
 mlir/test/mlir-tblgen/op-python-bindings.td        |  148 +--
 mlir/test/mlir-tblgen/rewriter-indexing.td         |    8 +
 mlir/test/mlir-tblgen/types.mlir                   |    2 +-
 mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp      |   61 +-
 mlir/tools/mlir-tblgen/RewriterGen.cpp             |    2 +-
 .../Isl/CodeGen/invariant_load_hoist_alignment.ll  |    2 +-
 polly/test/Isl/CodeGen/simple_vec_cast.ll          |    4 +-
 polly/test/Isl/CodeGen/simple_vec_const.ll         |    4 +-
 polly/test/Isl/CodeGen/simple_vec_ptr_ptr_ty.ll    |    4 +-
 614 files changed, 29983 insertions(+), 12625 deletions(-)
 create mode 100644 clang/test/CodeGen/semantic-interposition-no.c
 create mode 100644 libc/src/math/llrint.cpp
 create mode 100644 libc/src/math/llrint.h
 create mode 100644 libc/src/math/llrintf.cpp
 create mode 100644 libc/src/math/llrintf.h
 create mode 100644 libc/src/math/llrintl.cpp
 create mode 100644 libc/src/math/llrintl.h
 create mode 100644 libc/src/math/lrint.cpp
 create mode 100644 libc/src/math/lrint.h
 create mode 100644 libc/src/math/lrintf.cpp
 create mode 100644 libc/src/math/lrintf.h
 create mode 100644 libc/src/math/lrintl.cpp
 create mode 100644 libc/src/math/lrintl.h
 create mode 100644 libc/src/math/rint.cpp
 create mode 100644 libc/src/math/rint.h
 create mode 100644 libc/src/math/rintf.cpp
 create mode 100644 libc/src/math/rintf.h
 create mode 100644 libc/src/math/rintl.cpp
 create mode 100644 libc/src/math/rintl.h
 create mode 100644 libc/test/src/math/RIntTest.h
 create mode 100644 libc/test/src/math/llrint_test.cpp
 create mode 100644 libc/test/src/math/llrintf_test.cpp
 create mode 100644 libc/test/src/math/llrintl_test.cpp
 create mode 100644 libc/test/src/math/lrint_test.cpp
 create mode 100644 libc/test/src/math/lrintf_test.cpp
 create mode 100644 libc/test/src/math/lrintl_test.cpp
 create mode 100644 libc/test/src/math/rint_test.cpp
 create mode 100644 libc/test/src/math/rintf_test.cpp
 create mode 100644 libc/test/src/math/rintl_test.cpp
 create mode 100644 llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
 create mode 100644 llvm/include/llvm/CodeGen/MachinePassRegistry.def
 rename llvm/include/llvm/ExecutionEngine/Orc/{RPC => Shared}/FDRawByteChannel.h (87%)
 rename llvm/include/llvm/ExecutionEngine/Orc/{RPC => Shared}/RPCUtils.h (89%)
 rename llvm/include/llvm/ExecutionEngine/Orc/{RPC => Shared}/RawByteChannel.h (88%)
 rename llvm/include/llvm/ExecutionEngine/Orc/{RPC/RPCSerialization.h => Shared/Ser [...]
 create mode 100644 llvm/include/llvm/Target/CGPassBuilderOption.h
 create mode 100644 llvm/lib/CodeGen/CodeGenPassBuilder.cpp
 create mode 100644 llvm/test/CodeGen/PowerPC/dsolocal-pic.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/dsolocal-static.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/peephole-cmp-eq.mir
 create mode 100644 llvm/test/CodeGen/PowerPC/pr48388.ll
 delete mode 100644 llvm/test/CodeGen/PowerPC/preemption.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vand-sdnode-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vand-sdnode-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsext-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsub-sdnode-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsub-sdnode-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vxor-sdnode-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vxor-sdnode-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vzext-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vzext-rv64.ll
 delete mode 100644 llvm/test/CodeGen/X86/fold-add-pcrel.ll
 delete mode 100644 llvm/test/CodeGen/X86/semantic-interposition-comdat.ll
 delete mode 100644 llvm/test/CodeGen/X86/semantic-interposition-infer-dsolocal.ll
 create mode 100644 llvm/test/Transforms/IROutliner/opt-remarks.ll
 create mode 100644 llvm/test/Transforms/IROutliner/outlining-cost-model.ll
 copy llvm/test/Transforms/IROutliner/{outlining-same-constants.ll => outlining-deb [...]
 create mode 100644 llvm/test/Transforms/IROutliner/outlining-odr.ll
 create mode 100644 llvm/test/Transforms/IROutliner/outlining-swift-error.ll
 create mode 100644 llvm/test/tools/llvm-elfabi/preserve-dates-stub.test
 create mode 100644 llvm/test/tools/llvm-elfabi/preserve-dates-tbe.test
 create mode 100644 mlir/test/Bindings/Python/ir_affine_map.py
 create mode 100644 mlir/test/Pass/invalid-pass.mlir
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[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig updated (79cbb003c53 -> 88cadb894ce)