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from 87f97ffba93 ifcombine field merge: handle masks with sign extensions new 46194b91278 RISC-V: Make vector strided store alias all other memories new d0635492172 RISC-V: Adjust the strided store testcases check times on options
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Summary of changes: gcc/config/riscv/vector.md | 19 ++++++++--------- .../rvv/autovec/strided/strided_ld_st-1-f64.c | 3 ++- .../rvv/autovec/strided/strided_ld_st-1-i64.c | 3 ++- .../rvv/autovec/strided/strided_ld_st-1-u64.c | 3 ++- .../gcc.target/riscv/rvv/base/pr118075-run-1.c | 24 ++++++++++++++++++++++ 5 files changed, 39 insertions(+), 13 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr118075-run-1.c