This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allmodconfig in repository toolchain/ci/gcc.
from 65167982efa Fortran: add contiguous check for ptr assignment, fix non-c [...] adds 734eed68537 c++: Kill DECL_HIDDEN_FRIEND_P adds aa248b8db9a middle-end: Refactor refcnt to use SLP_TREE_REF_COUNT for c [...] adds 97b798d80ba [SLP][VECT] Add check to fix 96837 adds 6bd4ce64eb4 [GCC][PATCH] arm: Fix MVE intrinsics polymorphic variants w [...] adds b6860cb96d0 aarch64: add support for Cortex-A78 and Cortex-A78AE adds 60e4b3cade5 arm: add support for Cortex-A78 and Cortex-A78AE adds 9ff2bcd9df8 amend SLP reduction testcases adds ef11f5b37b0 arm: [testsuite] Skip thumb2-cond-cmp tests on Cortex-M [PR94595] adds 373b99dc409 Add a testcase for PR target/96827 adds 1814c828a02 Add trailing dots so length of spec string matches number o [...] adds ecd700c1bc6 Fix some fnspec strings in trans-decl.c adds 091ddcc1b21 libgomp: Enforce 1-thread limit in subteams adds 73ae6eb5725 libstdc++: Use __is_same instead of __is_same_as adds e808f3fdfa8 PR c/97206 - ICE in composite_type on declarations of a sim [...] adds 7dbc7ad524a Avoid assuming a VLA access specification string contains a [...] adds d1ac0f0dfba libstdc++: Fix test_and_acquire / set_and_release for EABI [...] adds 660bfe61d40 Daily bump. adds cf7dae01734 c++: CTAD and explicit deduction guides for copy-list-init [...] adds c6be439b377 [RS6000] -mno-minimal-toc vs. power10 pcrelative adds 2dd7b93778d [RS6000] Adjust gcc asm for power10 adds 2c5499b57cf libgo: add 32-bit RISC-V (RV32) support adds 324bec558e9 PR target/97250: i386: Add support for x86-64-v2, x86-64-v3 [...] adds 36e691d3a62 tree-optimization/97255 - missing vector bool pattern of SR [...] adds 85516b71730 s390: Fix up s390_atomic_assign_expand_fenv adds 2805fcb3266 c++: Handle std::construct_at on automatic vars during cons [...] adds 56da736cc6c c++: Fix up default initialization with consteval default c [...] adds 8d268d75ad7 [testsuite] Enable pr94600-{1,3}.c tests for nvptx adds f9c86e3105d arm: Fix ordering in arm-cpus.in adds 026ca1121c2 libstdc++: Fix test_and_acquire for EABI adds 9bab2a0dc84 c++: Refactor lookup_and_check_tag new 6eda9fa5f61 Initial implementation of value query class. new ba663ac1b1a Fix handling of fnspec for internal functions. new bc2fcccd9d5 Fix ICE in ipa_edge_args_sum_t::duplicate new a12041339e8 Add -fno-ipa-modref to gcc.dg/ipa/remref-2a.c
The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: gcc/ChangeLog | 181 +++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/Makefile.in | 1 + gcc/attribs.c | 41 ++--- gcc/c-family/ChangeLog | 6 + gcc/c-family/c-attribs.c | 18 +- gcc/common/config/i386/i386-common.c | 10 +- gcc/config/aarch64/aarch64-cores.def | 2 + gcc/config/aarch64/aarch64-tune.md | 2 +- gcc/config/arm/arm-cpus.in | 45 +++-- gcc/config/arm/arm-tables.opt | 12 +- gcc/config/arm/arm-tune.md | 9 +- gcc/config/arm/arm_mve.h | 167 +++++++++---------- gcc/config/i386/i386-options.c | 29 +++- gcc/config/i386/i386.h | 11 +- gcc/config/rs6000/linux64.h | 17 +- gcc/config/rs6000/ppc-asm.h | 9 + gcc/config/s390/s390.c | 17 +- gcc/cp/ChangeLog | 13 ++ gcc/cp/call.c | 12 +- gcc/cp/constexpr.c | 3 +- gcc/cp/cp-tree.h | 9 +- gcc/cp/decl.c | 128 +++++++-------- gcc/cp/name-lookup.c | 28 ++-- gcc/cp/pt.c | 73 ++++++--- gcc/doc/invoke.texi | 17 +- gcc/fortran/ChangeLog | 37 +++++ gcc/fortran/trans-decl.c | 26 +-- gcc/fortran/trans-io.c | 46 +++--- gcc/go/gofrontend/MERGE | 2 +- gcc/internal-fn.c | 2 +- gcc/ipa-fnsummary.c | 2 + gcc/ipa-modref.c | 2 - gcc/ipa-prop.c | 6 +- gcc/testsuite/ChangeLog | 175 ++++++++++++++++++++ gcc/testsuite/g++.dg/cpp1z/class-deduction73.C | 41 +++++ gcc/testsuite/g++.dg/cpp2a/consteval18.C | 26 +++ gcc/testsuite/g++.dg/cpp2a/constexpr-new14.C | 73 +++++++++ gcc/testsuite/g++.dg/vect/pr97255.cc | 44 +++++ gcc/testsuite/gcc.dg/Warray-parameter-7.c | 25 +++ gcc/testsuite/gcc.dg/Warray-parameter-8.c | 36 ++++ gcc/testsuite/gcc.dg/Wvla-parameter-5.c | 22 +++ gcc/testsuite/gcc.dg/Wvla-parameter-6.c | 34 ++++ gcc/testsuite/gcc.dg/Wvla-parameter-7.c | 36 ++++ gcc/testsuite/gcc.dg/attr-access-2.c | 10 +- gcc/testsuite/gcc.dg/ipa/remref-2a.c | 2 +- gcc/testsuite/gcc.dg/pr94600-1.c | 11 +- gcc/testsuite/gcc.dg/pr94600-3.c | 11 +- gcc/testsuite/gcc.dg/vect/bb-slp-49.c | 28 ++++ gcc/testsuite/gcc.dg/vect/pr37027.c | 2 +- gcc/testsuite/gcc.dg/vect/pr67790.c | 1 + gcc/testsuite/gcc.dg/vect/pr92324-4.c | 2 + gcc/testsuite/gcc.dg/vect/pr92558.c | 2 + gcc/testsuite/gcc.dg/vect/pr95495.c | 2 + gcc/testsuite/gcc.dg/vect/slp-reduc-1.c | 2 +- gcc/testsuite/gcc.dg/vect/slp-reduc-2.c | 1 + gcc/testsuite/gcc.dg/vect/slp-reduc-3.c | 1 + gcc/testsuite/gcc.dg/vect/slp-reduc-4.c | 1 + gcc/testsuite/gcc.dg/vect/slp-reduc-5.c | 2 +- gcc/testsuite/gcc.dg/vect/slp-reduc-7.c | 2 +- gcc/testsuite/gcc.dg/vect/vect-reduc-in-order-4.c | 1 + .../gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c | 47 ++++++ .../gcc.target/arm/mve/intrinsics/mve_vaddq_n.c | 31 ++++ .../arm/mve/intrinsics/vaddq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vaddq_m_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vaddq_x_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vaddq_x_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpeqq_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpeqq_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpgeq_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpgeq_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpgtq_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpgtq_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpleq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpleq_m_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpleq_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpleq_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpltq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpltq_m_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpltq_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpltq_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpneq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpneq_m_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vcmpneq_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vcmpneq_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vfmaq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vfmaq_m_n_f32-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vfmasq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vfmasq_m_n_f32-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vmaxnmavq_f16-1.c | 12 ++ .../arm/mve/intrinsics/vmaxnmavq_f32-1.c | 12 ++ .../arm/mve/intrinsics/vmaxnmavq_p_f16-1.c | 12 ++ .../arm/mve/intrinsics/vmaxnmavq_p_f32-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c | 12 ++ .../arm/mve/intrinsics/vmaxnmvq_p_f16-1.c | 12 ++ .../arm/mve/intrinsics/vmaxnmvq_p_f32-1.c | 12 ++ .../arm/mve/intrinsics/vminnmavq_f16-1.c | 12 ++ .../arm/mve/intrinsics/vminnmavq_f32-1.c | 12 ++ .../arm/mve/intrinsics/vminnmavq_p_f16-1.c | 12 ++ .../arm/mve/intrinsics/vminnmavq_p_f32-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c | 12 ++ .../arm/mve/intrinsics/vminnmvq_p_f16-1.c | 12 ++ .../arm/mve/intrinsics/vminnmvq_p_f32-1.c | 12 ++ .../arm/mve/intrinsics/vmulq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vmulq_m_n_f32-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vmulq_x_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vmulq_x_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vsetq_lane_f16-1.c | 13 ++ .../arm/mve/intrinsics/vsetq_lane_f32-1.c | 13 ++ .../arm/mve/intrinsics/vsubq_m_n_f16-1.c | 12 ++ .../arm/mve/intrinsics/vsubq_m_n_f32-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c | 12 ++ .../gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c | 12 ++ .../arm/mve/intrinsics/vsubq_x_n_f16-1.c | 13 ++ .../arm/mve/intrinsics/vsubq_x_n_f32-1.c | 13 ++ gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-1.c | 2 +- gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-2.c | 2 +- gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-3.c | 2 +- gcc/testsuite/gcc.target/arm/thumb2-cond-cmp-4.c | 2 +- gcc/testsuite/gcc.target/i386/pr96827.c | 41 +++++ gcc/testsuite/gcc.target/i386/x86-64-v2.c | 116 +++++++++++++ gcc/testsuite/gcc.target/i386/x86-64-v3-haswell.c | 18 ++ gcc/testsuite/gcc.target/i386/x86-64-v3-skylake.c | 21 +++ gcc/testsuite/gcc.target/i386/x86-64-v3.c | 116 +++++++++++++ gcc/testsuite/gcc.target/i386/x86-64-v4.c | 116 +++++++++++++ gcc/tree-vect-patterns.c | 8 +- gcc/tree-vect-slp.c | 22 +-- gcc/tree-vectorizer.h | 1 + gcc/value-query.cc | 162 ++++++++++++++++++ gcc/value-query.h | 107 ++++++++++++ libgcc/config/rs6000/morestack.S | 30 +++- libgcc/config/rs6000/t-linux | 7 +- libgcc/config/rs6000/tramp.S | 6 + libgo/configure | 17 +- libgo/configure.ac | 10 +- libgo/go/cmd/cgo/main.go | 2 + .../go/testdata/script/link_syso_issue33139.txt | 3 +- libgo/go/cmd/internal/sys/arch.go | 11 ++ libgo/go/debug/elf/file.go | 43 +++++ libgo/go/go/types/sizes.go | 4 +- libgo/go/golang.org/x/sys/cpu/cpu_riscv.go | 7 + .../x/tools/go/analysis/passes/asmdecl/asmdecl.go | 2 + libgo/go/internal/bytealg/indexbyte_generic.go | 2 +- libgo/go/internal/bytealg/indexbyte_native.go | 2 +- .../internal/syscall/unix/sysnum_linux_generic.go | 2 +- libgo/go/runtime/gcinfo_test.go | 2 +- libgo/go/runtime/hash32.go | 2 +- libgo/go/runtime/lfstack_32bit.go | 2 +- libgo/go/runtime/mkpreempt.go | 6 + libgo/go/runtime/mpagealloc_32bit.go | 2 +- libgo/go/syscall/endian_little.go | 2 +- libgo/match.sh | 4 +- libgo/misc/cgo/testcshared/testdata/libgo2/dup2.go | 2 +- libgo/misc/cgo/testcshared/testdata/libgo2/dup3.go | 2 +- libgo/testsuite/gotest | 4 +- libgomp/ChangeLog | 9 + libgomp/parallel.c | 9 +- libitm/config/powerpc/sjlj.S | 18 +- libstdc++-v3/ChangeLog | 13 ++ libstdc++-v3/config/cpu/arm/cxxabi_tweaks.h | 7 +- libstdc++-v3/include/bits/c++config | 6 +- libstdc++-v3/include/std/type_traits | 10 +- 176 files changed, 3048 insertions(+), 388 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp1z/class-deduction73.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/consteval18.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/constexpr-new14.C create mode 100644 gcc/testsuite/g++.dg/vect/pr97255.cc create mode 100644 gcc/testsuite/gcc.dg/Warray-parameter-7.c create mode 100644 gcc/testsuite/gcc.dg/Warray-parameter-8.c create mode 100644 gcc/testsuite/gcc.dg/Wvla-parameter-5.c create mode 100644 gcc/testsuite/gcc.dg/Wvla-parameter-6.c create mode 100644 gcc/testsuite/gcc.dg/Wvla-parameter-7.c create mode 100644 gcc/testsuite/gcc.dg/vect/bb-slp-49.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_n.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpltq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpneq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmavq_p_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmvq_p_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f16-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_x_n_f32-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr96827.c create mode 100644 gcc/testsuite/gcc.target/i386/x86-64-v2.c create mode 100644 gcc/testsuite/gcc.target/i386/x86-64-v3-haswell.c create mode 100644 gcc/testsuite/gcc.target/i386/x86-64-v3-skylake.c create mode 100644 gcc/testsuite/gcc.target/i386/x86-64-v3.c create mode 100644 gcc/testsuite/gcc.target/i386/x86-64-v4.c create mode 100644 gcc/value-query.cc create mode 100644 gcc/value-query.h create mode 100644 libgo/go/golang.org/x/sys/cpu/cpu_riscv.go