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NFC adds 7f1eb15289a [SCEV] Teach SCEV to find maxBECount when loop endbound is variant adds f16734c62c1 Re-land "[dsymutil] Timestmap verification for __swift_ast" adds b5d60b88466 [llvm-cov] Generate "report" for given source paths if sour [...] adds 483988c77f5 [X86] Stop creating CMOV nodes with a second MVT::Glue result adds 98af377c309 [llvm-cov] An attempt to fix sources_specified.test failing [...] adds 0797a9c4c1e DAG: Add flags to dumps adds 03d5e0b73e3 [llvm-cov] Fix sources-specified.test so it ignores the ord [...] adds cd6f7b1e77c [Hexagon] Add patterns for cmpb/cmph with immediate arguments adds 3f3b1a3ce2a [llvm-cov] Temporary delete sources-specified.test, it is f [...] adds 043ceffa29c [RS4GC] Look through vector bitcasts when looking for base pointer adds 1747e968505 [X86] Add ProcIntelBDW to BroadwellProc class not BDWFeatur [...] adds b5a710de5a6 [X86] Fix some inconsistent formatting in the processor fea [...] adds e9bafbf3701 lit.py: Add new %{shared_output(LABEL)} substitution adds b6cc4cb5ed4 Update test to expect nuw flag in SDAG dump, fixes test aft [...] adds 13fcba8aab9 [TableGen] : Simplify RegisterInfoEmitter adds b22d64b7ed3 [InstCombine] allow zext(bool) + C --> select bool, C+1, C [...] adds b245b723b9a [InstCombine] rearrange code to remove repeated constant ch [...] adds 2f9a6e36381 [X86] Updated scalar integer absolute tests to cover i8/i16 [...] adds 963cef7a18d [InstCombine] use AddOne helper to reduce code; NFC adds 7cb32686194 Not all buildbots seem to dump the nuw flag in SDAG adds 3339ae54f3b [X86] Test scalar integer absolutes on 32-bit targets with/ [...] adds ca020c74869 [SCEV] Maintain and use a loop->loop invalidation dependency adds 54a02ebf1b3 [llvm-cov] Reland sources-specified.test with addition of " [...] adds b1b02b7e6c2 [llvm-demangle-fuzzer] Add a fuzz target for ItaniumDemangler. adds 5860eabc2fd [InstCombine] add tests for add (zext (add nuw X, C2)), C - [...] adds a7bbf63f800 [InstCombine] add hasOneUse check to add-zext-add fold to p [...] adds 0a54333196e [IPSCCP] Move common functions to ValueLatticeUtils (NFC) adds b1021f33e0b [X86] Add initial skeleton support for knm cpu adds 44b77357dab [LLVMCore] fix description for OverflowingBinaryOperator; NFC adds fb7d705a02e [InstCombine] use local var to reduce code duplication; NFCI adds 04312950d0c Revert r315148 [TableGen] Avoid unnecessary std::string creations adds 59d5964ec6f [Hexagon] Minimize number of repeated constant extenders adds e3590344cd8 DAG: Add opcode and source type to isFPExtFree adds d9a915e2395 [InstCombine] recycle adds for better efficiency adds 9a6875264b2 AMDGPU: Implement isFPExtFoldable adds ab26bdd6c25 [InstCombine] move code to remove repeated constant check; NFCI adds 937b560bd5d [SmallPtrSet] Add iterator epoch tracking. adds 5cd5b63d5e7 [aarch64] Support APInt and APFloat in ImmLeaf subclasses a [...] adds b1763ab78e4 AMDGPU: Look for src mods before fp_extend adds 212e51c5400 [Hexagon] Avoid unused variable warnings in release builds. adds 7aa4aa680d6 [Reassociate] auto-generate better checks; NFC adds 39ba348795c LowerTypeTests: Give imported symbols a type with size 0 so [...] adds 93f0e0c1d11 AMDGPU: Implement hasBitPreservingFPLogic adds 35a6ebd9c81 [Legalizer] Only allocate the SetVectors once per function. adds 2cfe54276cf [LegalizerInfo] Don't evaluate end boundary every time thro [...] adds 5d72c6ca6b1 [Legalizer] Use SmallSetVector instead of SetVector. adds 92e9ed5a6ec [RegisterBankInfo] Cache the getMinimalPhysRegClass information adds f85a6f9ed6d [Transforms] Fix some Clang-tidy modernize and Include What [...] adds 94aa10e94b0 [globalisel][tablegen] Add support for fpimm and import of [...] adds bfa0442391b [InstCombine] use m_Neg() to reduce code; NFCI adds 83d9c21f06a [Hexagon] Rangify some loops, NFC adds c9676b5d356 [globalisel][tablegen] Fix a use-after free bug that manife [...] adds 3136f295f48 [X86] Use fsub in the movddup scheduling tests to prevent a [...] adds eb7fbe22997 [X86] Use X86ISD::VBROADCAST in place of v2f64 X86ISD::MOVD [...] adds c5d47386152 Revert r315763: "[Hexagon] Rangify some loops, NFC" adds aae85883bb9 lit.py: Fix new test for systems that don't use / as os.path.sep adds 9330bcf1ae0 lit.py: Fix new test harder for systems that don't use / as [...] adds 6648a9bc9db [globalisel][tablegen] Simplify named operand/operator look [...] adds 3c029c498e3 [AArch64][RegisterBankInfo] Use the statically computed map [...] adds 3eee4dbf7bd lit.py: Previous test fix was a red herring; backslashes ar [...] adds dde857cfc73 [globalisel][tablegen] Fix undefined references to dump() adds 1c7136e9bac [globalisel][tablegen] Fix an unused variable warning cause [...] adds 5371945eb16 [llvm-cov] Factor out logic to iterate over line coverage s [...] adds a1b8a235837 [Dominators] Remove the NCA check adds 7581146f570 Fix assembler for alloca of multiple elements in non-zero a [...] adds 898e57c7953 lit.py: Give up and disable the new shared-output.py test o [...] adds a17d20085dc Revert "lit.py: Add new %{shared_output(LABEL)} substitution" adds a754c19cfab [X86] Add an additional isel pattern to CVTDQ2PDrm/VCVTDQ2P [...] adds 3ea3a006fe5 [X86] Remove TB_NO_REVERSE from VCVTDQ2PDYrr and VCVTPS2PDY [...] adds 3207cbf119f [X86] Add AVX512 flavors of VCVTDQ2PD plus VCVTUDQ2PD to th [...] adds 60273a80213 [X86] Add additional patterns for folding loads with 128-bi [...] adds ea981acc781 [X86] Remove unnecessary bitconverts as the root of pattern [...] adds e793e68e9b9 [X86] Remove some patterns for bitcasted alignednonedtempor [...] adds 65c20a7766b [X86] Add patterns for vzmovl+cvtpd2ps with a load. adds cbeaa4da756 [X86] Add AVX512 versions of VCVTPD2PS to load folding tables. adds 1d2af6aa6e7 [X86] Add patterns for vzmovl+cvtpd2dq/cvttpd2dq with a load. adds 809f654cc8f [X86][SSE] Support combining AND(EXTRACT(SHUF(X)), C) -> EX [...] adds eb211af0572 AMDGPU: Add support for isa version note adds 473d9514061 AMDGPU: Do not emit deprecated notes for code object v3 adds e7b2dc3c3a8 AMDGPU: Improve note directive verification in assembler adds 5376db4ce8f llvm-readobj: Print AMDGPU note type names adds b420fe5b146 Use DAG::getBitcast() helper. NFCI. adds 3b76e7aa127 AMDGPU: Cleanup elf-notes.ll test adds 13c2b5d8477 Cleanup update_llc_test_checks.py notes. adds 256786e5102 Pull out repeated calls to VT.getVectorNumElements(). NFCI. adds 7032e50fbc7 llvm-readobj: Print AMDGPU note contents adds 5556d8485b8 AMDGPU: Bring HSA metadata on par with the specification adds 755155fab96 AMDGPU: Add AMDGPU HSA Kernel Descriptor adds 396c7a93230 Revert "[AArch64][RegisterBankInfo] Use the statically comp [...] adds 134df240d73 [X86][SSE] Test vector imul reduction on 32 and 64-bit targets adds d83c62b8872 [X86][SSE] Don't attempt to reduce the imul vector width of [...] adds e4d6a6e6c20 [TableGen] Avoid unnecessary std::string creations adds 2bed3de1844 [X86] Remove a bunch of dead FileCheck lines with the wrong [...] adds 38ae50b0937 AMDGPU: Don't use TargetStreamer if it has not been initialized adds 73363df463f AMDGPU: Temporary disable pal metadata check line in llvm-r [...] adds 2109dca8558 [Hexagon] Mark RangeTree::dump() with LLVM_DUMP_METHOD. adds 910074674e1 [tablegen] Handle common load/store predicates inside table [...] adds 186cd4a1922 [globalisel][tablegen] Map ld and st to G_LOAD and G_STORE. NFC adds eec5b16c882 Remove unused variables adds 37bf8530346 [X86] Don't use constant condition for select instruction w [...] adds a3b7b28d095 [X86] Lower vselect with constant condition to vector_shuff [...] adds 0446db2b0e8 [LoopInfo][Refactor] Make SetLoopAlreadyUnrolled a member f [...] adds 49fe891017a [X86] Ignore DBG instructions in X86CmovConversion optimiza [...] adds e53e8bdb9ba [MergeFunctions] Replace all uses of unnamed_addr functions. adds 99dc03a8d71 [MergeFunctions] Merge small functions if possible without [...] adds 1d03d382c1c Reverting r315590; it did not include changes for llvm-tblg [...] adds 1afb3de399b [SimplifyCFG] use range-for-loops, tidy; NFCI adds 53bdccfd619 revert r314984: revert r314698 - [InstCombine] remove one-u [...] adds 8cc053e6765 [TableGen] Remove error checks incorrectly failing on non-e [...] adds 936d75b04b5 [X86] Add FeatureSlowBTMem to Haswell, Broadwell, Skylake, [...] adds c2cf105c00c [AVX512] Don't mark EXTLOAD as legal with AVX512. Continue [...] adds 8ceb11ff2e1 [unittests] Only build llvm-cfi-verify if X86 is in LLVM_TA [...] adds ab9ea0ecca4 [X86] Remove the SlowBTMem feature flag entirely adds cd3c7b27fed [globalisel][tablegen] Import ComplexPattern when used as a [...] adds 7eb649c303b Revert r315863: [globalisel][tablegen] Import ComplexPatter [...] adds af1e278b91c Re-commit r315863: [globalisel][tablegen] Import ComplexPat [...] adds a5204d04872 Phony change to CMakeLists.txt to (hopefully) trigger regeneration adds b10e0a29cab [tablegen] Use hasPredCode()/hasImmCode() instead of getPre [...] adds d03e64f7534 Search for libxml2 on macOS too. adds a057c40dc32 [Hexagon] Add LLVM_ATTRIBUTE_UNUSED to operator<<, NFC adds 508747d4185 [globalisel][tablegen] Implement unindexed load, non-extend [...] adds 728d43b28f1 [globalisel][tblgen] Add support for iPTR and implement am_ [...] adds 196db93f659 Revert r315885: [globalisel][tblgen] Add support for iPTR a [...] adds 4175d2c7f05 Re-commit r315885: [globalisel][tblgen] Add support for iPT [...] adds a7d4828a91f [PowerPC] Eliminate sign- and zero-extensions if already si [...] adds e53750e1e08 bpf: fix bug on silently truncating 64-bit immediate adds 7f013c8a95d [aarch64][globalisel] Fix a crash in selectAddrModeIndexed( [...] adds d3a44463eef [TableGen] Range loopify DAGISelMatcher. NFC. adds 74cc2953c08 SLPVectorizer.cpp: Try to appease stage2-3 difference. (D38586) adds efa58149ae6 Move folding of icmp with zero after checking for min/max idioms. adds 904a9e2ef51 Revert rL315894, "SLPVectorizer.cpp: Try to appease stage2- [...] adds 9c5669aedb8 [llvm-dwarfdump] - Teach tool to parse DW_CFA_GNU_args_size. adds ddb14f8532d This patch is a result of D37262: The issues with X86 prefi [...] adds 41bfb49b40c [PowerPC] fix up in sign-/zero-extension elimination adds 83e0923cac3 [mips] Provide alternate predicates for constant synthesis adds 4f30878e58c Fix or vs || typo. adds b5d9fa1867a ISel type legalizer: debug messages. NFC. adds 05cc2c7d76c [mips][micromips] Fix (dis)assembly of bc1(t|f) adds d472e0454da [X86][SSE] Added additional PACKUS shuffle tests adds d2ca3a31240 Fix test name typo. adds 7811640b9af [AMDGPU] Prevent Machine Copy Propagation from replacing li [...] adds de116cc2d7d [ValueTracking] fix typos, formatting; NFC adds 3cf64e346f0 [InstCombine] don't unnecessarily generate a constant; NFCI adds 09c266d1240 [TableGen] Simplify CallingConvEmitter.cpp. NFC. adds cd102716d7f [x86] add minmax tests with more predicate coverage; NFC adds 4bd9c52fadd [ObjCARC] Do not move a release that has the clang.imprecis [...] adds f6eb7ff7f85 [AMDGPU] : revert r315908 adds 0b0eddf1d3b [SparsePropagation] Enable interprocedural analysis adds 1619b651ca8 [SCEV] Rename getMaxBECount and update comments. NFC adds 60ee725bc53 [Hexagon] Rangify some loops, NFC adds 7b72f3902c2 Add iterator range MachineRegisterInfo::liveins(), adopt us [...] adds ddac8b75e4a Fix the build of GlobalISelEmitter with MSVC 2017 by specia [...] adds e343d44e38d Revert MSVC 2017 build fix and fix it by moving the method [...] adds 38df9eeb439 fix llvm-isel-fuzzer: LLVMFuzzerTestOneInput should never [...] adds 300ec0aaa26 Add base relative relocation record that can be used for th [...] adds 6c78bdab49a [libFuzzer] Delete llvm/lib/Fuzzer adds de6f8153691 Replace make_range in MachineRegisterInfo with ArrayRef, NFC adds aeedd1131c2 [X86][MMX] Add scheduling latency/throughput tests for MMX [...] adds b35ed0f9fe1 [Transforms] Fix some Clang-tidy modernize and Include What [...] adds e3e99133459 [JumpThreading] Move two PredValueInfoTy vectors to a scope [...] adds 7b58f472aaa [X86][3DNow] Add scheduling latency/throughput tests for 3D [...] adds 983f9af008e [MC] Lex CRLF as one token adds 9f219e8d892 Add !callees metadata adds 7ff760d050a [AArch64][LegalizerInfo] Mark s128 G_BITCAST legal adds e4ffbabdc0c [AArch64][RegisterBankInfo] Add mapping support for G_BITCA [...] adds 364dbc593b0 Re-apply [AArch64][RegisterBankInfo] Use the statically com [...] adds 72af890191c cmake: BSD: Mark /usr/local/include as system include directory adds 31c95a9bee7 [X86][AVX] Add v4x64 vector shuffle test for <0,2,1,3> mask adds df60d8e59e3 Use the return value of UpdateNodeOperands(); in some cases [...] adds 612d06a73fd [llvm-cov] Remove workaround in line execution count calcul [...] adds 8a3e1c4e057 Try to make crlf portable to other printf implementations adds 20768d3f1ec Revert "[SCEV] Maintain and use a loop->loop invalidation d [...] adds 5128bb371a5 [llvm-cov] Add one correction to r315960 (PR34962) adds d8da420012a [ExecutionEngine] Correct the size of a write in a COFF i38 [...] adds 6ec40b1040a FuzzMutate: Fix arch parsing in FuzzerCLI adds ead0ee472f0 [X86] Fix typo in comment. NFC adds 971d51cd6fa [X86] Add AVX512BW to the vector-shuffle-masked test to pre [...] adds f83df3de213 [X86] Add masked palignr tests to vector-shuffle-masked.ll adds b22da5a4dcb [globalisel][tablegen] Add a GIM_CheckIsSameOperand test wh [...] adds 812e46fe547 Revert 315440 on behalf of mkazantsev adds dd449b37bc0 [NFC] Add test from bug 34937 adds c596921f1a1 Remove a test after revert of rL315440 adds 9e68191ef66 [X86][SKL] Updated scheduling information for the SkylakeCl [...] adds 51e3e44f338 More tests with x86 prefixes which work after rL315899 commit adds 0782a95249d [X86][Skylake] fixed/updated regression test mmx-schedule.l [...] adds f500b96fb91 Fix `FaultMaps` crash when the out streamer is reused adds e60981b4545 Fix implicit null check with negative offset adds 12367d94353 Improve clamp recognition in ValueTracking. adds bb8aaf8316f [X86][Broadwell] Added the broadwell cpu to the scheduling [...] adds e1c43432f0f Fix pthread_[gs]etname_np detection adds 1faba647f4d [SimplifyCFG] update test to use auto-generated FileCheck a [...] adds 0d8a696cebc [SimplifyCFG] add test for part of PR34471 (switch squashing); NFC adds eb90eda86f4 [ARM, AArch64] adjust tests trying to maintain their object [...] adds d0a82302e35 [llvm-special-case-list-fuzzer] Add fuzz target. adds f87901fc843 [DAGCombine] Add SCALAR_TO_VECTOR undef handling to simplif [...] adds a1dafe0b863 Fix signed overflow detected by ubsan adds 6f0af489ee2 [MachineOutliner][NFC] Move end index calculation into Candidate adds 3b848cff066 [MachineOutliner][NFC] Move decrement logic to OutlinedFunction adds cecf102e0cb AMDGPU: Start generating metadata for MaxFlatWorkGroupSize adds 1c1c256fbc6 [cmake] Use find_package to discover zlib adds b5459573e19 Fix typo in checkTwoLevelHintsCommand adds 33287ae950f Revert "[cmake] Use find_package to discover zlib" adds 6c9a284ff39 [MachineOutliner][NFC] Clean up prune logic a bit adds ae2eae7ec54 [X86][SSE] Tests packuswb/truncation codegen from PR34773 adds 1c51faba7a0 [Transforms] Fix some Clang-tidy modernize and Include What [...] adds 2f17a1b1cc1 AArch64: account for possible frame index operand in compares. adds 37790cc1f70 AArch64: Enable AES instruction fusion on Cyclone. adds 607acf30af8 AMDGPU : Fix an error for the llvm.cttz implementation. adds 1eb5c71a5ba lit: Improve %: normalization. adds 082d7c47468 [GlobalDCE] Use DenseMap instead of unordered_multimap for [...] adds 55cde5f3dee [aarch64][globalisel] Register banks and classes should hav [...] adds 0d976496a05 Verifier: Ignore CUs pulled in by ODR-uniqued types. adds fd8ae0e010a Revert "Verifier: Ignore CUs pulled in by ODR-uniqued types." adds 2b488868304 Verifier: Ignore CUs pulled in by ODR-uniqued types. adds b8354dd5d80 [ScalarEvolution] Handling for ICmp occuring in the evoluti [...] adds ae96b7ff9f9 Add a utility to update MIR checks, similar to update_llc_t [...] adds 61b2faea7e8 Statically link llvm-cfi-verify's libraries. adds 4f42787ca5a update_mir_test_checks: Fix a typo I made while preparing f [...] adds f50103299d5 update_mir_test_checks: Support '-' in function names adds eb8a5a38be5 Fix the incorrect detection of ICONV_LIBRARY_PATH adds 788af5a19bb Fixing bug issue https://bugs.llvm.org/show_bug.cgi?id=34978 adds 42759c20ed4 Improve lookThroughCast function. adds cbd850f3509 [PowerPC] Use helper functions to check sign-/zero-extended value adds a631f93f8a8 [AVX512][AVX2]Cost calculation for interleave load/store pa [...] adds cfa7d5f70fc [AVR] Update to current LLVM API adds d8ff2f49ce6 Untabify. adds 9635ecd997c Adding new test for bug fix 316067 https://bugs.llvm.org/sh [...] adds cd3c4f300b9 [mips] Move test to correct directory. NFCI adds 429594f14d9 Fixup patch for revision rL316070. adds 4eeab93a123 [mips] Fix analyzeBranch to handle debug data adds 63400097f67 [ARM] Fix disassembly for conditional VMRS and VMSR instruc [...] adds 9e42e5485c0 AArch64/GISel: Fix a couple of tests that were testing the [...] adds 2457f456863 update_mir_test_checks: Do a better job of disambiguating names adds ad73a3da684 update_mir_test_checks: Handle empty liveins adds afea6f4cd3a [RISCV] Bugfix createRISCVELFObjectWriter adds 28cb7901b7b AMDGPU: Rename MaxFlatWorkgroupSize to MaxFlatWorkGroupSize [...] adds 31ba2a29519 [Hexagon] Mark vector loads as predicable, update instructi [...] adds fba2bb4142c [Hexagon] Update Hexagon ArchEnum and sync some downstream [...] adds a05cf7b27d8 AMDGPU/Docs: Make target naming consistent adds 7a600d312f9 [Hexagon] New HVX target features. adds 55fff379906 [llvm-cov] Highlight gaps in consecutive uncovered regions adds d35bb38d3b5 [llvm-cov] Pass LineCoverageStats in SourceCoverageView. NFC. adds 4a5c81f50fa [llvm-cov] Suppress sub-line highlights in simple cases adds 88d22be42ce Don't set static-libs test feature when using LLVM_LINK_LLVM_DYLIB adds a7b3e22281a [AVR] Fix the select_mbb_placement_bug.ll test adds 1691560659e Fix lit.site.cfg.py.in after rL316123 adds e77c212f96e [Transforms] Fix some Clang-tidy modernize and Include What [...] adds b5cb868aaa0 Revert "[ScalarEvolution] Handling for ICmp occuring in the [...] adds 0a09220c32b [AMDGPU] Corrections to memory model description. adds 0ee6442d441 update_mir_test_checks: Improve message when updating fails adds d0f18439400 update_mir_test_checks: Support adding checks for vreg classes adds 7121c763ecf [PM] Refactor the bounds checking pass to remove a method o [...] adds ba2fa173d9f Canonicalize a large number of mir tests using update_mir_t [...] adds fcd3a22bcaf AArch64/GISel: Modernize the localizer test adds e03fc7c67eb GISel: Canonicalize select tests using update_mir_test_checks adds 34ea0deeb12 [llvm-cov] Use the coverage namespace. NFC. adds 2ce33a5dffc [llvm-cov] Move LineCoverageIterator to libCoverage. NFC. adds f3ed5282d73 [CMake] Allow parent projects to use in-source builds adds 4179daa6ae6 Fix buffer overflow. adds 9db44d0441b Simplify. adds 1fd7e8c37af [MergeFunctions] Don't blindly RAUW a GlobalValue with a Co [...] adds 8801482e48f [NFC][IRCE] Filter out empty ranges early adds 120c3be2ad3 [Coverage] Simplify r316141. NFC. adds 4c329eb4fd5 Reinstate r316025, reverted in r316029. adds 5f5497086d1 Const fix for YAMLParser. adds 2f9c707df3b Revert 316150 which reinstated r316025. adds d83cc4f3edd [ARM GlobalISel] Remove redundant tests adds 24177b8a151 [ARM GlobalISel] Fix liveins in test. NFC adds 90ee44d185a Fix APFloat from string conversion for Inf adds c6c4c8b8a67 Revert rL316156 due to failure on APFloatTest.fromToStringSpecials adds 1437cc9a527 [RISCV] Prepare for the use of variable-sized register classes adds e4959200b5c [X86] Add scalar (abs (abs x)) -> (abs x) combine test. adds a9278fb1d87 Fix MSVC signed/unsigned comparison warning adds 0ecb8857e93 [X86] Replace custom scalar integer absolute matching with [...] adds 2942c7833b7 Revert r315992 because of a found miscompilation failure adds 695f682406e [RISCV][NFC] Drop unused parameter from createImm helper in [...] adds 8f5670fec22 [RISCV] RISCVAsmParser: early exit if RISCVOperand isn't im [...] adds 2ac0f38d31d ExecutionEngine: adjust COFF i386 tautological asserts adds 99a0c4c3b56 [Hexagon] Fix store conversion from rr to io in optimize ad [...] adds cb5868c4b84 AMDGPU/Docs: Fix unreadable characters adds 1f93c854d8e The cost of splitting a large vector instruction is not bei [...] adds d369ce40914 [X86][AES] Test AES intrinsics on 32/64-bit targets with/wi [...] adds 096ea8c9fd0 [X86] Remove LowerEXTRACT_SUBVECTOR handler. All EXTRACT_SU [...] adds fb5a67b5944 [SelectionDAG] Add a check to getVectorShuffle to ensure th [...] adds ab16d0abcd6 [Transforms] Fix some Clang-tidy modernize and Include What [...] adds 5a3d179fab7 [RISCV] Initial codegen support for ALU operations adds 920aa533c17 [RISCV] Add missing hunk from r316188 adds 5ce470a389c [Transforms] Fix some Clang-tidy modernize and Include What [...] adds 4dea1f2710d [XRay] [docs] Document how to generate flamegraphs from xra [...] adds f56176dd98a Disabling the transformation introduced in r315888 adds 801676c9c69 [ExecutionEngine] After a heroic dev-meeting hack session, [...] adds dd3a1b1065f [ExecutionEngine] Temporarily remove the ExecutionEngine tl [...] adds e536cadb6f4 [AVR] Fix the select-mbb-placement-bug.ll adds 28591001d2e Add test case for LoopSink pass adds 082e33ac8c6 [ValueTracking] Enabling ValueTracking patch by default (re [...] adds 2d9526eb168 [X86][AVX512] Regenerate regcall tests. adds 4eed9afb356 [ARM] Use post-RA MI scheduler when +use-misched is set adds 88f8f008102 Revert "[mips] Reordering callseq* nodes to be linear" adds 0c8405ae084 X86 Tests: Add tests for vector permutes with variable indi [...] adds 268fcddc7a6 [X86] Check all CPU target names. adds b99a8bcc2b5 [Hexagon] Allow redefinition with immediates for hw loop co [...] adds 585416691f8 Make x86 __ehhandler comdat if parent function is adds 711a23dd089 [WebAssembly] MC: Handle (ignore) MCSA_Protected symbol attribute adds b29a89717e2 [X86][SSE] getTargetShuffleMask - check shuffle input value [...] adds 84832904a0f [x86] avoid FileCheck assert duplication with retl/retq regex; NFC adds def1c1f4c53 [X86][SSE] Add missing _mm_extract_ps fast-isel test adds ccf59092984 [Hexagon] Reorganize and update instruction patterns adds a29687c501a COFF: Add type server pdb files to linkrepro tar file. adds 736ecc16365 [Hexagon] Report error instead of crashing on wrong inline- [...] adds d83b5d463d7 [globalisel][tablegen] Fix small spelling nits. NFC adds 2b6b6ac5239 [WebAssembly] MC: Fix crash when -g specified. adds 8b6784b39c7 [Transforms] Fix some Clang-tidy modernize and Include What [...] adds 84aa0af4957 [utils, x86] add regex for retl/retq to reduce duplicated F [...] adds 26843fd82c9 [Packetizer] Add function to check for aliasing between ins [...] adds cd986088c56 [Transforms] Fix some Clang-tidy modernize and Include What [...] adds abd557f9822 [X86] Do not generate __multi3 for mul i128 on X86 adds cbc06db9509 [SelectionDAG] Don't subject ISD:Constant to the depth limi [...] adds ba5255623c4 [SelectionDAG] Don't subject ConstantSDNodes to the depth l [...] adds 34f57ff3e81 [SelectionDAG] Use isa to silence unused variable warning (NFC). adds 449e890f29a [SelectionDAG] Use dyn_cast without cast. adds bbbf08b339b [LoopInterchange] Fix phi node ordering miscompile. adds 3aad6fd98b6 [X86][SSE] Add missing extractps scheduling test adds 3afd5828590 [ValueTracking] Simplify the known bits code for constant v [...] adds 698b76cb6ee [ValueTracking] Remove unnecessary temporary APInt from com [...] adds ce228816d5b [PPC CodeGen] Fix the bitreverse.i64 intrinsic. adds 3ef03332d0e Fix MSVC 'result of 32-bit shift implicitly converted to 64 [...] adds e746b67d41b [X86] Fix disassembling of EVEX instructions to stop accide [...] adds 8d6bf15df65 [X86][SSE] Add extractps/pextrd equivalence to domain tables adds 51ff151ed58 Reverting r316270 due to failing build bots. adds 7f2ed036912 Strip trailing whitespace. NFCI. adds 7447532596a [X86] Don't allow gather/scatter to disassembler if memory [...] adds e5126d58293 [X86] Add VEX_WIG to VROUNDSSrr/VROUNDSSrm/VROUNDSDrr/VROUNDSDrm adds 7f31e4c2756 [X86] Add VEX_WIG to applicable AVX512 instructions. adds 3ae8f2dc117 [X86] Teach the disassembler that some instructions use VEX [...] adds ce20559b072 [mips] Adds support for R_MIPS_26, HIGHER, HIGHEST relocati [...] adds 5631544a096 [X86] Add a pass to convert instruction chains between domains. adds 0be7a36e81d [ARM] Dynamic stack alignment for 16-bit Thumb adds f7bb38ca4e1 [SimplifyCFG] try harder to forward switch condition to phi [...] adds 3dbdbd2328e [X86] More correctly support LIG and WIG for EVEX instructi [...] adds b76f989d6bc Add logic to greedy reg alloc to avoid bad eviction chains adds 832322f9c97 Strip trailing whitespace. NFCI. adds a6c26ffedc8 [utils] Support -mtriple=powerpc64 adds 5882b22ad1b [SimplifyCFG] delay switch condition forwarding to -latesim [...] adds 5a236e2724c [X86] Add missing override. NFC. adds 9982ea43e20 Create fewer copies of StringMaps. No functionality change [...] adds 689fbe01095 Fix invalid ptrtoint in InstCombine adds 05ea5525958 ExecutionEngine: make COFF Thumb2 assertions non-tautological adds 0f7dce5b5ce [X86] Fix disassembly of EVEX rounding control and SAE inst [...] adds d35a2569ffc [X86] Update a doxygen comment in the disassembler tablegen [...] adds dc1f81fb554 [ARM] Allow unrolling of multi-block loops. adds 1d7dfd3aadf Fix a -Wpedantic warning. adds e893335ed8f [COFF] Improve the check for functions that should get an e [...] adds a81c79be2fb Fix for Bug 30718 - Failure to disassemble certain MOV with [...] adds dffb1662165 [X86] Add test for opportunity to use bzhi X86 instruction [...] adds 2b3608434cc [llvm-dwarfdump] - Teach tool about few GNU call_sites constants. adds 9d639dd5bd3 Test commit. adds d077600b36e [X86][F16C] Regenerate F16C schedule tests adds ad818a725af [X86][AVX] Regenerate AVX intrinsics tests on 32 + 64-bit targets adds 0707903757a [X86][AVX2] Regenerate AVX2 intrinsics tests on 32 + 64-bit [...] adds ec582fec571 [X86][SSE] Regenerate bitcast-and-setcc tests adds 02ee5037195 Support formatting formatv_objects. adds 6ddf645b77a [DAGCombine] Permit combining of shuffles of equivalent spl [...] adds 63ea643e1fa [X86] Add RDPID instruction for assembler and disassembler. adds 23a29475b9a [X86] Add PTWRITE instruction for assembler and disassembler. adds 69a114112f3 Update DPPD/DPPS instruction scheduling on btver2. Differen [...] adds 415491b2606 [X86][SSE] Remove AssertZext stage from PEXTRW/PEXTRB lower [...] adds c021be0a0f6 [X86] Change XRSTOR to use PS instead of TB to match XSAVE. adds bb2015d5983 [X86] Change RDRAND to use PS instead of TB. adds a168659fe02 [X86] Change VMPTRST to use PS instead of TB to match VMPTRLD. adds 1caa4c069b6 [MachineOutliner] NFC: Rename getters/setters to fit coding style adds 8c2358acf3e [X86] Fix disassembler table generation to prevent instruct [...] adds 367cfd84c37 AMDGPU: Fix default range in non-kernel functions adds 7f8c3f02085 AMDGPU: Cleanup local atomic node names adds 86274cd55dc [globalisel] Add very brief docs summarizing the ISel part [...] adds a2f5529e333 [PassManager] add test to show the new PM uses -latesimplif [...] adds 67f07003fe1 Updated 'Getting Started' to use valid git links (added tra [...] adds 3e1218f32a4 [X86][SSE] Regenerate PACKSS tests on 32 + 64-bit targets adds f9ce75bf183 [wasm] readSection: Avoid reading past eof (fixes oss-fuzz #3219) adds 10e6ee563a6 Patch in adds 879f02b69ce Accidently merged an incomplete upstream patch in 10e6ee563 [...] adds 6affa236cfc [globalisel][tablegen] Import stores and allow GISel to aut [...] adds 2c4e91e1aae Fix FormatVariadicTest with GCC adds 0344b6624ee [Hexagon] Add extra pattern for S4_addaddi adds 990e764ad8a [PowerPC] Try to simplify a Swap if it feeds a Splat adds db797c0e595 [Hexagon] Return the correct chain edge for i1 function calls adds f26b091e7d9 [GVNSink] Fix failing GVNSink tests in the reverse iteration bot adds 806bdb8daa9 Revert "[PowerPC] Try to simplify a Swap if it feeds a Splat" adds fa601dee99f Graph builder implementation. adds d7958d5ac0c Don't crash when we see unallocatable registers in clobbers adds 30e015950d7 Made llvm-cfi-verify not execute unit tests on non-x86 builds. adds 6d8b51f8988 Fix buildbot breakage adds 4f08478711d Add a new Simulator entry for the target triple environment. adds 12e3001c5fe [X86][SSE] combineBitcastvxi1 - use PACKSSWB directly to pa [...] adds 2a01593233e [PM] Add pgo-memop-opt pass to the new pass manager adds 28098485bc4 [codeview] Recognize two records with no type index fields adds 5a4ef08f802 [GISel][AArch64]: Fix illegal Generic copies in tests adds 2767d8c77ac [GISel][ARM]: Fix illegal Generic copies in tests adds 24cbf50e813 AMDGPU: Initialize WavefrontSize from TD files adds 9c4a6530ef9 [MachineOutliner] Add optimisation remarks for successful o [...] adds f45e433f0bf [PM] Fix Typo adds 790af1ab799 [codeview] Add support for inlinee lists adds cd872ebe94f ObjCARC: do not increment past the end of the BB adds 0ab591a2315 [raw_fd_ostream] report actual error in error messages adds 965aad0dee8 [globalisel][tablegen] Remove unused InstructionMatcher's. NFC adds 79daf1b5a65 X86: Register the X86CallFrameOptimization pass adds 1be670d5268 [MC] Adding code padding for performance stability - infras [...] adds ce910e5be40 [Modules] Add module for Config/llvm-config.h adds 98150369032 X86: Fix X86CallFrameOptimization to search for the COPY St [...] adds da5585dcb14 [CodeGen][ExpandMemcmp][NFC] Allow memcmp to expand to vect [...] adds ebd014bd7fc Support formatv of TimePoint with strftime-style formats. adds 3665c8cf589 [ARM] Remove tCPS alias which just crashed adds 2be5f1c964f [ARM] tSETEND needs IsThumb adds 425ce346c7c Restore the fix rL316059 eliminated by rL316372 adds 790ea784d5b [ARM] Replace development diagnostics with normal DEBUG macro adds 0c65800586e [docs] Code example fix adds 7525c087824 AMDGPU: Add llvm.amdgcn.wqm.vote intrinsic adds 4fda278e9b9 AMDGPU: Add new intrinsic llvm.amdgcn.kill(i1) adds 2e2ff0a1e63 [llvm-dwarfdump] - Cleanup of gnu_call_site.s. NFC. adds 7b97ca1b57a [LangRef] Update description of Constant Expressions adds e1bccd3b6ef [ConstantFolding] Avoid assert when folding ptrtoint of vec [...] adds 1d169cfff5b X86CallFrameOptimization: Recognize 'store 0/-1 using and/o [...] adds 4c5531ccfb7 X86CallFrameOptimization: Update comments and variable name [...] adds 70880fd3814 Update f16c instruction scheduling on btver2. Differential [...] adds c89087d28c0 [X86] truncateVectorCompareWithPACKSS - remove duplicate va [...] adds 60da1ac8d32 [ARM] Error for invalid shift in memory operand adds 3caa1be6313 [ARM] Tighten up CHECK lines in a test adds 85ff689b242 [utils] make retq/retl regex an option that is off by default adds c966bbfe39e [x86] add more vector ISA variants for memcmp expansion; NFC adds 63054166c13 [X86] truncateVectorCompareWithPACKSS - use PACKSSDW/PACKSS [...] adds d489734f749 [TableGen] Simplify some of the subtarget emission by remov [...] adds 1e07339b8d3 [TableGen] Fix some formatting quirks in the subtarget outp [...] adds 67feb8cb261 PowerPC: support the separator character in the IAS adds 70d05d486ef [SelectionDAG] Add VSELECT support to ComputeNumSignBits adds 91db8008a96 [codeview] Fix handling of S_HEAPALLOCSITE adds 03644f29056 [X86][AVX] ComputeNumSignBitsForTargetNode - add support fo [...] adds 8e1e4b94b8c [globalisel][tablegen] Multi-insn emission requires that Bu [...] adds d9d01c9cb21 [opt] Initialize WriteBitcode pass. adds 09a69891103 Doxygenify comments. adds b7f6ffb5389 Added instructions for obtaining clang-tools-extra to the G [...] adds 51d6fa246d2 bpf: fix a bug in bpf-isel trunc-op optimization adds 91f89f7cb41 BitVector.h:capacity_in_bytes Don't mark header functions a [...] adds b86addfb235 DenseMap.h:capacity_in_bytes Don't mark header functions as [...] adds 124aa38d31b SmallVector.h:capacity_in_bytes Don't mark header functions [...] adds 89d65d4655d StringExtras.h Don't mark header functions as file-scope static adds 22591d6e66d IndirectCallSiteVisitor.h:findIndirectCallSites Don't mark [...] adds 43e810a24d7 MemoryBuiltins.h: Don't mark header functions as file-scope static adds dd97f5a765c ValueTracking.h Don't mark header functions as file-scope static adds d9ad9f92cf6 BinaryFormat/MachO.h Don't mark header functions as file-sc [...] adds 7c330fabaed [PowerPC] Try to simplify a Swap if it feeds a Splat adds edab7579664 MIR: Print the register class or bank in vreg defs adds db15b485c49 [globalisel][tablegen] Fix future undefined behaviour in r316463. adds 11435388441 bpf: fix a bug in trunc-op optimization adds aa354152445 Use range-based-for. NFC adds 7e8095025bc [llvm-cov] Use a stable sort on sub-views adds f980300b624 [X86][Broadwell] Added the instruction scheduling informati [...] adds 3defffe969d Fix LLVM_LINK_LLVM_DYLIB=On build of llvm-cfi-verify adds 58a8315339f Delete unused instantiations of DIBuilder. NFC adds c79e8ba6d6c [NVPTX] allow address space inference for volatile loads/stores. adds 5cb4d688511 Use range-based for loop. NFC adds f8fc02fbd4a Revert "[CodeGen][ExpandMemcmp][NFC] Allow memcmp to expand [...] adds 0c6dd78930a Fix Wdocumentation warning. NFCI. adds 26ee77f2532 [Transforms] Fix some Clang-tidy modernize and Include What [...] adds e3ed1e8dc7b RegisterUsageInfo.h: Add missing header for complete type n [...] adds 3beb4af75e4 X86AsmPrinter.h: Add missing header for complete type neede [...] adds 66d0e9446a3 X86Operand.h: Include X86MCTargetDesc.h for SSE register en [...] adds 53a0dabbc5f WebassemblyAsmPrinter.h: Include WebAssemblyMachineFunction [...] adds e186a09f148 HexagonDepTimingClasses.h: Don't mark header functions as f [...] adds 8287ed23983 Type.h: Don't mark header functions as file local adds 04614e095ba LaneBitmask.h: Don't mark header functions as file local adds b6293695c35 AtomicOrdering.h: Don't mark header functions as file local adds 88d6995bda4 ConvertUTF.h: Don't mark header functions as file local adds b5c3a33e44b Printable.h: Don't mark header functions as file local adds 4eaad940163 TargetOpcodes.h: Don't mark header functions as file local adds 36f40a6dcda Transforms/Utils/Local.h: Don't mark header functions as fi [...] adds 1617f0720ed ValueMapper.h: Don't mark header functions as file local adds 376cc58a734 ARMAddressingModes.h: Don't mark header functions as file local adds 2ea99a1a974 bpf: fix an uninitialized variable issue adds 40fea70ae76 [Coverage] Provide a stable order for getInstantiationGroups adds 9ea950f009d Add Triple::isOSUnknown adds 4a39ef301ec Implement salavageDebugInfo functionality for SelectionDAG. adds 52a43b285cd Check special-case-list regex before insertion. adds 68a3deb50e2 llvm-readobj: Add support for reading relocations in the An [...] adds 0ec63f421c9 [ThinLTO] Make test for promoted names more specific adds 3a1f0f32aca Assembly tests require x86 target. adds 5773387718c [IRCE] Smarter detection of empty ranges using SCEV adds 30b21c38749 [MemDep] DBG intrinsics don't impact abort limit for call s [...] adds 3b1ffff65b6 [IRCE] Fix intersection between signed and unsigned ranges adds b6397326b82 AMDGPU: Add max-mix-insts subtarget feature adds 7bb5f9ead4d DAG: Fix creating select with wrong condition type adds 1efa535c779 [AArch64] Add support for dllimport of values and functions adds 18622837188 [MachineScheduler] Minor refactoring. adds 6d5e445dba4 [ARM] Swap cmp operands for automatic shifts adds 36ed9f49153 [ARM] OrCombineToBFI function adds db07f4c8a7d [llvm-dwarfdump] - Fix array out of bounds access crash. adds 5b353cb3fb9 Re-land "[CodeGen][ExpandMemcmp][NFC] Allow memcmp to expan [...] adds 003fe85e03e [SCEV] Enhance SCEVFindUnsafe for division adds 1f82616ce4f [ARM GlobalISel] Split test into 3. NFC adds 9c73fda2bc6 [ARM GlobalISel] Fix call opcodes adds 88c6881256f [ARM GlobalISel] Update test after r316479. NFC adds 14c20baca7c [ARM GlobalISel] Remove redundant testcases. NFC adds 65f1735a62f [inlineasm] Fix crash when number of matched input constrai [...] adds 1a04abaeee1 [mips] Clean up some whitespace (NFC). adds 7d6a3b67981 Add CalledValuePropagation pass adds b0fa4d87c44 Don't try to use a non-existent header on FreeBSD/mips. adds 18476bdafdb [Local] Fix a bug in the domtree update logic for MergeBasi [...] adds e62a0cb4918 AMDGPU/NFC: Rename memory legalizer tests: adds a3d8d8b25f9 AMDGPU: Cleanup memory legalizer load/store tests adds d5b3d597e5f [X86] Add avx512vpopcntdq to Knights Mill adds 7f40466d3bb [cmake] Restrict resource file usage to Windows build hosts adds 74a12b37401 Remove dead function declaration. adds c936ad38895 [Hexagon] Account for negative offset when limiting max deviation adds ca37830df00 Make the combiner check if shifts are legal before creating them adds 3498a4cb172 Hexagon: Fold a single-use textual header into its use adds 46254ad8234 Add FileVerifier::isCFIProtected(). adds 2bbf52db0b1 Revert r316582 [Local] Fix a bug in the domtree update logi [...] adds bc1160282cb Add a comment to clarify a future change adds b5008395964 [SCEV] Fix an assertion failure in the max backedge taken count adds 5d1f72d3b59 Fix CodeGen/AMDGPU/fcanonicalize-elimination.ll on FreeBSD 11.0 adds c2c04200c88 Re-land "[dwarfdump] Add -lookup option" adds 052d11cee69 Attempt to unbreak the expensive-checks-win bot adds 46057fe01a5 [Transforms] Fix some Clang-tidy modernize and Include What [...] adds 0dfe884a456 [Transforms] Revert r316630 changes in Scalar/MergeICmps.cp [...] adds 34837ae7a00 [X86] Use correct type for return value of ComputeAvailable [...] adds 939e970215c [AsmParser][TableGen] Make the generated mnemonic spell che [...] adds e1b56f0dcfe [AsmParser][TableGen] Add VariantID argument to the generat [...] adds ddfb9844718 Tidy up CountingFunctionInserter a little. NFC. adds e703b246767 [PowerPC] Use record-form instruction for Less-or-Equal -1 [...] adds b723ea0a40f Update my email addresses, NFC. adds 46690e4aa0b [mips] Fix PR35071 adds 525c1c6d933 It's a test to demonstrate wrong disassembler with 0x67 prefix adds 975b1d7a6b4 [mips] Fix (dis)assembly of abs.fmt for micromips adds 941b1f1426a [LSV] Skip all non-byte sizes, not only less than eight bits adds 4ff96e5fbb1 [LSV] Avoid adding vectors of pointers as candidates adds b25352f371c AMDGPU: Handle s_buffer_load_dword hazard on SI adds 509132b368e Represent runtime preemption in the IR. adds e7df36ebba1 Reapply r316582 [Local] Fix a bug in the domtree update log [...] adds 228f43d82fe [MachineModuleInfoImpls] Replace qsort with array_pod_sort adds ae8900a8833 [DynamicLibrary] Fix build on musl libc adds ea6f05e0176 [dsymutil] Check AttrInfo.Name validity before using it adds 675c21a1865 Clear LastMappingSymbols and LastEMS(Info) when resetting t [...] adds fdd275fc256 AMDGPU: Commit missing fence-barrier test adds beb047f3df9 [docs] Fix a small typo adds f4c162bbd11 [x86] use an insert op to put one variable element into a c [...] adds a6175a4b974 [COFF] Support ordinals in def files with space between @ a [...] adds 6b9f2f63454 [GISel]: Missed checking if it's okay to create a G_CONSTAN [...] adds 2555ced389d Support/reg*.h: Make headers include their dependencies adds 1af8077b280 [TableGen] Use Twine instead of std::string concatenation i [...] adds fa00b3d52d6 [LICM] Restructure implicit exit handling to be more clear [NFCI] adds 97d365b0a79 [X86] Teach the assembly parser to warn on duplicate regist [...] adds 7d937df6d02 [X86] Improve handling of UDIVREM8_ZEXT_HREG/SDIVREM8_SEXT_ [...] adds b1bfcf247fd Do not add discriminator encoding for debug intrinsics. adds 1da3748d0f6 Support/reg*: Roll some non-modular headers into their sing [...] adds 15a2af58f75 [ARM] Honor -mfloat-abi for libcall calling convention adds 76074cad4de [SimplifyIndVars] Shorten code by using SCEV helper [NFC] adds 9a0f2ee60ef [CGP] Merge empty case blocks if no extra moves are added. adds 921ae2bfbfd MCCodePadder.h: Include definition of type for use with DenseMap adds 7be6b37802f InstructionSelectorImpl.h: Modularize/remove ODR violations [...] adds 8200df755e8 [WebAssembly] MC: Don't allow zero sized data segments adds b2c3f3b9496 Revert "[CGP] Merge empty case blocks if no extra moves are [...] adds eb271e82ff4 [PDB] Handle an empty globals hash table with no buckets adds 16267f1cbc6 [Transforms] Fix some Clang-tidy modernize and Include What [...] adds 53b3cd421ee Add subclass data to the FoldingSetNode for MemIntrinsicSDNodes. adds 11fa8e39fd2 Revert rL316568 because of sudden performance drop on ARM adds 049a66484db llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h: Fix -fmo [...] adds e8e122ad89e [GVN][NFC] Refactor loop iteration with foreach adds f8e00e2dc29 [CodeGen][ExpandMemcmp][NFC] Make tests more complete. adds aa108d865d3 DAG: Fold fma (fneg x), K, y -> fma x, -K, y adds 603d7b30553 [llvm-dwarfdump] - Teach verifier to report broken DWARF ex [...] adds ed00729d34b Fix BB after r316756 "[llvm-dwarfdump] - Teach verifier to [...] adds a129dc8bcf5 [LLVM-C] Publicly expose getters of MetadataType, TokenType adds f1bc4aa5fa5 [CodeGen][ExpandMemCmp][NFC] Simplify load sequence generation. adds 2fea9f7ed77 [CodeGen] Fix -Wunused-private-field warning on lld-x86_64- [...] adds c35c11558b5 [LoopPredication] Handle the case when the guard and the la [...] adds 1110171c8f7 [X86][F16C] Fix btver2 AGU pipe scheduling adds 2b556e9b177 ELF: Add support for emitting dynamic relocations in the An [...] adds cc4d10e83e4 [X86][SSE] Add tests for inserting all-bits (-1) into a vector adds 93d857e6a90 [Hexagon] Fix an incorrect assertion in HexagonConstExtenders.cpp adds 80394a6ae9c Fix llvm-special-case-list-fuzzer regexp exception adds 7f0b00f1aac [X86] Add avx512vl command line to fast-isel-nontemporal.ll adds b682b06f983 [X86] Teach fastisel to use VLX VMOVNTDQA for v4f64 and 256 [...] adds 359c2dcf35c Improve clamp recognition in ValueTracking. adds 8c851b5c9d6 [X86] Add fast-isel tests for integer shifts. We definitely [...] adds 35ac462cb60 [X86] Remove fast-isel code for handling i8 shifts. This is [...] adds 67384e3ffaa Force #define GTEST_LANG_CXX11. adds 6861d89ae55 Handle undefined weak hidden symbols on all architectures. adds 9a8a8159d34 Make 32-bit member offset in Archive::Symbol::getMember 64-bit adds 9875a79d9f9 [DAGCombine] Don't combine sext with extload if sextload is [...] adds 8822399c8a3 Add a few missing headers for modularization/IWYU/etc adds 31407d3674a [Hexagon] Adjust patterns to reflect instruction selection [...] adds b3d6348d2e6 Add support for writing 64-bit symbol tables for archives w [...] adds 7412860f69f Revert "Add support for writing 64-bit symbol tables for ar [...] adds f84f672eaf4 [support] remove tautological comparison in Support/Windows [...] adds f94e4f3ed73 AMDGPU/GlobalISel: Mark 32-bit G_FADD as legal adds b35e220e58d [ADT] Fix some Clang-tidy modernize and Include What You Us [...] adds 6d5fc62c9bf [PartialInlineLibCalls] Teach PartialInlineLibCalls to hono [...] adds 7ba2fea1278 [X86] Use update_llc_test_checks.py to regenerate fast-isel [...] adds f5863897ac5 [X86] Add avx command lines to two fast-isel tests to get c [...] adds 2956373588d [ConstantFold] Fix a crash when folding a GEP that has vect [...] adds 3445b001285 [X86] Remove unneeded MVT::i1 related code from fast isel. adds 6fd0bcdf51d [X86] Add a fast-isel test for the i8 pseudo cmov. adds 0cced31cf0a [X86] Use update_llc_test_checks.py to regenerate fast-isel [...] adds 248c60ff580 [X86] Add avx command lines to fast-isel-constpool.ll to im [...] adds 559a395253f [SelectionDAG] Support 'bit preserving' floating points bit [...] adds 36351285336 [X86] Correct the alignments on the aligned test cases in f [...] adds 2146c5ac40a [X86][SSE] Rename truncateVectorCompareWithPACKSS to trunca [...] adds 72428f5e04d [SimplifyCFG] use pass options and remove the latesimplifycfg pass adds cf76a97d8fa ADT: add a helper to check if the Triple is ARM64 adds 4a6c7d6ea22 [X86] Replace some default cases in X86SelectShift with llv [...] adds a101cd003a2 [X86] Fix a mistake in the X86ISelDAGToDAG.cpp code for MUL [...] adds f3178970e3f [X86][SSE] Split off matchVectorShuffleWithPACK. NFCI. adds 6804946f1c6 [X86][SSE] Combine 128-bit target shuffles to PACKSS/PACKUS. adds 1f5b3589c8d [SelectionDAG] Add support for INSERT_SUBVECTOR to computeK [...] adds bc1d6a2e875 [X86] Remove invalid code from LowerVSELECT. adds 97768f77500 [X86] Add AVX512 support to X86FastISel::X86MaterializeFP adds 654a1f4e493 [X86] Use update_llc_test_checks.py to regenerate fast-isel [...] adds 9a06bd36102 [X86] Use update_llc_test_checks.py to regenerate fast-isel [...] adds 2c43c3b3329 [X86] Add AVX512 support to X86FastISel::X86SelectFPExt and [...] adds e821fb05ebb [X86] Use the extended vector register classes in fast isel [...] adds 5fac9279da0 [X86] Fix typo in comment. NFC adds 06ded7390f8 [X86] Remove combine that turns X86ISD::LSUB into X86ISD::L [...] adds d23b241af01 [X86] Add a slow-incdec command line to atomic-eflags-reuse.ll adds efd461e3e36 [X86][SSE] ComputeNumSignBits tests showing missing SHL/SRA [...] adds b3d173b2690 [SelectionDAG] Add SRA/SHL demanded elts support to Compute [...] adds d366ce4dec1 [X86][SSE] ComputeNumSignBits tests showing missing SEXT/AN [...] adds 9c64b96f295 [(new) Pass Manager] instantiate SimplifyCFG with the same [...] adds 986395e8cd1 [X86][SSE] Split ComputeNumSignBits SEXT/AND/XOR/OR demande [...] adds 63745a67d6e [SelectionDAG] Add SEXT/AND/XOR/Or demanded elts support to [...] adds 2e51b7664ee [X86] Move some EVEX->VEX code to a helper function to prep [...] adds 6b688917218 [X86] Simplify code by removing an unnecessary temporary va [...] adds e785b6bb161 [X86] Rearrange code in X86InstrInfo.cpp to put all the fol [...] adds e78fad81ecb [GVN][NFC] Mark instruction for deletion instead of immedia [...] adds 25cc5180890 Recommit r315288: [SCCP] Propagate integer range info for p [...] adds c021b1e747d Revert r316887 to fix buildbot failures. adds 5d03e9f5804 [IRCE][NFC] Store Length as SCEV in RangeCheck instead of Value adds e3ef547dd46 [X86][AVX512] Adding a pattern for broadcastm intrinsic. adds a40f36599e5 Recommit r315288: [SCCP] Propagate integer range info for p [...] adds 1e91fb93c9c Revert "[X86][AVX512] Adding a pattern for broadcastm intrinsic." adds de1958a5459 [ARM GlobalISel] Fixup r316572. NFC adds 1172d65aaf1 Invalid used of 'w' suffix on push and pop using 64-bit reg [...] adds 3db281db106 [GlobalISel|ARM] : Allow legalizing G_FSUB adds 4d7518052e4 [Hexagon] Allow the RDF optimizations to be run in .mir testcases adds 4ccf677f27f [CodeGen][ExpandMemcmp] Allow memcmp to expand to vector lo [...] adds a52756b2c94 [AMDGPU] Emit metadata for hidden arguments for kernel enqueue adds 963ec731b44 [PassManager, SimplifyCFG] add test for PR34603 / D38566; NFC adds 1fd065d4bbf [X86] Regenerate test using update_llc_test_checks.py adds 7f36a3ae353 [X86] Remove AVX512 early out from X86FastISel::X86SelectCmp. adds 87eb2fe42c6 [X86] Make sure we don't create locked inc/dec instructions [...] adds f98d7636f42 [PPC CodeGen] Fix the bitreverse.i64 intrinsic. adds afc231c459f Move isDSOLocal check and add a comment. adds 1cf2bb25c9a [X86][AVX512] Adding a pattern for broadcastm intrinsic. adds a7e9d462986 [X86][SSE] Add clflush scheduling test adds 76d96786fd4 [X86][AVX] Add missing vcvtpd2dq/vcvtps2dq scheduling tests adds de321cd4ac2 [MC] Split out register def/use idx calls to make debugging [...] adds 11015c4281e [X86][SSE] ComputeNumSignBits tests showing missing VSELECT [...] adds d17a19ebd19 [SelectionDAG] Add SELECT demanded elts support to ComputeN [...] adds 3e6b0a64380 [X86][AVX512] Cleanup scheduler tests - split GENERIC and S [...] adds 90f33cf3456 [X86][SSE] computeKnownBits tests showing missing VSELECT d [...] adds d556da541d0 [SelectionDAG] Add VSELECT support to computeKnownBits adds 31d46909baa [X86][SSE] Add another computeKnownBits test showing missin [...] adds 2bce73a5e5a X86 Tests: Update the variable-index permute tests with FP [...] adds 6d2ed8bccce [SelectionDAG] Add VSELECT demanded elts support to compute [...] adds 6f94e8ffb1b [GVNHoist] Fix non-deterministic sort order of PHIs for ide [...] adds 8e9d06e47cc Create instruction classes for identifying any atomicity of [...] adds b2d41e210a2 Revert "[PowerPC] Try to simplify a Swap if it feeds a Splat" adds 0d1abb33e66 [NewGVN] Stop assuming PHI args ordering when looking at ph [...] adds fb90a6544e6 [X86] Add AVX512 support to fast isel's X86ChooseCmpOpcode. adds 228b83b879a [CMake] Fix linker detection in AddLLVM.cmake adds 2bd22dfce73 InferAddressSpaces: Fix bug about replacing addrspacecast adds c831070a703 Fix -fuse-ld feature detection error. adds 8dddb8d5bbf [AArch64]: range loopify frame-lowering adds 64ef8950b1c [SelectionDAG] Tidyup computeKnownBits extension/truncation [...] adds 84256dd9366 Fix unused variable warnings. NFCI. adds 5bc3dc33c3c [CGP] Fix crash on i96 bit multiply adds 417fd3fcbfc Undo accidental commit adds 6c2f3c27617 [cmake] Make check_linker_flags operate via linker flags adds 432bab12b8e [X86] Clang-format some code. NFC adds 933b96c6fcc [SimplifyIndVar] Extract out invariant expression handling adds 057fc35f6fd Reapply "[GVN] Prevent LoadPRE from hoisting across instruc [...] adds 65766ca32db [IndVarSimplify] Simplify code using preheader assumption adds c5d28fa48d9 [NFC] Get rid of variables used in assert only adds a4989ddb03c [X86] Make AVX512_512_SET0 XMM16-31 lower to 128-bit XOR wh [...] adds 9091262d062 [IRCE][NFC] Rename fields of InductiveRangeCheck adds 49bad88f950 [CGP] Fix the detection of trivial case for addressing mode adds 51db7fc904f [AVX512] Adding new patterns for extract_subvector of vXi1 adds 7fa6b255422 [LoopUnroll] Clean up remarks for unroll remainder adds 7b6f7521ee8 Adding a shufflevector and select LLVM IR instructions fuzz tool adds 4f7d658ee00 [InstCombine] Simplify selects that test cmpxchg instructions adds 066071f53f9 [ThinLTO] Double bits of module hash used for renaming adds ac330efcdf3 [dsymutil] Implement the --threads option adds 12b4d06b94c [Reassociate] Remove FIXME from looptest.ll (NFC) adds 1ed02bf67f9 [test] Fix dsymutil/cmdline.test adds 29c5a7e7b99 [LoopVectorize] Replace manual VPlan memory management with [...] adds efb1cd4c283 [X86][SSE] Add VSRLI/VSRAI/VSLLI demanded elts support to c [...] adds 7166565e547 [asan] Upgrade private linkage globals to internal linkage on COFF adds 003140e23d7 LTOModule::isBitcodeFile() shouldn't assert when returning false. adds 95c7aaf4510 [X86][AsmParser] Treat '%' as the modulo operator under Int [...] adds 98506f3291d [IndVarSimplify] Simplify code using a dictionary adds 153600762f8 [Support] Make the default chunk size of raw_fd_ostream to 1 GiB. adds 63229377756 [IndVarSimplify] Extract wrapper around SE-.isLoopInvariant [...] adds 4766dc022a4 [globalisel][tablegen] Allow any comment in DebugCommentAct [...] adds c6f644f195b [Metadata][NFC] Make MDNode::resolve() public in preparatio [...] adds cb48b14a4fd [ADT] Split optional to only include copy mechanics and dto [...] adds 2e7f1739412 [X86][AVX512] Split AVX512F and AVX512BW bool-vector bitcast tests adds eeba4551b80 [X86][AVX512] Regenerate tests to remove retl/retq regex adds 81bdc44b0e3 [globalisel][tablegen] Add infrastructure to potentially al [...] adds 76a40dc3f34 [SimplifyCFG] Regenerate some test cases using update_test_ [...] adds 66f8223a835 [SimplifyCFG] Use a more generic name for the selects creat [...] adds d619fda3f46 [globalisel][tablegen] Factor out implicit def/use renderer [...] adds aeaa65aec3f [coro] Make Spill a proper struct instead of deriving from pair. adds 159d0eccfee [DWARF] Now that Optional is standard layout, put it into a [...] adds b89bb4ebdb4 [globalisel][tablegen] Keep track of the insertion point wh [...] adds 3f39bd28244 Revert "[DWARF] Now that Optional is standard layout, put i [...] adds 5c71253fa0d Revert r317029: [globalisel][tablegen] Keep track of the in [...] adds 52bd8518b25 loop-rotate: simplify code by using llvm::findDbgValues(). (NFC) adds 0ce6825d9e1 AMDGPU: Select s_buffer_load_dword with a non-constant SGPR offset adds 114eeedb22b Re-commit: [globalisel][tablegen] Keep track of the inserti [...] adds 207bce3fb1c [codeview] Merge file checksum entries for DIFiles with the [...] adds b0f1f2331d9 Revert r317040: [globalisel][tablegen] Keep track of the in [...] adds 15227dba51b Inline compareAddr function into its only caller. NFCI. adds fee1f226fdf Object: Move some code from ELF.h into ELF.cpp. adds 90b71c2f3dd [SimplifyIndVar] Inline makIVComparisonInvariant to elemina [...] adds b7e9d797759 Re-commit: [globalisel][tablegen] Keep track of the inserti [...] adds b2fffdec527 Parse DWARF information to reduce false positives. adds 63e68918195 [AMDGPU] Clean up symbols in the global namespace. adds 1f21c9f87f4 Add system-linux to allow tests run with llvm-lit to restri [...] adds c0b8b805715 [globalisel][tablegen] Stop hard-coding the emitted instruc [...] adds 38316c07ef8 [X86] Add AVX512 support to X86FastISel::fastMaterializeFloatZero. adds 7e0324beccf Add test dependency on llvm-cfi-verify to fix up the build [...] adds b1a2e303f23 [DAGCombiner] Fix typos in comments. NFC adds 89f198924da Revert rL317019, "[ADT] Split optional to only include copy [...] adds 07ea6bb2fb3 Reformat. adds 5d7d418e3b7 [X86] Add more type qualifiers to INSERT_SUBREG operations [...] adds bfaa9edde93 Fix APFloat mod sign adds 81b03a38899 [CodeExtractor] Fix iterator invalidation in findOrCreateBl [...] adds 2452271635f [X86][SSE] Truncate with PACKSS any input with sufficient s [...] adds 9fc9ff98ac4 [SelectionDAG] computeKnownBits - use ashrInPlace on known [...] adds 26acced7377 Revert rL311205 "[IRCE] Fix buggy behavior in Clamp" adds 800f768b3dc Suppress a warning discovered by rL317076. [-Wunused-privat [...] adds 598658d7926 Fix warnings discovered by rL317076. [-Wunused-private-field] adds 697969187cd Revert r313618 "[ARM] Use ADDCARRY / SUBCARRY" adds 4bf7c62ec4e [BranchProbabilityInfo] Handle irreducible loops. adds b639f72d218 Regenerate PACKUS/TRUNCS test (PR31773) adds 41efea75bc9 [X86][SSE] Begun generalizing truncateVectorWithPACKSS to w [...] adds bb38652ad41 Correct dwarf unwind information in function epilogue for X86 adds 078a3381ebe Update VCVTx, VMOVNTPx and VROUNDYPx instructions schedulin [...] adds 2a4a9564d68 [X86] Add 64-bit int to float/double conversion with AVX t [...] adds ef7a206359c [dsymutil][NFC} Rename thread related command line options adds 3dc28623cfd loop-rotate: eliminate duplicate debug intrinsics after splicing. adds 1f603b1248a loop-rotate: avoid duplicating dbg.value intrinsics in the [...] adds fa81b6ba937 [X86] Regnerate test to attempt to fix build bot failure. adds f284f00fe09 LTO: Apply global DCE to ThinLTO modules at LTO opt level 0. adds c476f43bee9 Revert r317106 to facilitate reverting r317105. adds f0b2742b3d6 Revert r317105 to investigate bot breakage. adds 3031a585fbf Adds code to PPC ISEL lowering to recognize half-word inser [...] adds 949005a477d [X86] Prevent fast isel from folding loads into the instruc [...] adds 63dcaeaca44 AMDGPU: Fix set but not used warnings related to AMDGPUAS adds dca3eaa1fc6 Revert 317016 and 317048 adds 4d7894c6d83 [globalisel][tablegen] Add support for multi-insn emission adds 2db2d47e39d Include GUIDs from the same module when computing GUIDs tha [...] adds f14c45fbabe loop-rotate: eliminate duplicate debug intrinsics after splicing. adds 7b5f7b40ad5 loop-rotate: avoid duplicating dbg.value intrinsics in the [...] adds e58f980c356 [X86] Add custom code to EVEX to VEX pass to turn unmasked [...] adds 66f724ee92f [dsymutil, llvm-objcopy] Fix some Clang-tidy modernize and [...] adds 7f53f83a3c2 Rewrite FileOutputBuffer as two separate classes. adds d005962cad8 [X86][SSE] Add PACKUS support to LowerTruncate adds 8ec459f49ce [globalisel][regbank] Warn about MIR ambiguities when regis [...] adds 3f1a9263fc0 [X86] Add CMOV feature to 'i686' processor, making it a pro [...] adds 01dd53d4bd9 [X86] Use foreach in X86.td to combine some of the CPU name [...] adds 8b4e833a6e1 [LLVM-C] Expose functions to create debug locations via DIBuilder. adds 5616b72dcf6 Revert "Correct dwarf unwind information in function epilog [...] adds 368924ad91d loop-unroll: teach remapInstruction to update dbg.value int [...] adds 9ae2da659ff [yaml2obj][ELF] Add support for setting alignment in progra [...] adds 2471073a0bf Update cl::opt<uint64_t> instances to cl::opt<unsigned long long> adds ac57ff23475 [cmake] Switch FATAL_ERROR to SEND_ERROR adds 4347cad0bf6 Remove some of the go specific C bindings for debug info no [...] adds 526d784ae24 Fix for go bindings header to match previous commit. adds d5028962705 [X86] Fix fast-isel-int-float-conversion test adds 77c58f0a985 Revert "Remove some of the go specific C bindings for debug [...] adds c5a51cfc348 [X86] Simplify the detection of pentium-mmx in Host.cpp. adds fb073aa0629 [X86] Remove the model checks from the 486 detection code i [...] adds fcbb986b2d1 [test] Move llvm-dlltool tests into tools/llvm-dlltool. NFC. adds 094f3838fe2 [test] Remove the leftover empty directory after SVN r317189. NFC. adds 167daab4dde llvm-c/DebugInfo.h: Fix warning. [-Wdocumentation] adds 6a45ba3f6bb Update go bindings to use new functions from rL317135. adds 4746ebdd8b3 The patch updates sched numbers for YMM AVX instrs such as [...] adds b7c0518566b [ARM] and, or, xor and add with shl combine adds 1e702fd9054 [SimplifyCFG] Discard speculated dbg intrinsics adds 4352a046c59 [AsmPrinterDwarf] Add support for .cfi_restore directive adds 52f6f2ce7b3 Allow inaccessiblememonly and inaccessiblemem_or_argmemonly [...] adds 122fe39c725 Adding test for extraxt sub vector load and store avx512 adds 66af8bde13a Temporary workaround for msan false positive. new dc4b1c52291 Creating branches/google/testing and tags/google/testing/ f [...] new ce7676b8db6 Cherry-pick r317444 to google/testing. new 64184ec178e Creating branches/google/testing and tags/google/testing/20 [...]
The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: CMakeLists.txt | 19 +- CODE_OWNERS.TXT | 2 +- RELEASE_TESTERS.TXT | 2 +- bindings/go/llvm/DIBuilderBindings.cpp | 19 - bindings/go/llvm/DIBuilderBindings.h | 11 +- bindings/go/llvm/dibuilder.go | 19 +- bindings/ocaml/llvm/llvm_ocaml.c | 2 +- cmake/config-ix.cmake | 4 +- cmake/modules/AddLLVM.cmake | 18 +- cmake/modules/CheckLinkerFlag.cmake | 4 +- cmake/modules/HandleLLVMOptions.cmake | 5 +- docs/AMDGPUUsage.rst | 787 +- docs/BitCodeFormat.rst | 19 +- docs/FuzzingLLVM.rst | 7 + docs/GettingStarted.rst | 72 +- docs/GlobalISel.rst | 74 +- docs/LangRef.rst | 81 +- docs/ProgrammersManual.rst | 2 +- docs/SourceLevelDebugging.rst | 4 +- docs/XRay.rst | 20 +- docs/XRayExample.rst | 64 + include/llvm-c/Core.h | 10 + include/llvm-c/DebugInfo.h | 202 + include/llvm-c/Transforms/IPO.h | 3 + include/llvm-c/Transforms/Scalar.h | 3 - include/llvm/ADT/APFloat.h | 15 + include/llvm/ADT/BitVector.h | 2 +- include/llvm/ADT/DenseMap.h | 5 +- include/llvm/ADT/FoldingSet.h | 44 +- include/llvm/ADT/Optional.h | 64 +- include/llvm/ADT/PointerIntPair.h | 31 +- include/llvm/ADT/PointerSumType.h | 50 +- include/llvm/ADT/PointerUnion.h | 79 +- include/llvm/ADT/STLExtras.h | 122 +- include/llvm/ADT/SmallPtrSet.h | 22 +- include/llvm/ADT/SmallVector.h | 4 +- include/llvm/ADT/StringExtras.h | 32 +- include/llvm/ADT/Triple.h | 14 +- include/llvm/ADT/Twine.h | 54 +- include/llvm/Analysis/BranchProbabilityInfo.h | 12 +- include/llvm/Analysis/DominanceFrontier.h | 2 +- include/llvm/Analysis/DominanceFrontierImpl.h | 2 +- include/llvm/Analysis/IndirectCallSiteVisitor.h | 2 +- include/llvm/Analysis/LoopInfo.h | 8 + include/llvm/Analysis/MemoryBuiltins.h | 8 +- include/llvm/Analysis/RegionInfo.h | 4 +- include/llvm/Analysis/RegionInfoImpl.h | 4 +- include/llvm/Analysis/ScalarEvolution.h | 10 + include/llvm/Analysis/SparsePropagation.h | 288 +- include/llvm/Analysis/TargetTransformInfo.h | 28 +- include/llvm/Analysis/TargetTransformInfoImpl.h | 7 +- include/llvm/Analysis/ValueLatticeUtils.h | 41 + include/llvm/Analysis/ValueTracking.h | 13 +- include/llvm/BinaryFormat/Dwarf.def | 4 + include/llvm/BinaryFormat/ELF.h | 19 + include/llvm/BinaryFormat/ELFRelocs/AMDGPU.def | 1 + include/llvm/BinaryFormat/MachO.h | 16 +- include/llvm/CodeGen/AsmPrinter.h | 5 +- include/llvm/CodeGen/CalcSpillWeights.h | 26 + include/llvm/CodeGen/DFAPacketizer.h | 7 + include/llvm/CodeGen/FaultMaps.h | 3 + .../llvm/CodeGen/GlobalISel/InstructionSelector.h | 71 +- .../CodeGen/GlobalISel/InstructionSelectorImpl.h | 399 +- .../llvm/CodeGen/GlobalISel/LegalizerCombiner.h | 29 +- include/llvm/CodeGen/GlobalISel/LegalizerHelper.h | 3 + include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h | 13 +- include/llvm/CodeGen/LiveIntervalAnalysis.h | 5 + include/llvm/CodeGen/MachineRegisterInfo.h | 4 + include/llvm/CodeGen/PBQP/Solution.h | 5 - include/llvm/CodeGen/RegisterUsageInfo.h | 1 + include/llvm/CodeGen/SelectionDAG.h | 12 + include/llvm/CodeGen/SelectionDAGNodes.h | 6 +- include/llvm/CodeGen/TargetSchedule.h | 2 +- include/llvm/Config/config.h.cmake | 9 + include/llvm/Config/llvm-config.h.cmake | 4 - .../llvm/DebugInfo/CodeView/CodeViewSymbols.def | 5 +- include/llvm/DebugInfo/DIContext.h | 18 +- include/llvm/DebugInfo/DWARF/DWARFContext.h | 12 + include/llvm/DebugInfo/DWARF/DWARFDie.h | 6 +- include/llvm/DebugInfo/DWARF/DWARFUnit.h | 11 +- include/llvm/DebugInfo/MSF/MSFBuilder.h | 1 - include/llvm/DebugInfo/PDB/Native/NativeSession.h | 2 +- include/llvm/ExecutionEngine/ExecutionEngine.h | 5 + include/llvm/IR/Attributes.h | 2 +- include/llvm/IR/CallSite.h | 18 + include/llvm/IR/GlobalValue.h | 17 +- include/llvm/IR/InlineAsm.h | 4 +- include/llvm/IR/InstrTypes.h | 6 + include/llvm/IR/Instructions.h | 36 + include/llvm/IR/IntrinsicInst.h | 450 +- include/llvm/IR/IntrinsicsAMDGPU.td | 9 + include/llvm/IR/LLVMContext.h | 1 + include/llvm/IR/MDBuilder.h | 8 + include/llvm/IR/Metadata.h | 6 +- include/llvm/IR/ModuleSummaryIndex.h | 3 +- include/llvm/IR/Operator.h | 6 +- include/llvm/IR/PassManager.h | 2 +- include/llvm/IR/Type.h | 2 +- include/llvm/InitializePasses.h | 2 +- include/llvm/LinkAllPasses.h | 2 +- include/llvm/MC/LaneBitmask.h | 2 +- include/llvm/MC/MCAsmBackend.h | 42 + include/llvm/MC/MCAssembler.h | 2 + include/llvm/MC/MCCodePadder.h | 243 + include/llvm/MC/MCContext.h | 16 +- include/llvm/MC/MCFragment.h | 93 + include/llvm/MC/MCInst.h | 7 + include/llvm/MC/MCObjectStreamer.h | 6 + include/llvm/MC/MCSchedule.h | 4 +- include/llvm/MC/MCSectionWasm.h | 19 +- include/llvm/MC/MCStreamer.h | 7 + include/llvm/MC/MCWasmStreamer.h | 4 +- include/llvm/Object/COFF.h | 3 +- include/llvm/Object/ELF.h | 272 +- include/llvm/Object/Wasm.h | 2 +- include/llvm/Object/WindowsResource.h | 1 - include/llvm/ObjectYAML/ELFYAML.h | 1 + include/llvm/PassAnalysisSupport.h | 1 + .../llvm/ProfileData/Coverage/CoverageMapping.h | 83 + include/llvm/ProfileData/SampleProf.h | 20 +- include/llvm/Support/AMDGPUKernelDescriptor.h | 139 + include/llvm/Support/AMDGPUMetadata.h | 119 +- include/llvm/Support/AtomicOrdering.h | 21 +- include/llvm/Support/Chrono.h | 14 + include/llvm/Support/Compiler.h | 6 +- include/llvm/Support/ConvertUTF.h | 8 +- include/llvm/Support/FileOutputBuffer.h | 34 +- include/llvm/Support/FormatVariadic.h | 12 +- include/llvm/Support/FormatVariadicDetails.h | 2 +- include/llvm/Support/GenericDomTreeConstruction.h | 39 +- include/llvm/Support/LockFileManager.h | 2 +- include/llvm/Support/Printable.h | 2 +- include/llvm/Support/YAMLParser.h | 6 +- include/llvm/Support/raw_ostream.h | 16 +- include/llvm/TableGen/Error.h | 2 + .../llvm/Target/GlobalISel/SelectionDAGCompat.td | 24 +- include/llvm/Target/Target.td | 6 + include/llvm/Target/TargetLowering.h | 17 +- include/llvm/Target/TargetOpcodes.h | 4 +- include/llvm/Target/TargetSelectionDAG.td | 458 +- include/llvm/Target/TargetSubtargetInfo.h | 5 + include/llvm/Transforms/IPO.h | 4 + include/llvm/Transforms/IPO/ArgumentPromotion.h | 5 +- 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utils/TableGen/RegisterInfoEmitter.cpp | 10 +- utils/TableGen/SubtargetEmitter.cpp | 75 +- utils/TableGen/SubtargetFeatureInfo.cpp | 2 +- utils/TableGen/X86DisassemblerTables.cpp | 472 +- utils/TableGen/X86DisassemblerTables.h | 4 + utils/TableGen/X86EVEX2VEXTablesEmitter.cpp | 8 +- utils/TableGen/X86FoldTablesEmitter.cpp | 3 +- utils/TableGen/X86RecognizableInstr.cpp | 58 +- utils/TableGen/X86RecognizableInstr.h | 2 + utils/lit/lit/TestRunner.py | 33 +- utils/lit/lit/llvm/config.py | 6 +- utils/shuffle_select_fuzz_tester.py | 404 + utils/unittest/CMakeLists.txt | 5 + utils/update_llc_test_checks.py | 26 +- utils/update_mir_test_checks.py | 426 + 1686 files changed, 129761 insertions(+), 70326 deletions(-) create mode 100644 include/llvm-c/DebugInfo.h create mode 100644 include/llvm/Analysis/ValueLatticeUtils.h create mode 100644 include/llvm/MC/MCCodePadder.h create mode 100644 include/llvm/Support/AMDGPUKernelDescriptor.h create mode 100644 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