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from 414bb96 [Hexagon] Fix operand swapping in HexagonPeephole new 4db32f4 Remove duplicated header contents, NFC new 39980d6 [TableGen] Make an error message slightly more informative new 4b52862 AMDGPU/SI: SGPR accounting in getSIProgramInfo must ignore ex [...] new fea41fb AMDGPU: Guard VOPC instructions against incorrect commute new 318d6a2 Add IntrWrite[Arg]Mem intrinsic property
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Summary of changes: include/llvm/IR/Intrinsics.td | 11 +++ include/llvm/IR/IntrinsicsAMDGPU.td | 2 +- include/llvm/Transforms/InstrProfiling.h | 102 --------------------- lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 2 + lib/Target/AMDGPU/SIInstrInfo.cpp | 6 +- lib/Target/AMDGPU/SIInstructions.td | 35 +++---- test/CodeGen/AMDGPU/bug-vopc-commute.ll | 49 ++++++++++ test/CodeGen/AMDGPU/captured-frame-index.ll | 8 +- test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll | 8 +- utils/TableGen/CodeGenDAGPatterns.cpp | 17 +++- utils/TableGen/CodeGenIntrinsics.h | 33 ++++++- utils/TableGen/CodeGenTarget.cpp | 4 + utils/TableGen/IntrinsicEmitter.cpp | 6 +- 13 files changed, 135 insertions(+), 148 deletions(-) create mode 100644 test/CodeGen/AMDGPU/bug-vopc-commute.ll