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from 33d40b31957 [PGO] Fix some style issue of ControlHeightReduction new 7df3d728242 [X86] Don't create X86ISD::AVG nodes from v1iX vectors. new 183b21b1f20 [X86] Don't create ZERO_EXTEND_INREG/SIGN_EXTEND_INREG for [...] new 906fd9ab476 [AArch64] Support reserving x1-7 registers.
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Summary of changes: lib/Target/AArch64/AArch64.td | 11 ++--- lib/Target/AArch64/AArch64CallLowering.cpp | 5 +- lib/Target/AArch64/AArch64FastISel.cpp | 4 ++ lib/Target/AArch64/AArch64FrameLowering.cpp | 2 +- lib/Target/AArch64/AArch64ISelLowering.cpp | 37 ++++++++++++-- lib/Target/AArch64/AArch64RegisterInfo.cpp | 53 ++++++++------------ lib/Target/AArch64/AArch64RegisterInfo.h | 2 + lib/Target/AArch64/AArch64Subtarget.cpp | 6 ++- lib/Target/AArch64/AArch64Subtarget.h | 11 ++--- lib/Target/X86/X86ISelLowering.cpp | 4 +- test/CodeGen/AArch64/arm64-platform-reg.ll | 57 ++++++++++++++++++++++ .../AArch64/arm64-reserved-arg-reg-call-error.ll | 19 ++++++++ test/CodeGen/X86/avg.ll | 29 +++++++++++ test/CodeGen/X86/vec_cast.ll | 22 ++------- 14 files changed, 190 insertions(+), 72 deletions(-) create mode 100644 test/CodeGen/AArch64/arm64-reserved-arg-reg-call-error.ll