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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/llvm-project.
from 2637769b9f3 [lldb] Remove LanguageRuntime::GetOverrideExprOptions adds 1acf129bcf9 [Frontend] Delete a redundant check of -pg for setFramePointer() adds 105e5c940cc [ValueTracking] Add DemandedElts support to computeKnownBit [...] adds a3485301d48 Remove unused function. NFCI. adds 2eb80a99a2c Make StringRef's std::string conversion operator explicit T [...] adds bc101ffd777 GlobalISel: Support widening unmerge results with pointer source adds e3117e5c306 AMDGPU/GlobalISel: Improve legalization of wide stores adds c0b12916a7e AMDGPU/GlobalISel: Use more wide vector load/stores adds 24ee9c84962 Don't mark MIPS TRAP as isTerminator adds 1544cf2d7ce [mlir] Fix errors in release & no-assert adds 70c98671fa7 [clang-format] Add option for not breaking line before ObjC params adds c03349e40f2 [Sema] Remove a -Wrange warning from -Wall adds 943b5561d6a [LegalizeTypes][X86] Add a new strategy for type legalizing [...] adds 234f3b16918 Add ThinLtoJIT example adds d975910c50f [X86] Don't exit from foldOffsetIntoAddress if the Offset i [...] adds a57dd66d5e1 [X86] In X86FastEmitSSESelect, fall back to SelectionDAG if [...] adds 268e57bd35d [clang][driver] Remove an unused parameter. NFC. adds ba8110161df AMDGPU/GFX10: Fix NSA reassign pass when operands are undef adds d82e993cd34 [ADT] 'PointerUnion::is' returns 'bool' adds 5932f7b8f2c [PatchableFunction] Use an empty DebugLoc adds c4b4c0c47c9 [mlir] Expand shape functions in ShapeInference doc
No new revisions were added by this update.
Summary of changes: clang/docs/ClangFormatStyleOptions.rst | 23 + clang/docs/ReleaseNotes.rst | 5 +- clang/include/clang/Basic/DiagnosticGroups.td | 8 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 6 +- clang/include/clang/Format/Format.h | 25 + clang/lib/Driver/ToolChains/Clang.cpp | 17 +- clang/lib/Format/ContinuationIndenter.cpp | 9 +- clang/lib/Format/Format.cpp | 3 + clang/lib/Frontend/CompilerInvocation.cpp | 5 - clang/test/CodeGen/x86_64-profiling-keep-fp.c | 2 +- clang/test/Misc/warning-wall.c | 5 +- clang/test/SemaCXX/warn-range-loop-analysis.cpp | 2 +- clang/unittests/Format/FormatTestObjC.cpp | 31 + llvm/examples/CMakeLists.txt | 1 + llvm/examples/ThinLtoJIT/CMakeLists.txt | 18 + .../examples/ThinLtoJIT/ThinLtoDiscoveryThread.cpp | 65 + llvm/examples/ThinLtoJIT/ThinLtoDiscoveryThread.h | 57 + .../ThinLtoJIT/ThinLtoInstrumentationLayer.cpp | 225 + .../ThinLtoJIT/ThinLtoInstrumentationLayer.h | 77 + llvm/examples/ThinLtoJIT/ThinLtoJIT.cpp | 333 + llvm/examples/ThinLtoJIT/ThinLtoJIT.h | 111 + llvm/examples/ThinLtoJIT/ThinLtoModuleIndex.cpp | 268 + llvm/examples/ThinLtoJIT/ThinLtoModuleIndex.h | 94 + llvm/examples/ThinLtoJIT/bench | 100 + llvm/examples/ThinLtoJIT/main.cpp | 83 + llvm/include/llvm/ADT/PointerUnion.h | 2 +- llvm/include/llvm/CodeGen/TargetLowering.h | 9 +- llvm/lib/Analysis/ValueTracking.cpp | 223 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 58 +- llvm/lib/CodeGen/PatchableFunction.cpp | 11 +- .../CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 395 + .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 15 + llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp | 22 + llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 42 + .../CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp | 1 + .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 2 + .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 11 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 17 +- .../Interpreter/ExternalFunctions.cpp | 2 +- .../PerfJITEvents/PerfJITEventListener.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 27 +- llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp | 11 +- llvm/lib/Target/Mips/MipsInstrInfo.td | 7 +- llvm/lib/Target/X86/X86FastISel.cpp | 2 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 37 +- llvm/lib/Target/X86/X86ISelLowering.h | 2 + .../AArch64/patchable-function-entry-empty.mir | 31 +- .../AMDGPU/GlobalISel/legalize-load-flat.mir | 235 +- .../AMDGPU/GlobalISel/legalize-load-local.mir | 159 +- .../AMDGPU/GlobalISel/legalize-load-private.mir | 572 +- .../AMDGPU/GlobalISel/legalize-store-global.mir | 8429 ++++++++++++++++++++ .../AMDGPU/GlobalISel/legalize-unmerge-values.mir | 251 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.nsa.ll | 43 + llvm/test/CodeGen/Mips/call-after-trap.ll | 33 + llvm/test/CodeGen/X86/atomic-non-integer.ll | 186 +- llvm/test/CodeGen/X86/avx512-insert-extract.ll | 104 +- llvm/test/CodeGen/X86/avx512-masked_memop-16-8.ll | 366 +- llvm/test/CodeGen/X86/avx512-vec-cmp.ll | 66 +- llvm/test/CodeGen/X86/fmf-flags.ll | 13 +- llvm/test/CodeGen/X86/half.ll | 311 +- llvm/test/CodeGen/X86/mxcsr-reg-usage.ll | 1 - llvm/test/CodeGen/X86/pr31088.ll | 210 +- llvm/test/CodeGen/X86/pr38533.ll | 40 +- llvm/test/CodeGen/X86/pr44749.ll | 56 + llvm/test/CodeGen/X86/shuffle-extract-subvector.ll | 32 +- llvm/test/CodeGen/X86/vec_fp_to_int.ll | 58 +- llvm/test/CodeGen/X86/vector-half-conversions.ll | 2008 ++--- llvm/test/Transforms/InstCombine/nsw.ll | 4 +- llvm/test/Transforms/InstCombine/shift-add.ll | 9 +- .../Transforms/LoopVectorize/X86/small-size.ll | 4 +- .../X86/x86-interleaved-accesses-masked-group.ll | 4 +- mlir/docs/ShapeInference.md | 223 + mlir/lib/Transforms/DialectConversion.cpp | 77 +- 73 files changed, 13585 insertions(+), 2411 deletions(-) create mode 100644 llvm/examples/ThinLtoJIT/CMakeLists.txt create mode 100644 llvm/examples/ThinLtoJIT/ThinLtoDiscoveryThread.cpp create mode 100644 llvm/examples/ThinLtoJIT/ThinLtoDiscoveryThread.h create mode 100644 llvm/examples/ThinLtoJIT/ThinLtoInstrumentationLayer.cpp create mode 100644 llvm/examples/ThinLtoJIT/ThinLtoInstrumentationLayer.h create mode 100644 llvm/examples/ThinLtoJIT/ThinLtoJIT.cpp create mode 100644 llvm/examples/ThinLtoJIT/ThinLtoJIT.h create mode 100644 llvm/examples/ThinLtoJIT/ThinLtoModuleIndex.cpp create mode 100644 llvm/examples/ThinLtoJIT/ThinLtoModuleIndex.h create mode 100755 llvm/examples/ThinLtoJIT/bench create mode 100644 llvm/examples/ThinLtoJIT/main.cpp create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir create mode 100644 llvm/test/CodeGen/Mips/call-after-trap.ll create mode 100644 llvm/test/CodeGen/X86/pr44749.ll