[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allnoconfig updated (21a3a0225d8 -> 51a292d9945)

30 Dec 2020


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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allnoconfig
in repository toolchain/ci/llvm-project.
from  21a3a0225d8 [SLP] replace local reduction enum with RecurrenceKind; NFCI
      adds  df7ddeea668 [mlir][python] Add FlatSymbolRef attribute.
      adds  8d18bc8e6db [Utils] reduce code in createTargetReduction(); NFC
      adds  145cbef5879 Copy demangle changes from libcxxabi to llvm with cp_to_llvm.sh.
      adds  6027e05dbfc [SimplifyCFG] Teach SimplifyEqualityComparisonWithOnlyPrede [...]
      adds  fe9bdd96215 [SimplifyCFG] Teach SimplifyEqualityComparisonWithOnlyPrede [...]
      adds  18c407bf4c1 [SimplifyCFG] Teach HoistThenElseCodeToIf() to preserve DomTree
      adds  b8121b2e62d [SimplifyCFG] Teach SinkCommonCodeFromPredecessors() to pre [...]
      adds  d4c0abb4a31 [SimplifyCFG] Teach FoldCondBranchOnPHI() to preserve DomTree
      adds  307156246f7 [SimplifyCFG] Teach mergeConditionalStoreToAddress() to pre [...]
      adds  ec0b671a614 [SimplifyCFG] Teach SimplifyCondBranchToCondBranch() to pre [...]
      adds  39a56f7f172 [SimplifyCFG] Teach SimplifyTerminatorOnSelect() to preserv [...]
      adds  df4a931c63b [IROutliner] Adding OptRemarks to the IROutliner Pass
      adds  e03266994af [mlir] Skip empty op-pipelines in inliner textual opt parsing
      adds  673b12e76ff [tsan] Remove stdlib.h from dd_interceptors.cpp
      adds  4e74480e023 [NFC][sanitizer] Simplify InternalLowerBound
      adds  ababeca34b3 [NFC][sanitizer] Add SortAndDedup function
      adds  3c0d36f977d [NFC][lsan] Add nested leak in test
      adds  f5665a24862 [mlir][python] Add Operation.verify().
      adds  14056c88d66 [mlir][Python] Add an Operation.name property
      adds  5fd2b3a1246 [mlir] Add error message when failing to add pass
      adds  7e5a187de31 CrashReason: Add MTE tag check faults to the list of crash  [...]
      adds  fddb4174495 [llvm-elfabi] Add flag to preserve timestamp when output is [...]
      adds  21314940c48 Reland "[NewPM][CodeGen] Introduce CodeGenPassBuilder to he [...]
      adds  92207b2ccea [gn build] Port 21314940c48
      adds  2c8f5bd5394 [MLIR] Make ComplexType buildable if its element type is buildable
      adds  58ce477676c Fix DRR pattern when attributes and operands are interleave [...]
      adds  16c8f6e9134 Revert "Reland "[NewPM][CodeGen] Introduce CodeGenPassBuild [...]
      adds  a373eacb567 [gn build] Port 16c8f6e9134
      adds  480936e741d Reland "[NewPM][CodeGen] Introduce CodeGenPassBuilder to he [...]
      adds  57b8afda10b [gn build] Port 480936e741d
      adds  6da00336248 [RISCV] Define vsext/vzext intrinsics.
      adds  d034a94e7b3 Revert "[llvm-elfabi] Add flag to preserve timestamp when o [...]
      adds  9a5261efd75 [lsan] Parse suppressions just before leak reporting
      adds  9b25b8068df [NFC][lsan] Extract PrintResults function
      adds  8a1f1a100cc [mlir][python] Aggressively avoid name collisions in genera [...]
      adds  5efc71e119d [ORC] Move Orc RPC code into Shared, rename some RPC types.
      adds  f904d50c29f [PowerPC] Remaining KnownBits should be constant when perfo [...]
      adds  e3e25cfb44b [PowerPC] Add mir test to show effect of `optimizeCompareIn [...]
      adds  096b02ebbff [RISCV] Add intrinsics for vcompress instruction
      adds  f76e83bfbba [Analysis] Use llvm::append_range (NFC)
      adds  16d20e2554e [Transforms/Utils] Construct SmallVector with iterator rang [...]
      adds  329b887286a [Analysis, IR] Use *Map::lookup (NFC)
      adds  11f41cd4451 [mlir][python] Install generated dialect sources.
      adds  a1d05892668 [llvm-elfabi] Add flag to preserve timestamp when output is [...]
      adds  18c3e795f7c [Verifier] Remove declaration of method that was removed 8. [...]
      adds  bf286b00e9e [X86][test] Improve global address offset folding tests
      adds  981a0bd8581 [X86] Add x86_amx type for intel AMX.
      adds  ff6fd385524 [libc] Add implementations of rounding functions which depe [...]
      adds  109e0736620 [ConstraintElimination] Add tests for select form and/or (NFC)
      adds  71867ed5e66 [IROutliner] Adding support for swift errors
      adds  eeb99c2ac26 Revert "[IROutliner] Adding support for swift errors"
      adds  30feb93036e [IROutliner] Adding support for swift errors in the IROutliner
      adds  2820a2ca3a0 Move -fno-semantic-interposition dso_local logic from Targe [...]
      adds  6e9755bb80c [X86] Refactor AMX test case, remove unnecessary code.
      adds  abb4cd3e749 [mlir][Python] Initial Affine Map Python Bindings.
      adds  bfedd5d2b65 [ConstraintElimination] Add support for select form of and/or
      adds  e6e64046002 [SimplifyCFG] Add tests for select form and/or for creating [...]
      adds  3f0b637d6b3 [libc++] [docs] Mark contract-related papers as removed fro [...]
      adds  e47e313d647 [mlir] Fix a typo MemRefType -> UnrankedMemRefType
      adds  9b29610228c Use unary CreateShuffleVector if possible
      adds  420d046d6bd clang-format, address warnings
      adds  16c2067cf21 [X86][AMX] Fix compilation warning introduced by 981a0bd8.
      adds  c6035a7bdf2 Remove functions from *-inseltpoison.ll tests if unnecessary
      adds  e90ea76380d [IR] remove 'NoNan' param when creating FP reductions
      adds  2016f2c8a76 Fixes warning 'enumeration value not handled in switch'.
      adds  3567908d8ce [SLP] add fadd reduction test to show broken FMF propagation; NFC
      adds  ed507bc4d5e [mlir] NFC - Fix SubViewOp printing
      adds  9b5a3d67b49 [mlir] Fix indexing of first offset operand in ops that imp [...]
      adds  b0d6bebe90d [ELF] Drop '>>> defined in ' for locations of linker synthe [...]
      adds  9c0c123b0b4 [CMake][tsan] Remove --sysroot=.
      adds  fe431103b63 [IROutliner] Adding option to enable outlining from linkonc [...]
      adds  70de7e0d9a9 [compiler-rt] FuzzedDataProvider: Add PickValueInArray for  [...]
      adds  88cadb894ce [PowerPC][test] Add explicit dso_local to definitions in EL [...]
      adds  453b6aadcef [mlir] Add option to read reproducer options from file
      adds  277ebe46c66 Fix `LLVM_ENABLE_MODULES=On` build
      adds  51a292d9945 [gn build] Switch copy_bundle_data from pax to cpio
No new revisions were added by this update.
Summary of changes:
 clang/lib/CodeGen/CGBuiltin.cpp                    |   23 +-
 clang/lib/CodeGen/CGExpr.cpp                       |   16 +-
 clang/lib/CodeGen/CGExprScalar.cpp                 |    6 +-
 clang/lib/CodeGen/CodeGenModule.cpp                |   13 +-
 clang/test/CodeGen/X86/amx_api.c                   |   13 +-
 clang/test/CodeGen/X86/avx-builtins.c              |   34 +-
 clang/test/CodeGen/X86/avx2-builtins.c             |   22 +-
 clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c |  192 ++--
 clang/test/CodeGen/X86/avx512bw-builtins.c         |   12 +-
 clang/test/CodeGen/X86/avx512dq-builtins.c         |   24 +-
 clang/test/CodeGen/X86/avx512f-builtins.c          |   56 +-
 .../CodeGen/X86/avx512vl-builtins-constrained.c    |    8 +-
 clang/test/CodeGen/X86/avx512vl-builtins.c         |   52 +-
 clang/test/CodeGen/X86/avx512vlbw-builtins.c       |   16 +-
 clang/test/CodeGen/X86/avx512vldq-builtins.c       |   12 +-
 clang/test/CodeGen/X86/f16c-builtins-constrained.c |    4 +-
 clang/test/CodeGen/X86/f16c-builtins.c             |    4 +-
 clang/test/CodeGen/X86/sse2-builtins.c             |    6 +-
 clang/test/CodeGen/arm-mve-intrinsics/vmovl.c      |   16 +-
 clang/test/CodeGen/arm-mve-intrinsics/vmovn.c      |   16 +-
 clang/test/CodeGen/arm-mve-intrinsics/vrev.c       |   30 +-
 clang/test/CodeGen/arm64-abi-vector.c              |    8 +-
 clang/test/CodeGen/semantic-interposition-no.c     |   23 +
 clang/test/CodeGenOpenCL/as_type.cl                |   14 +-
 clang/test/CodeGenOpenCL/partial_initializer.cl    |    2 +-
 clang/test/CodeGenOpenCL/preserve_vec3.cl          |    4 +-
 clang/test/CodeGenOpenCL/vectorLoadStore.cl        |    2 +-
 clang/test/CodeGenOpenCL/vector_literals_valid.cl  |   18 +-
 compiler-rt/include/fuzzer/FuzzedDataProvider.h    |    9 +
 .../fuzzer/tests/FuzzedDataProviderUnittest.cpp    |   14 +
 compiler-rt/lib/lsan/lsan_common.cpp               |  114 +-
 compiler-rt/lib/lsan/lsan_common_fuchsia.cpp       |    4 +-
 .../lib/sanitizer_common/sanitizer_common.h        |   32 +-
 .../lib/sanitizer_common/sanitizer_stackdepot.cpp  |    3 +-
 .../tests/sanitizer_common_test.cpp                |   69 +-
 compiler-rt/lib/tsan/CMakeLists.txt                |   15 -
 compiler-rt/lib/tsan/dd/dd_interceptors.cpp        |   11 +-
 .../test/lsan/TestCases/suppressions_file.cpp      |   16 +-
 libc/config/linux/x86_64/entrypoints.txt           |    9 +
 libc/spec/stdc.td                                  |   12 +
 libc/src/math/CMakeLists.txt                       |  108 ++
 libc/src/math/llrint.cpp                           |   19 +
 libc/src/math/llrint.h                             |   18 +
 libc/src/math/llrintf.cpp                          |   19 +
 libc/src/math/llrintf.h                            |   18 +
 libc/src/math/llrintl.cpp                          |   19 +
 libc/src/math/llrintl.h                            |   18 +
 libc/src/math/lrint.cpp                            |   18 +
 libc/src/math/lrint.h                              |   18 +
 libc/src/math/lrintf.cpp                           |   18 +
 libc/src/math/lrintf.h                             |   18 +
 libc/src/math/lrintl.cpp                           |   19 +
 libc/src/math/lrintl.h                             |   18 +
 libc/src/math/rint.cpp                             |   18 +
 libc/src/math/rint.h                               |   18 +
 libc/src/math/rintf.cpp                            |   18 +
 libc/src/math/rintf.h                              |   18 +
 libc/src/math/rintl.cpp                            |   18 +
 libc/src/math/rintl.h                              |   18 +
 libc/test/src/math/CMakeLists.txt                  |  135 +++
 libc/test/src/math/RIntTest.h                      |  138 +++
 libc/test/src/math/RoundToIntegerTest.h            |  177 ++-
 libc/test/src/math/llrint_test.cpp                 |   13 +
 libc/test/src/math/llrintf_test.cpp                |   13 +
 libc/test/src/math/llrintl_test.cpp                |   14 +
 libc/test/src/math/lrint_test.cpp                  |   13 +
 libc/test/src/math/lrintf_test.cpp                 |   13 +
 libc/test/src/math/lrintl_test.cpp                 |   13 +
 libc/test/src/math/rint_test.cpp                   |   13 +
 libc/test/src/math/rintf_test.cpp                  |   13 +
 libc/test/src/math/rintl_test.cpp                  |   13 +
 libc/utils/FPUtil/NearestIntegerOperations.h       |  118 +-
 libc/utils/MPFRWrapper/MPFRUtils.cpp               |   48 +
 libc/utils/MPFRWrapper/MPFRUtils.h                 |    5 +
 libcxx/docs/Cxx2aStatusPaperStatus.csv             |    4 +-
 lld/ELF/Relocations.cpp                            |   10 +-
 lld/test/ELF/x86-64-gotpc-err.s                    |   21 +-
 lldb/source/Plugins/Process/POSIX/CrashReason.cpp  |   25 +
 lldb/source/Plugins/Process/POSIX/CrashReason.h    |    2 +
 llvm/include/llvm-c/Core.h                         |    7 +
 llvm/include/llvm/Analysis/DDG.h                   |    2 +-
 llvm/include/llvm/Analysis/IntervalIterator.h      |    2 +-
 llvm/include/llvm/Analysis/RegionInfoImpl.h        |    3 +-
 llvm/include/llvm/Analysis/VectorUtils.h           |   10 +-
 llvm/include/llvm/Bitcode/LLVMBitCodes.h           |    3 +-
 llvm/include/llvm/CodeGen/CodeGenPassBuilder.h     | 1145 +++++++++++++++++++
 llvm/include/llvm/CodeGen/MachinePassRegistry.def  |  197 ++++
 llvm/include/llvm/CodeGen/TargetPassConfig.h       |    4 +
 llvm/include/llvm/CodeGen/ValueTypes.td            |    1 +
 llvm/include/llvm/Demangle/ItaniumDemangle.h       |    8 +-
 llvm/include/llvm/Demangle/Utility.h               |    2 +-
 .../Orc/OrcRPCTargetProcessControl.h               |    4 +-
 .../ExecutionEngine/Orc/OrcRemoteTargetClient.h    |    9 +-
 .../ExecutionEngine/Orc/OrcRemoteTargetRPCAPI.h    |  282 ++---
 .../ExecutionEngine/Orc/OrcRemoteTargetServer.h    |    5 +-
 .../Orc/{RPC => Shared}/FDRawByteChannel.h         |   14 +-
 .../ExecutionEngine/Orc/{RPC => Shared}/RPCUtils.h |  250 ++---
 .../Orc/{RPC => Shared}/RawByteChannel.h           |   25 +-
 .../RPCSerialization.h => Shared/Serialization.h}  |  262 ++---
 .../Orc/TargetProcess/OrcRPCTPCServer.h            |   86 +-
 llvm/include/llvm/IR/DataLayout.h                  |    2 +
 llvm/include/llvm/IR/IRBuilder.h                   |    4 +-
 llvm/include/llvm/IR/Intrinsics.h                  |    3 +-
 llvm/include/llvm/IR/Intrinsics.td                 |    2 +
 llvm/include/llvm/IR/IntrinsicsRISCV.td            |   40 +-
 llvm/include/llvm/IR/IntrinsicsX86.td              |   32 +-
 llvm/include/llvm/IR/Type.h                        |   12 +-
 llvm/include/llvm/InterfaceStub/ELFObjHandler.h    |    5 +-
 llvm/include/llvm/Support/MachineValueType.h       |    4 +-
 llvm/include/llvm/Target/CGPassBuilderOption.h     |   65 ++
 llvm/include/llvm/Target/TargetMachine.h           |   29 +
 llvm/include/llvm/Transforms/IPO/IROutliner.h      |   12 +-
 llvm/include/llvm/module.modulemap                 |    1 +
 llvm/lib/Analysis/AliasSetTracker.cpp              |    2 +-
 llvm/lib/Analysis/ConstantFolding.cpp              |   15 +-
 llvm/lib/Analysis/DDG.cpp                          |    2 +-
 llvm/lib/Analysis/DependenceGraphBuilder.cpp       |    3 +-
 llvm/lib/Analysis/IRSimilarityIdentifier.cpp       |   12 +-
 llvm/lib/Analysis/LazyValueInfo.cpp                |    2 +-
 llvm/lib/Analysis/ScalarEvolution.cpp              |    4 +-
 llvm/lib/Analysis/TargetLibraryInfo.cpp            |    4 +-
 llvm/lib/Analysis/VectorUtils.cpp                  |    3 +-
 llvm/lib/AsmParser/LLLexer.cpp                     |    1 +
 llvm/lib/Bitcode/Reader/BitcodeReader.cpp          |    3 +
 llvm/lib/Bitcode/Writer/BitcodeWriter.cpp          |    1 +
 llvm/lib/CodeGen/CMakeLists.txt                    |    1 +
 llvm/lib/CodeGen/CodeGenPassBuilder.cpp            |   25 +
 llvm/lib/CodeGen/CodeGenPrepare.cpp                |    3 +-
 llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp    |    3 +-
 llvm/lib/CodeGen/LLVMTargetMachine.cpp             |   35 +-
 llvm/lib/CodeGen/TargetPassConfig.cpp              |  161 ++-
 llvm/lib/CodeGen/ValueTypes.cpp                    |    3 +
 llvm/lib/ExecutionEngine/Orc/Shared/RPCError.cpp   |   14 +-
 llvm/lib/IR/AsmWriter.cpp                          |    1 +
 llvm/lib/IR/AutoUpgrade.cpp                        |   21 +-
 llvm/lib/IR/ConstantFold.cpp                       |    2 +-
 llvm/lib/IR/Core.cpp                               |    8 +
 llvm/lib/IR/DataLayout.cpp                         |    2 +
 llvm/lib/IR/Function.cpp                           |    9 +-
 llvm/lib/IR/IRBuilder.cpp                          |   20 +-
 llvm/lib/IR/LLVMContextImpl.cpp                    |    1 +
 llvm/lib/IR/LLVMContextImpl.h                      |    2 +-
 llvm/lib/IR/PassRegistry.cpp                       |    6 +-
 llvm/lib/IR/SafepointIRVerifier.cpp                |    3 +-
 llvm/lib/IR/Type.cpp                               |   15 +
 llvm/lib/IR/Verifier.cpp                           |    2 -
 llvm/lib/InterfaceStub/ELFObjHandler.cpp           |   39 +-
 .../Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp   |    3 +-
 .../Target/AMDGPU/AMDGPULowerKernelArguments.cpp   |    3 +-
 .../Target/AMDGPU/AMDGPURewriteOutArguments.cpp    |    3 +-
 .../lib/Target/Hexagon/HexagonTargetObjectFile.cpp |    1 +
 llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp   |    3 +-
 llvm/lib/Target/PowerPC/PPCISelLowering.cpp        |   10 +-
 llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td    |  216 +++-
 llvm/lib/Target/TargetMachine.cpp                  |    8 -
 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp            |    4 +-
 llvm/lib/Target/X86/X86ISelLowering.cpp            |    7 +-
 llvm/lib/Target/X86/X86InterleavedAccess.cpp       |    3 +-
 llvm/lib/Target/X86/X86LowerAMXType.cpp            |  455 ++++----
 llvm/lib/Target/X86/X86RegisterInfo.td             |    2 +-
 llvm/lib/Transforms/IPO/IROutliner.cpp             |  109 +-
 llvm/lib/Transforms/IPO/PassManagerBuilder.cpp     |   18 +-
 .../Transforms/InstCombine/InstCombineCalls.cpp    |    3 +-
 .../InstCombine/InstCombineLoadStoreAlloca.cpp     |    4 +
 .../Transforms/Instrumentation/MemorySanitizer.cpp |   11 +-
 .../Transforms/Scalar/ConstraintElimination.cpp    |   25 +-
 .../Transforms/Scalar/LowerMatrixIntrinsics.cpp    |   10 +-
 llvm/lib/Transforms/Scalar/SROA.cpp                |   19 +-
 llvm/lib/Transforms/Utils/Local.cpp                |    4 +-
 llvm/lib/Transforms/Utils/LoopUtils.cpp            |   42 +-
 llvm/lib/Transforms/Utils/LowerInvoke.cpp          |    2 +-
 .../Transforms/Utils/PromoteMemoryToRegister.cpp   |    2 +-
 .../Transforms/Utils/ScalarEvolutionExpander.cpp   |    6 +-
 llvm/lib/Transforms/Utils/SimplifyCFG.cpp          |  124 ++-
 .../AArch64/aarch64-interleaved-ld-combine.ll      |   42 +-
 llvm/test/CodeGen/AMDGPU/lower-kernargs.ll         |   16 +-
 .../AMDGPU/rewrite-out-arguments-address-space.ll  |    2 +-
 llvm/test/CodeGen/AMDGPU/rewrite-out-arguments.ll  |   24 +-
 .../Generic/expand-experimental-reductions.ll      |   34 +-
 llvm/test/CodeGen/PowerPC/alias.ll                 |   10 +-
 llvm/test/CodeGen/PowerPC/atomics-constant.ll      |    2 +-
 llvm/test/CodeGen/PowerPC/dsolocal-pic.ll          |  124 +++
 llvm/test/CodeGen/PowerPC/dsolocal-static.ll       |  123 +++
 llvm/test/CodeGen/PowerPC/elf-common.ll            |   17 +-
 llvm/test/CodeGen/PowerPC/f128-arith.ll            |   48 +-
 llvm/test/CodeGen/PowerPC/f128-compare.ll          |   24 +-
 llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll  |   40 +-
 llvm/test/CodeGen/PowerPC/float-load-store-pair.ll |   36 +-
 llvm/test/CodeGen/PowerPC/fma-combine.ll           |   22 +-
 llvm/test/CodeGen/PowerPC/func-addr.ll             |    2 +-
 llvm/test/CodeGen/PowerPC/macro-fusion.ll          |    2 +-
 llvm/test/CodeGen/PowerPC/mcm-11.ll                |    4 +-
 llvm/test/CodeGen/PowerPC/mcm-3.ll                 |    4 +-
 llvm/test/CodeGen/PowerPC/mcm-obj-2.ll             |    6 +-
 llvm/test/CodeGen/PowerPC/mcm-obj.ll               |   40 +-
 llvm/test/CodeGen/PowerPC/mma-acc-memops.ll        |   40 +-
 llvm/test/CodeGen/PowerPC/p10-setbc-ri.ll          |  125 +--
 llvm/test/CodeGen/PowerPC/p10-setbc-rr.ll          |  213 ++--
 llvm/test/CodeGen/PowerPC/p10-setbcr-ri.ll         |   44 +-
 llvm/test/CodeGen/PowerPC/p10-setbcr-rr.ll         |  247 ++---
 llvm/test/CodeGen/PowerPC/p10-setnbc-ri.ll         |  203 ++--
 llvm/test/CodeGen/PowerPC/p10-setnbc-rr.ll         |  309 +++---
 llvm/test/CodeGen/PowerPC/p10-setnbcr-ri.ll        |   80 +-
 llvm/test/CodeGen/PowerPC/p10-setnbcr-rr.ll        |  336 +++---
 llvm/test/CodeGen/PowerPC/pcrel-tls-local-exec.ll  |   14 +-
 llvm/test/CodeGen/PowerPC/peephole-align.ll        |   30 +-
 llvm/test/CodeGen/PowerPC/peephole-cmp-eq.mir      |   44 +
 llvm/test/CodeGen/PowerPC/pie.ll                   |    4 +-
 llvm/test/CodeGen/PowerPC/ppc64-calls.ll           |   12 +-
 llvm/test/CodeGen/PowerPC/ppc64-nonfunc-calls.ll   |   10 +-
 .../CodeGen/PowerPC/ppc64-sibcall-shrinkwrap.ll    |    4 +-
 llvm/test/CodeGen/PowerPC/ppc64-sibcall.ll         |   50 +-
 llvm/test/CodeGen/PowerPC/pr32140.ll               |   41 +-
 llvm/test/CodeGen/PowerPC/pr48388.ll               |   41 +
 llvm/test/CodeGen/PowerPC/preemption.ll            |  302 -----
 llvm/test/CodeGen/PowerPC/sched-addi.ll            |    4 +-
 .../PowerPC/tailcall-speculatable-callee.ll        |    2 +-
 llvm/test/CodeGen/PowerPC/tailcall-string-rvo.ll   |    4 +-
 llvm/test/CodeGen/PowerPC/tailcall1-64.ll          |    4 +-
 llvm/test/CodeGen/PowerPC/testComparesi32gtu.ll    |   30 +-
 llvm/test/CodeGen/PowerPC/testComparesi32ltu.ll    |   30 +-
 llvm/test/CodeGen/PowerPC/testComparesieqsc.ll     |   38 +-
 llvm/test/CodeGen/PowerPC/testComparesieqsi.ll     |   38 +-
 llvm/test/CodeGen/PowerPC/testComparesieqsll.ll    |   38 +-
 llvm/test/CodeGen/PowerPC/testComparesieqss.ll     |   38 +-
 llvm/test/CodeGen/PowerPC/testComparesiequc.ll     |   38 +-
 llvm/test/CodeGen/PowerPC/testComparesiequi.ll     |   38 +-
 llvm/test/CodeGen/PowerPC/testComparesiequll.ll    |   38 +-
 llvm/test/CodeGen/PowerPC/testComparesiequs.ll     |   38 +-
 llvm/test/CodeGen/PowerPC/testComparesigesc.ll     |   20 +-
 llvm/test/CodeGen/PowerPC/testComparesigesi.ll     |   20 +-
 llvm/test/CodeGen/PowerPC/testComparesigesll.ll    |   38 +-
 llvm/test/CodeGen/PowerPC/testComparesigess.ll     |   20 +-
 llvm/test/CodeGen/PowerPC/testComparesigeuc.ll     |  110 +-
 llvm/test/CodeGen/PowerPC/testComparesigeui.ll     |  110 +-
 llvm/test/CodeGen/PowerPC/testComparesigeull.ll    |  110 +-
 llvm/test/CodeGen/PowerPC/testComparesigeus.ll     |  110 +-
 llvm/test/CodeGen/PowerPC/testComparesilesc.ll     |   20 +-
 llvm/test/CodeGen/PowerPC/testComparesilesi.ll     |   20 +-
 llvm/test/CodeGen/PowerPC/testComparesilesll.ll    |   38 +-
 llvm/test/CodeGen/PowerPC/testComparesiless.ll     |   20 +-
 llvm/test/CodeGen/PowerPC/testComparesileuc.ll     |  119 +-
 llvm/test/CodeGen/PowerPC/testComparesileui.ll     |  119 +-
 llvm/test/CodeGen/PowerPC/testComparesileull.ll    |  116 +-
 llvm/test/CodeGen/PowerPC/testComparesileus.ll     |  119 +-
 llvm/test/CodeGen/PowerPC/testComparesiltsc.ll     |   80 +-
 llvm/test/CodeGen/PowerPC/testComparesiltsi.ll     |   80 +-
 llvm/test/CodeGen/PowerPC/testComparesiltsll.ll    |  101 +-
 llvm/test/CodeGen/PowerPC/testComparesiltss.ll     |   80 +-
 llvm/test/CodeGen/PowerPC/testComparesiltuc.ll     |   56 +-
 llvm/test/CodeGen/PowerPC/testComparesiltui.ll     |   56 +-
 llvm/test/CodeGen/PowerPC/testComparesiltus.ll     |   56 +-
 llvm/test/CodeGen/PowerPC/testComparesinesc.ll     |   38 +-
 llvm/test/CodeGen/PowerPC/testComparesinesi.ll     |   38 +-
 llvm/test/CodeGen/PowerPC/testComparesinesll.ll    |   42 +-
 llvm/test/CodeGen/PowerPC/testComparesiness.ll     |   38 +-
 llvm/test/CodeGen/PowerPC/testComparesineuc.ll     |   38 +-
 llvm/test/CodeGen/PowerPC/testComparesineui.ll     |   38 +-
 llvm/test/CodeGen/PowerPC/testComparesineull.ll    |   42 +-
 llvm/test/CodeGen/PowerPC/testComparesineus.ll     |   38 +-
 llvm/test/CodeGen/PowerPC/testCompareslleqsc.ll    |   30 +-
 llvm/test/CodeGen/PowerPC/testCompareslleqsi.ll    |   30 +-
 llvm/test/CodeGen/PowerPC/testCompareslleqsll.ll   |   30 +-
 llvm/test/CodeGen/PowerPC/testCompareslleqss.ll    |   30 +-
 llvm/test/CodeGen/PowerPC/testComparesllequc.ll    |   30 +-
 llvm/test/CodeGen/PowerPC/testComparesllequi.ll    |   30 +-
 llvm/test/CodeGen/PowerPC/testComparesllequll.ll   |   30 +-
 llvm/test/CodeGen/PowerPC/testComparesllequs.ll    |   30 +-
 llvm/test/CodeGen/PowerPC/testComparesllgesc.ll    |   16 +-
 llvm/test/CodeGen/PowerPC/testComparesllgesi.ll    |   16 +-
 llvm/test/CodeGen/PowerPC/testComparesllgesll.ll   |   30 +-
 llvm/test/CodeGen/PowerPC/testComparesllgess.ll    |   16 +-
 llvm/test/CodeGen/PowerPC/testComparesllgeuc.ll    |  102 +-
 llvm/test/CodeGen/PowerPC/testComparesllgeui.ll    |  102 +-
 llvm/test/CodeGen/PowerPC/testComparesllgeull.ll   |  102 +-
 llvm/test/CodeGen/PowerPC/testComparesllgeus.ll    |  102 +-
 llvm/test/CodeGen/PowerPC/testCompareslllesc.ll    |   16 +-
 llvm/test/CodeGen/PowerPC/testCompareslllesi.ll    |   16 +-
 llvm/test/CodeGen/PowerPC/testCompareslllesll.ll   |   30 +-
 llvm/test/CodeGen/PowerPC/testComparesllless.ll    |   16 +-
 llvm/test/CodeGen/PowerPC/testComparesllleuc.ll    |  111 +-
 llvm/test/CodeGen/PowerPC/testComparesllleui.ll    |  111 +-
 llvm/test/CodeGen/PowerPC/testComparesllleull.ll   |  108 +-
 llvm/test/CodeGen/PowerPC/testComparesllleus.ll    |  111 +-
 llvm/test/CodeGen/PowerPC/testComparesllltsll.ll   |   95 +-
 llvm/test/CodeGen/PowerPC/testComparesllltuc.ll    |   52 +-
 llvm/test/CodeGen/PowerPC/testComparesllltus.ll    |   52 +-
 llvm/test/CodeGen/PowerPC/testComparesllnesll.ll   |   34 +-
 llvm/test/CodeGen/PowerPC/testComparesllneull.ll   |   34 +-
 llvm/test/CodeGen/PowerPC/tls.ll                   |    6 +-
 llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll      |  650 +++++++++++
 llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll      |  830 ++++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll          |  664 +++++++++++
 llvm/test/CodeGen/RISCV/rvv/vsext-rv64.ll          | 1162 ++++++++++++++++++++
 llvm/test/CodeGen/RISCV/rvv/vzext-rv32.ll          |  664 +++++++++++
 llvm/test/CodeGen/RISCV/rvv/vzext-rv64.ll          | 1162 ++++++++++++++++++++
 llvm/test/CodeGen/X86/AMX/amx-across-func.ll       |   28 +-
 llvm/test/CodeGen/X86/AMX/amx-config.ll            |   40 +-
 llvm/test/CodeGen/X86/AMX/amx-intrinsic-chain.ll   |   25 +-
 llvm/test/CodeGen/X86/AMX/amx-spill.ll             |   56 +-
 llvm/test/CodeGen/X86/AMX/amx-type.ll              |  235 ++--
 llvm/test/CodeGen/X86/fold-add-pcrel.ll            |   41 -
 llvm/test/CodeGen/X86/fold-add.ll                  |  125 ++-
 .../CodeGen/X86/semantic-interposition-comdat.ll   |   28 -
 .../X86/semantic-interposition-infer-dsolocal.ll   |   46 -
 llvm/test/Instrumentation/MemorySanitizer/clmul.ll |   16 +-
 llvm/test/Transforms/ConstraintElimination/and.ll  |   67 ++
 llvm/test/Transforms/ConstraintElimination/or.ll   |   61 +
 llvm/test/Transforms/GVNSink/indirect-call.ll      |    2 +-
 llvm/test/Transforms/GVNSink/sink-common-code.ll   |    2 +-
 llvm/test/Transforms/IROutliner/opt-remarks.ll     |  184 ++++
 llvm/test/Transforms/IROutliner/outlining-odr.ll   |   70 ++
 .../Transforms/IROutliner/outlining-swift-error.ll |   47 +
 .../amdgcn-demanded-vector-elts-inseltpoison.ll    |   28 +-
 .../AMDGPU/amdgcn-demanded-vector-elts.ll          |  278 ++---
 .../Transforms/InstCombine/assume-inseltpoison.ll  |  633 +----------
 .../Transforms/InstCombine/bswap-inseltpoison.ll   |  784 +------------
 .../InstCombine/canonicalize-vector-insert.ll      |   16 +-
 .../Transforms/InstCombine/fmul-inseltpoison.ll    | 1129 +------------------
 .../AArch64/interleaved-accesses-inseltpoison.ll   |    4 +-
 .../AArch64/interleaved-accesses.ll                |  100 +-
 .../ARM/interleaved-accesses-inseltpoison.ll       |    8 +-
 .../InterleavedAccess/ARM/interleaved-accesses.ll  |    8 +-
 .../X86/interleavedStore-inseltpoison.ll           |   12 +-
 .../InterleavedAccess/X86/interleavedStore.ll      |   12 +-
 .../Transforms/LoopVectorize/AMDGPU/packed-math.ll |    4 +-
 llvm/test/Transforms/LoopVectorize/ARM/sphinx.ll   |    6 +-
 .../LoopVectorize/PowerPC/widened-massv-call.ll    |    4 +-
 .../PowerPC/widened-massv-vfabi-attr.ll            |    4 +-
 .../LoopVectorize/float-minmax-instruction-flag.ll |    4 +-
 .../Transforms/LoopVectorize/if-pred-stores.ll     |    4 +-
 .../LoopVectorize/interleaved-accesses.ll          |    6 +-
 .../LoopVectorize/invariant-store-vectorization.ll |    4 +-
 llvm/test/Transforms/LoopVectorize/reduction.ll    |   36 +-
 .../Transforms/LoopVectorize/select-reduction.ll   |    4 +-
 .../bigger-expressions-double.ll                   |  144 +--
 .../Transforms/LowerMatrixIntrinsics/const-gep.ll  |   24 +-
 .../LowerMatrixIntrinsics/load-align-volatile.ll   |    2 +-
 .../multiply-add-sub-double-row-major.ll           |   32 +-
 .../multiply-double-contraction-fmf.ll             |   32 +-
 .../multiply-double-contraction.ll                 |   32 +-
 .../multiply-double-row-major.ll                   |  120 +-
 .../LowerMatrixIntrinsics/multiply-double.ll       |  120 +-
 .../multiply-float-contraction-fmf.ll              |   32 +-
 .../multiply-float-contraction.ll                  |   32 +-
 .../LowerMatrixIntrinsics/multiply-float.ll        |  120 +-
 .../multiply-fused-volatile.ll                     |   64 +-
 .../multiply-i32-row-major.ll                      |  120 +-
 .../LowerMatrixIntrinsics/multiply-i32.ll          |  120 +-
 .../LowerMatrixIntrinsics/propagate-backward.ll    |   24 +-
 .../propagate-backwards-unsupported.ll             |  411 ++++++-
 .../LowerMatrixIntrinsics/propagate-forward.ll     |   32 +-
 .../LowerMatrixIntrinsics/propagate-mixed-users.ll |    4 +-
 .../LowerMatrixIntrinsics/store-align-volatile.ll  |   18 +-
 .../LowerMatrixIntrinsics/strided-load-double.ll   |   24 +-
 .../LowerMatrixIntrinsics/strided-load-float.ll    |   24 +-
 .../LowerMatrixIntrinsics/strided-load-i32.ll      |   24 +-
 .../LowerMatrixIntrinsics/strided-store-double.ll  |   18 +-
 .../LowerMatrixIntrinsics/strided-store-float.ll   |   18 +-
 .../LowerMatrixIntrinsics/strided-store-i32.ll     |   18 +-
 .../transpose-double-row-major.ll                  |   26 +-
 .../LowerMatrixIntrinsics/transpose-double.ll      |   20 +-
 .../transpose-float-row-major.ll                   |   26 +-
 .../LowerMatrixIntrinsics/transpose-float.ll       |   20 +-
 .../transpose-i32-row-major.ll                     |   26 +-
 .../LowerMatrixIntrinsics/transpose-i32.ll         |   20 +-
 .../X86/vector-reductions-expanded.ll              |   34 +-
 .../SLPVectorizer/AMDGPU/horizontal-store.ll       |   30 +-
 .../Transforms/SLPVectorizer/AMDGPU/reduction.ll   |   54 +-
 .../Transforms/SLPVectorizer/X86/horizontal.ll     |   35 +
 llvm/test/Transforms/SROA/vector-promotion.ll      |   18 +-
 .../SimplifyCFG/2004-12-10-SimplifyCFGCrash.ll     |    2 +-
 .../Transforms/SimplifyCFG/2005-06-16-PHICrash.ll  |    2 +-
 .../SimplifyCFG/2008-07-13-InfLoopMiscompile.ll    |    2 +-
 llvm/test/Transforms/SimplifyCFG/BrUnwind.ll       |    2 +-
 llvm/test/Transforms/SimplifyCFG/HoistCode.ll      |    2 +-
 llvm/test/Transforms/SimplifyCFG/InfLoop.ll        |    2 +-
 .../Transforms/SimplifyCFG/UncondBranchToReturn.ll |    2 +-
 .../Transforms/SimplifyCFG/X86/critedge-assume.ll  |    2 +-
 .../Transforms/SimplifyCFG/X86/empty-cleanuppad.ll |    2 +-
 llvm/test/Transforms/SimplifyCFG/X86/pr39187-g.ll  |    2 +-
 .../Transforms/SimplifyCFG/branch-phi-thread.ll    |    2 +-
 .../SimplifyCFG/debug-info-thread-phi.ll           |    2 +-
 llvm/test/Transforms/SimplifyCFG/extract-cost.ll   |    2 +-
 .../Transforms/SimplifyCFG/hoist-common-code.ll    |    2 +-
 .../Transforms/SimplifyCFG/hoist-with-range.ll     |    2 +-
 .../SimplifyCFG/implied-cond-matching-imm.ll       |    2 +-
 .../Transforms/SimplifyCFG/iterative-simplify.ll   |    2 +-
 .../Transforms/SimplifyCFG/merge-cond-stores-2.ll  |    2 +-
 .../Transforms/SimplifyCFG/merge-cond-stores.ll    |    2 +-
 llvm/test/Transforms/SimplifyCFG/pr34131.ll        |    2 +-
 llvm/test/Transforms/SimplifyCFG/pr39807.ll        |    2 +-
 llvm/test/Transforms/SimplifyCFG/pr46638.ll        |    2 +-
 .../SimplifyCFG/preserve-store-alignment.ll        |    2 +-
 .../Transforms/SimplifyCFG/sink-common-code.ll     |    2 +-
 .../SimplifyCFG/switch-on-const-select.ll          |    2 +-
 llvm/test/Transforms/SimplifyCFG/switch_create.ll  |  139 ++-
 .../test/Transforms/SimplifyCFG/unprofitable-pr.ll |    2 +-
 .../tools/llvm-elfabi/preserve-dates-stub.test     |   19 +
 .../test/tools/llvm-elfabi/preserve-dates-tbe.test |    8 +
 llvm/tools/lli/ChildTarget/ChildTarget.cpp         |    6 +-
 llvm/tools/lli/RemoteJITUtils.h                    |    4 +-
 llvm/tools/lli/lli.cpp                             |    8 +-
 llvm/tools/llvm-c-test/echo.cpp                    |    2 +
 llvm/tools/llvm-elfabi/llvm-elfabi.cpp             |   33 +-
 .../llvm-jitlink-executor.cpp                      |    8 +-
 llvm/tools/llvm-jitlink/llvm-jitlink.cpp           |   10 +-
 llvm/tools/llvm-jitlink/llvm-jitlink.h             |    8 +-
 llvm/unittests/ExecutionEngine/Orc/QueueChannel.h  |   12 +-
 .../unittests/ExecutionEngine/Orc/RPCUtilsTest.cpp |  104 +-
 llvm/unittests/IR/PatternMatch.cpp                 |   11 +-
 llvm/utils/TableGen/CodeGenTarget.cpp              |    1 +
 llvm/utils/TableGen/IntrinsicEmitter.cpp           |    4 +-
 llvm/utils/gn/build/toolchain/BUILD.gn             |    6 +-
 llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn  |    1 +
 mlir/docs/PassManagement.md                        |    4 +
 mlir/include/mlir-c/Bindings/Python/Interop.h      |   21 +
 mlir/include/mlir/Bindings/Python/Attributes.td    |   16 +-
 mlir/include/mlir/Dialect/StandardOps/IR/Ops.td    |   33 +-
 mlir/include/mlir/IR/OpBase.td                     |   13 +-
 mlir/include/mlir/Interfaces/ViewLikeInterface.td  |   31 +-
 mlir/lib/Bindings/Python/CMakeLists.txt            |   19 +
 mlir/lib/Bindings/Python/IRModules.cpp             |   90 +-
 mlir/lib/Bindings/Python/IRModules.h               |   22 +
 mlir/lib/Dialect/StandardOps/IR/Ops.cpp            |    2 +-
 mlir/lib/Pass/PassRegistry.cpp                     |   11 +-
 mlir/lib/Support/MlirOptMain.cpp                   |   23 +
 mlir/lib/Transforms/Inliner.cpp                    |    4 +
 mlir/test/Bindings/Python/ir_affine_map.py         |   24 +
 mlir/test/Bindings/Python/ir_attributes.py         |   14 +
 mlir/test/Bindings/Python/ir_operation.py          |   27 +-
 mlir/test/Pass/invalid-pass.mlir                   |    6 +
 mlir/test/Pass/run-reproducer.mlir                 |   22 +
 mlir/test/mlir-tblgen/op-python-bindings.td        |  148 +--
 mlir/test/mlir-tblgen/rewriter-indexing.td         |    8 +
 mlir/test/mlir-tblgen/types.mlir                   |    2 +-
 mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp      |   61 +-
 mlir/tools/mlir-tblgen/RewriterGen.cpp             |    2 +-
 438 files changed, 15581 insertions(+), 9514 deletions(-)
 create mode 100644 clang/test/CodeGen/semantic-interposition-no.c
 create mode 100644 libc/src/math/llrint.cpp
 create mode 100644 libc/src/math/llrint.h
 create mode 100644 libc/src/math/llrintf.cpp
 create mode 100644 libc/src/math/llrintf.h
 create mode 100644 libc/src/math/llrintl.cpp
 create mode 100644 libc/src/math/llrintl.h
 create mode 100644 libc/src/math/lrint.cpp
 create mode 100644 libc/src/math/lrint.h
 create mode 100644 libc/src/math/lrintf.cpp
 create mode 100644 libc/src/math/lrintf.h
 create mode 100644 libc/src/math/lrintl.cpp
 create mode 100644 libc/src/math/lrintl.h
 create mode 100644 libc/src/math/rint.cpp
 create mode 100644 libc/src/math/rint.h
 create mode 100644 libc/src/math/rintf.cpp
 create mode 100644 libc/src/math/rintf.h
 create mode 100644 libc/src/math/rintl.cpp
 create mode 100644 libc/src/math/rintl.h
 create mode 100644 libc/test/src/math/RIntTest.h
 create mode 100644 libc/test/src/math/llrint_test.cpp
 create mode 100644 libc/test/src/math/llrintf_test.cpp
 create mode 100644 libc/test/src/math/llrintl_test.cpp
 create mode 100644 libc/test/src/math/lrint_test.cpp
 create mode 100644 libc/test/src/math/lrintf_test.cpp
 create mode 100644 libc/test/src/math/lrintl_test.cpp
 create mode 100644 libc/test/src/math/rint_test.cpp
 create mode 100644 libc/test/src/math/rintf_test.cpp
 create mode 100644 libc/test/src/math/rintl_test.cpp
 create mode 100644 llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
 create mode 100644 llvm/include/llvm/CodeGen/MachinePassRegistry.def
 rename llvm/include/llvm/ExecutionEngine/Orc/{RPC => Shared}/FDRawByteChannel.h (87%)
 rename llvm/include/llvm/ExecutionEngine/Orc/{RPC => Shared}/RPCUtils.h (89%)
 rename llvm/include/llvm/ExecutionEngine/Orc/{RPC => Shared}/RawByteChannel.h (88%)
 rename llvm/include/llvm/ExecutionEngine/Orc/{RPC/RPCSerialization.h => Shared/Ser [...]
 create mode 100644 llvm/include/llvm/Target/CGPassBuilderOption.h
 create mode 100644 llvm/lib/CodeGen/CodeGenPassBuilder.cpp
 create mode 100644 llvm/test/CodeGen/PowerPC/dsolocal-pic.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/dsolocal-static.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/peephole-cmp-eq.mir
 create mode 100644 llvm/test/CodeGen/PowerPC/pr48388.ll
 delete mode 100644 llvm/test/CodeGen/PowerPC/preemption.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsext-rv64.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vzext-rv32.ll
 create mode 100644 llvm/test/CodeGen/RISCV/rvv/vzext-rv64.ll
 delete mode 100644 llvm/test/CodeGen/X86/fold-add-pcrel.ll
 delete mode 100644 llvm/test/CodeGen/X86/semantic-interposition-comdat.ll
 delete mode 100644 llvm/test/CodeGen/X86/semantic-interposition-infer-dsolocal.ll
 create mode 100644 llvm/test/Transforms/IROutliner/opt-remarks.ll
 create mode 100644 llvm/test/Transforms/IROutliner/outlining-odr.ll
 create mode 100644 llvm/test/Transforms/IROutliner/outlining-swift-error.ll
 create mode 100644 llvm/test/tools/llvm-elfabi/preserve-dates-stub.test
 create mode 100644 llvm/test/tools/llvm-elfabi/preserve-dates-tbe.test
 create mode 100644 mlir/test/Bindings/Python/ir_affine_map.py
 create mode 100644 mlir/test/Pass/invalid-pass.mlir
 create mode 100644 mlir/test/Pass/run-reproducer.mlir
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[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allnoconfig updated (21a3a0225d8 -> 51a292d9945)