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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-allnoconfig in repository toolchain/ci/gcc.
from f3ebb88f874 Daily bump. adds 844f96a035b gcc/po/ChangeLog: adds 5ba54df6a0d * config/sparc/linux64.h (ASAN_REJECT_SPEC): New macro. ( [...] adds 0552d7c9a10 Fix param description of graphite-max-arrays-per-scop (PR t [...] adds c4bc178c61d S/390: arch13: Add arch13 as architecture option adds 92d5e9eba44 S/390: arch13: Support new bit operations adds 6c83743823b S/390: arch13: Support new popcount instruction variant. adds dbeb7608c93 S/390: arch13: Add support for new select instruction adds b048920df0f S/390: arch13: Support 32 bit fp-int vector converts adds 5554473b532 S/390: arch13: Support 32 bit fp-int scalar converts adds 2cacf019857 S/390: arch13: New vector builtins - preparation adds 9800b362a06 S/390: arch13: vec_revb vector byte swap builtin adds 58c10639dc0 S/390: arch13: vec_reve element order reversal builtins adds e974fcf343c S/390: arch13: vector load/store byte reversed element for [...] adds c89c20faa0d testsuite: do not try to add -m32 (PR 89916) adds f3692774dcb S/390: arch13: vector load byte reversed element and replicate adds 033411a9863 S/390: arch13: vector shift double by bit builtins adds 7a1fd0b2240 S/390: arch13: vector string search builtins adds 192ece6e16a S/390: arch13: vector float-int conversion builtins adds c390a3d0b40 Obsolete Cell Broadband Engine SPU target support adds 8da4fe0dbf9 sel-sched: fixup reset of first_insn (PR 85876) adds 06f30566ce9 sel-sched: skip outer loop in get_all_loop_exits (PR 84206) adds f3d2a658211 PR target/89902 PR target/89903 * config/i386/i386.c (di [...] adds 9830927885b * gcc.target/visium/bit_shift.c: xfail. adds 9535273c791 Daily bump.
No new revisions were added by this update.
Summary of changes: gcc/ChangeLog | 215 + gcc/DATESTAMP | 2 +- gcc/common/config/s390/s390-common.c | 21 +- gcc/config.gcc | 3 +- gcc/config/i386/i386.c | 130 +- gcc/config/s390/driver-native.c | 2 +- gcc/config/s390/s390-builtin-types.def | 41 +- gcc/config/s390/s390-builtins.def | 161 +- gcc/config/s390/s390-c.c | 2 +- gcc/config/s390/s390-opts.h | 1 + gcc/config/s390/s390.c | 107 +- gcc/config/s390/s390.h | 19 +- gcc/config/s390/s390.md | 342 +- gcc/config/s390/s390.opt | 3 + gcc/config/s390/vecintrin.h | 27 +- gcc/config/s390/vector.md | 142 +- gcc/config/s390/vx-builtins.md | 257 +- gcc/config/sparc/linux64.h | 12 +- gcc/config/sparc/sol2.h | 2 +- gcc/params.def | 2 +- gcc/po/ChangeLog | 6 + gcc/po/EXCLUDES | 9 +- gcc/po/gcc.pot | 17299 +++++++++---------- gcc/sel-sched-ir.h | 10 +- gcc/sel-sched.c | 6 +- gcc/testsuite/ChangeLog | 106 + gcc/testsuite/gcc.dg/pr84206.c | 24 + gcc/testsuite/gcc.dg/pr85876.c | 18 + gcc/testsuite/gcc.dg/pr86928.c | 1 - gcc/testsuite/gcc.target/i386/pr70799-4.c | 17 - gcc/testsuite/gcc.target/i386/pr70799-5.c | 17 - gcc/testsuite/gcc.target/i386/pr89902.c | 13 + gcc/testsuite/gcc.target/i386/pr89903.c | 14 + gcc/testsuite/gcc.target/s390/arch13/bitops-1.c | 91 + gcc/testsuite/gcc.target/s390/arch13/bitops-2.c | 93 + .../s390/arch13/fp-signedint-convert-1.c | 22 + .../s390/arch13/fp-unsignedint-convert-1.c | 24 + gcc/testsuite/gcc.target/s390/arch13/popcount-1.c | 25 + gcc/testsuite/gcc.target/s390/arch13/sel-1.c | 21 + gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c | 20 +- gcc/testsuite/gcc.target/s390/md/andc-splitter-2.c | 20 +- gcc/testsuite/gcc.target/s390/s390.exp | 3 + .../s390/zvector/bswap-and-replicate-1.c | 28 + .../gcc.target/s390/zvector/get-element-bswap-1.c | 28 + .../gcc.target/s390/zvector/get-element-bswap-2.c | 28 + .../gcc.target/s390/zvector/get-element-bswap-3.c | 28 + .../gcc.target/s390/zvector/get-element-bswap-4.c | 28 + .../gcc.target/s390/zvector/replicate-bswap-1.c | 28 + .../gcc.target/s390/zvector/replicate-bswap-2.c | 28 + .../gcc.target/s390/zvector/set-element-bswap-1.c | 28 + .../gcc.target/s390/zvector/set-element-bswap-2.c | 28 + .../gcc.target/s390/zvector/set-element-bswap-3.c | 31 + .../gcc.target/s390/zvector/vec-double-compile.c | 47 + .../gcc.target/s390/zvector/vec-float-compile.c | 47 + .../s390/zvector/vec-revb-load-double-z14.c | 24 + .../gcc.target/s390/zvector/vec-revb-load-double.c | 27 + .../s390/zvector/vec-revb-store-double-z14.c | 26 + .../s390/zvector/vec-revb-store-double.c | 28 + .../s390/zvector/vec-reve-load-byte-z14.c | 24 + .../gcc.target/s390/zvector/vec-reve-load-byte.c | 30 + .../s390/zvector/vec-reve-load-halfword-z14.c | 24 + .../s390/zvector/vec-reve-load-halfword.c | 27 + .../s390/zvector/vec-reve-store-byte-z14.c | 26 + .../gcc.target/s390/zvector/vec-reve-store-byte.c | 28 + .../s390/zvector/vec-search-string-cc-1.c | 36 + .../s390/zvector/vec-search-string-cc-compile.c | 47 + .../zvector/vec-search-string-until-zero-cc-1.c | 37 + .../vec-search-string-until-zero-cc-compile.c | 47 + .../s390/zvector/vec-shift-left-double-by-bit-1.c | 69 + .../s390/zvector/vec-shift-right-double-by-bit-1.c | 69 + .../gcc.target/s390/zvector/vec-signed-compile.c | 47 + .../gcc.target/s390/zvector/vec-unsigned-compile.c | 47 + gcc/testsuite/gcc.target/visium/bit_shift.c | 2 +- gcc/testsuite/lib/target-supports.exp | 16 + 74 files changed, 11101 insertions(+), 9307 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/pr84206.c create mode 100644 gcc/testsuite/gcc.dg/pr85876.c delete mode 100644 gcc/testsuite/gcc.target/i386/pr70799-4.c delete mode 100644 gcc/testsuite/gcc.target/i386/pr70799-5.c create mode 100644 gcc/testsuite/gcc.target/i386/pr89902.c create mode 100644 gcc/testsuite/gcc.target/i386/pr89903.c create mode 100644 gcc/testsuite/gcc.target/s390/arch13/bitops-1.c create mode 100644 gcc/testsuite/gcc.target/s390/arch13/bitops-2.c create mode 100644 gcc/testsuite/gcc.target/s390/arch13/fp-signedint-convert-1.c create mode 100644 gcc/testsuite/gcc.target/s390/arch13/fp-unsignedint-convert-1.c create mode 100644 gcc/testsuite/gcc.target/s390/arch13/popcount-1.c create mode 100644 gcc/testsuite/gcc.target/s390/arch13/sel-1.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/bswap-and-replicate-1.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/get-element-bswap-1.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/get-element-bswap-2.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/get-element-bswap-3.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/get-element-bswap-4.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/replicate-bswap-1.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/replicate-bswap-2.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/set-element-bswap-1.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/set-element-bswap-2.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/set-element-bswap-3.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-double-compile.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-float-compile.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-revb-load-double-z14.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-revb-load-double.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-revb-store-double-z14.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-revb-store-double.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-reve-load-byte-z14.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-reve-load-byte.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-reve-load-halfword-z14.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-reve-load-halfword.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-reve-store-byte-z14.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-reve-store-byte.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-search-string-cc-1.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-search-string-cc-compile.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-search-string-until-z [...] create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-search-string-until-z [...] create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-shift-left-double-by-bit-1.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-shift-right-double-by [...] create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-signed-compile.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-unsigned-compile.c