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from edc71ed5f57 [X86] Don't match TESTrr from (cmp (and X, Y), 0) during is [...] new 4b7ed4f1030 [llvm-mca] Rename an error variable. new 39d65885534 [GlobalISel][AArch64] Add support for @llvm.ceil
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Summary of changes: include/llvm/Support/TargetOpcodes.def | 3 + include/llvm/Target/GenericOpcodes.td | 7 ++ .../llvm/Target/GlobalISel/SelectionDAGCompat.td | 1 + lib/CodeGen/GlobalISel/IRTranslator.cpp | 5 ++ lib/Target/AArch64/AArch64LegalizerInfo.cpp | 4 + .../AArch64/GlobalISel/arm64-irtranslator.ll | 41 ++++++++++ .../GlobalISel/legalizer-info-validation.mir | 3 + test/CodeGen/AArch64/GlobalISel/select-ceil.mir | 93 ++++++++++++++++++++++ test/CodeGen/AArch64/arm64-vcvt.ll | 6 ++ tools/llvm-mca/llvm-mca.cpp | 4 +- 10 files changed, 165 insertions(+), 2 deletions(-) create mode 100644 test/CodeGen/AArch64/GlobalISel/select-ceil.mir