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from 71985fb8e8b Fix Bitcode/invalid.test new f5ce44c6872 [ARM] Don't reserve R12 on Thumb1 as an emergency spill slot.
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Summary of changes: lib/Target/ARM/ARMBaseRegisterInfo.cpp | 34 +-- lib/Target/ARM/ARMFrameLowering.cpp | 98 ++++++-- lib/Target/ARM/ARMISelDAGToDAG.cpp | 23 +- lib/Target/ARM/ARMISelLowering.cpp | 3 +- lib/Target/ARM/Thumb1FrameLowering.cpp | 105 ++++++-- lib/Target/ARM/ThumbRegisterInfo.cpp | 68 +----- lib/Target/ARM/ThumbRegisterInfo.h | 6 +- test/CodeGen/ARM/ldrex-frame-size.ll | 8 +- test/CodeGen/ARM/scavenging.mir | 66 ----- test/CodeGen/ARM/thumb1-varalloc.ll | 5 +- test/CodeGen/Thumb/emergency-spill-slot.ll | 380 +++++++++++++++++++++++++++++ test/CodeGen/Thumb/frame-access.ll | 31 ++- test/CodeGen/Thumb/large-stack.ll | 10 +- 13 files changed, 626 insertions(+), 211 deletions(-) delete mode 100644 test/CodeGen/ARM/scavenging.mir create mode 100644 test/CodeGen/Thumb/emergency-spill-slot.ll