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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig in repository toolchain/ci/llvm-project.
from 80d7e473e0b AMDGPU: Fix some incorrect FUNC-LABEL checks adds 190707f60e8 [docs][llvm-symbolizer] Fix --functions description adds 6b74745c064 [docs][llvm-symbolizer] Fix indentation of inline option examples adds 974bce3eddc [docs][llvm-objcopy][llvm-strip] Move --wildcard descriptio [...] adds a059be72c4f [AArch64] Flip default for register renaming in the ld/st o [...] adds 1d06e75df2a [ARM][RDA] add getUniqueReachingMIDef adds 9c859fc54d9 [AArch64][SVE] Add SVE2 intrinsics for bit permutation & ta [...] adds 2dcbdba8540 tsan: fix pthread_detach with called_from_lib suppressions adds 546918cbb4b Revert "[compiler-rt] Add a critical section when flushing [...] adds 1b30b494365 [gn build] (manually) merge e058667a2e01 adds 5560a78820e [clangd] Bump index version number. adds 8c2cf499e61 [clang][Tooling] Add a way to tokenize a FileRange adds 6e34a9a838c [OpenMP] Fix the test by generating output file in temporar [...] adds ce75c3d2b62 [gn build] (manually) port 2f6cc21f44e adds 8f8756d465e [Assembler] Allow assembling empty index with non-zero flags adds cfbe889af58 [gn build] re-"gn format" all gn files adds 319ea2dd9e3 [OpenCL] Add atomic type builtins adds fcfd4fb686b [mlir][Linalg] NFC - Refactor LinalgStructuredOps towards " [...] adds 0f1df489253 AMDGPU/SIInsertSkips: Fix the determination of whether earl [...] adds 09a6b26753d AMDGPU: Fix some more incorrect check lines adds 38b4516de8a [libTooling] Add function to determine associated text of a [...] adds 0aec4b418eb Quick fix for bot failure on "AMDGPU/SIInsertSkips: Fix the [...] adds 41a6612ea8a Put microsoft template parameter shadow warning behind sepa [...] adds e7375e99324 [AIX] Remove whitelist checking for ExternalSymbolSDNodes adds 9eb3cc10b2c [ARM,MVE] Add predicated intrinsics for many unary functions. adds d6b05fccb70 Full fix for "AMDGPU/SIInsertSkips: Fix the determination o [...] adds 02323a3d5f9 [clangd] use printQualifiedName to skip the inlinenamespace [...] adds e8c5fea243c [clang-format] Special handling of spaces for C# code adds ced45978a2a Recommit "[DWARFDebugLine] Avoid dumping prologue members w [...] adds bbb0933e3d8 [DAG] visitRotate - modulo non-uniform constant rotation amounts adds 594130db0a5 Add unit tests for RangeDataVector::FindEntryIndexesThatContain adds 894ce940db5 [AArch64] add tests for fake fneg; NFC adds 07eb82fc06c Add _LIBCPP_BUILTIN_CONSTANT_P support. adds 3c36d8dad57 Introduce DWARFDataExtractor::getInitialLength adds 299c3e13fbd [gn build] Port 3c36d8dad57 adds b3d0c798367 [DAGCombiner] avoid narrowing fake fneg vector op adds 2011d14296e [clangd] Clean-up XRefs.cpp from Lexer usages and unnecessa [...] adds 423194098b8 [ELF] --orphan-handling=: don't warn/error for unused synth [...] adds 6503aadcc6c [llvm-objcopy][test] Improve empty section tests adds 465dca79b31 Avoid SmallString.h include in MD5.h, NFC adds 805f5836d1b [libc] Fix build when -DBUILD_SHARED_LIBS=On adds 590dc8d02cd Use virtual functions in ParsedAttrInfo instead of function [...] adds 73c3b52676a [PowerPC][NFC] Convert grep usage to FileCheck in lit test. adds 387c3f74fd8 [compiler-rt] Build all alias in builtin as private externa [...] adds 1e9321e97ab [mlir][spirv] NFC: move folders and canonicalizers in a sep [...] adds 59fb9cde7a4 Devirtualize a call on alloca without waiting for post inli [...] adds 14aef5367d0 [libcxx] Fix _LIBCPP_HAS_THREAD_API_EXTERNAL build adds 4f71252cf84 [TTI] Let getOperationCost assume that Freeze is free adds fd7c2e24c1c [SDAG] Add SDNode::values() = make_range(values_begin(), va [...] adds 7822c8c03e9 [lldb/test] Skip running a test under ASan, it intentionall [...] adds e4af56db27e Fix buildbots after recent GSYM commit. adds 37c7f0d9456 [ELF] --orphan-handling=: don't warn/error for input SHT_RE [...] adds 34312ed24e1 Remove unneeded Compiler.h and DataTypes.h includes, NFC adds d260ea7199b Inline basic_string::erase for fastpath where __n == npos adds 7691790dfd1 [Hexagon] Improve casting of boolean HVX vectors to scalars adds 30dae38349c Fix LLP64 detection in SwapByteOrder.h adds 56f7de5baae [InstCombine] Remove trivially empty ranges from end adds 165f707f9d0 [AVR] Don't adjust addresses by 2 for absolute values adds 6afc3de42f8 [AVR] Fix private label prefix adds 3e440545dc4 [CVP] Add test for cmp of local phi; NFC adds 7da3b5e45c2 [InstCombine] Simplify DCE code; NFC adds 3bf3996cd4e [TSan] Add CMake check for minimal SDK requirements on Darwin adds 9d9633fb700 [CVP] Simplify cmp of local phi node adds 00f54050f7e [SimpleLoopUnswitch] Remove unnecessary include; NFC adds ca50f09db9f [clang] fix error detection in consteval calls adds 5bc6ff6455e [mlir][spirv] Add some folders for spv.LogicalAnd/spv.LogicalOr adds 25c6544f32e [VectorCombine] add a debug flag to skip all transforms adds 85b641c27ae [ms] Rename ParsingInlineAsm functions/variables to reflect [...] adds 22cb36c86b8 [dsymutil] Avoid copying swiftinterfaces from the SDK into [...] adds d2cbaf1755f Fix for the test failues introduced in https://reviews.llvm [...] adds 52073310e44 [libc] Fix typo of namespace in round implementation. adds c753a306fd1 [scudo][standalone] Various improvements wrt RSS adds 63779fb462d [mlir][spirv] Refactoring to avoid calling the same function twice adds f79b81fbe28 [llvm-objcopy] Enable --discard-all for MachO adds eca4bfea3d3 [MC] Pull out a relaxFragment helper [NFC] adds 7848a3c8ab5 Update the ARC docs for non-trivial ownership in structs. adds 949134e2fef [DebugInfo][NFC] Remove handler with ErrorPolicy from DWARF [...] adds 16cabf278fc [ASTMatchers] HasNameMatcher handles `extern "C"` adds 65f99b5383f [AArch64][GlobalISel] Fixup <32b heterogeneous regbanks of [...] adds 34ee941f6d0 [ObjectFileMachO] Fix a build error on embedded. adds 14306ce80c6 [X86] Add proper MachinePointerInfo to the loads/stores cre [...] adds a8186935aea [X86] Use correct MachineMemOperand for stack load in Lower [...] adds 9c1a707ba3f [X86] Use proper alignment for stack temporary and correct [...] adds 77d9b7b2cdb [X86] Query constant pool object alignment instead of hardcoding. adds a5a07b80419 Visit previously unreachable nodes in the debug info metada [...] adds 30f4362040f Disable memory leak checking in a test to work around a bot [...] adds 98ed0c5475d PR44978: Accept as an extension some cases where destructor [...] adds a0ec111c929 [libc++] Temporarily disable availability markup for the C+ [...] adds 12339efd709 Revert "[libc++] Do not set the `availability=XXX` feature [...] adds 15e2831fcd7 [X86] Explicitly pass Pointer, MachinePointerInfo and Align [...] adds 870363a22d3 [X86] Explicitly pass Destination VT and debug location to [...] adds 682e7037552 [libc++] Workaround unused variable warning in test adds 82a21c16554 [X86] Add proper MachinePointerInfo to stack store created [...] adds c965fd942f1 Cost Annotation Writer for InlineCost adds b305b8a256e [ELF][test] Rename SHF_LINK_ORDER related "metadata" to "li [...] adds 21056a4ea02 [X86] Add test cases showing incorrect setting of nofpexcep [...] adds 2a49d650a5d [docs][LoopTerminology] Add Loop Simplify Form description. adds c7e8d8b13e5 GlobalISel: Cleanup code with MachineIRBuilder features adds 6dcf43102c3 AMDGPU/GlobalISel: Add missing G_[US]ADDE/G_[US]SUBE tests adds 6fc0d008231 GlobalISel: Fix lowering for G_UADDE/G_USUBE adds 79493e721a4 AMDGPU/GlobalISel: Add missing test for G_UMULH adds c46b85aaf4d [LoopVectorize] Fix cost for calls to functions that have v [...] adds b9f36860560 Fix buildbot break after c46b85aaf4d4 adds 621388468b5 Some fixes for open breaks on MacOS and UBSan adds cab6ac2612b [libc] Add an optional `NAME` argument to `add_entrypoint_o [...] adds aff8c045a22 [MLIR] Add `take_back()` to STLExtras.h for completeness. adds 2bb7774ddf0 [clangd] Get rid of getBeginningOfIdentifier helper adds 1aab055dd8e [libc] Add CMake script to check host cpu features adds f31fc1043d3 [clangd] Get rid of lexer usage in AST.cpp adds 13db7490fa6 [AArch64] Peephole optimization: merge AND and TST instructions adds 72f044ecdfb [NFC][ARM] Add test case adds 8c26f42fe90 [clang,ARM,MVE] Remove redundant #includes in test file. adds 56b03c35dde [lldb] Skip TestWasm.py on sanitized builds until D75200 ha [...] new e58229fded0 [ARM] Add CPSR as an implicit use of t2IT new 2affdcee615 [lldb][NFC] Fix several -Wdocumentation warnings new ff574ff291e [DebugInfo][NFC] Move out lambdas from collectCallSiteParameters() new 6d857166d21 [DebugInfo] Describe call site values for chains of express [...] new 58d9e8194e4 [DebugInfo][ARM] Fix noreg case when checkig if it is an addImm
The 5 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: clang-tools-extra/clangd/AST.cpp | 11 +- clang-tools-extra/clangd/AST.h | 1 - clang-tools-extra/clangd/Hover.cpp | 54 +- clang-tools-extra/clangd/SourceCode.cpp | 102 ---- clang-tools-extra/clangd/SourceCode.h | 8 - clang-tools-extra/clangd/XRefs.cpp | 123 +++-- clang-tools-extra/clangd/index/Serialization.cpp | 2 +- clang-tools-extra/clangd/refactor/Rename.cpp | 2 +- .../clangd/unittests/CollectMacrosTests.cpp | 6 +- clang-tools-extra/clangd/unittests/RenameTests.cpp | 8 + .../clangd/unittests/SourceCodeTests.cpp | 62 +-- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 18 + clang/docs/AutomaticReferenceCounting.rst | 134 ++++- clang/include/clang/Basic/DiagnosticGroups.td | 3 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 5 +- clang/include/clang/Basic/arm_mve.td | 139 +++-- clang/include/clang/Basic/arm_mve_defs.td | 8 +- clang/include/clang/Tooling/Syntax/Tokens.h | 6 + .../include/clang/Tooling/Transformer/SourceCode.h | 14 +- clang/lib/ASTMatchers/ASTMatchersInternal.cpp | 8 +- clang/lib/Driver/ToolChains/Darwin.cpp | 2 - clang/lib/Format/FormatToken.h | 4 +- clang/lib/Format/TokenAnnotator.cpp | 29 +- clang/lib/Parse/ParseStmtAsm.cpp | 4 +- clang/lib/Sema/OpenCLBuiltins.td | 53 +- clang/lib/Sema/ParsedAttr.cpp | 45 +- clang/lib/Sema/SemaExpr.cpp | 5 +- clang/lib/Sema/SemaExprCXX.cpp | 50 +- clang/lib/Tooling/Syntax/Tokens.cpp | 26 +- clang/lib/Tooling/Transformer/SourceCode.cpp | 306 +++++++++++ clang/test/CodeGen/arm-mve-intrinsics/absneg.c | 608 +++++++++++++++++++++ clang/test/CodeGen/arm-mve-intrinsics/vclz.c | 287 ++++++++++ clang/test/CodeGen/arm-mve-intrinsics/vcvt.c | 240 ++++++++ clang/test/CodeGen/arm-mve-intrinsics/vmovl.c | 256 +++++++++ clang/test/CodeGen/arm-mve-intrinsics/vmovn.c | 184 +++++++ clang/test/CodeGen/arm-mve-intrinsics/vrev.c | 480 ++++++++++++++++ clang/test/CodeGen/arm-mve-intrinsics/vrnd.c | 385 +++++++++++++ .../CodeGenCXX/member-function-pointer-calls.cpp | 9 +- clang/test/Driver/riscv32-toolchain-extra.c | 1 + clang/test/Driver/riscv64-toolchain-extra.c | 1 + clang/test/OpenMP/PR44893.c | 2 +- clang/test/SemaCXX/cxx2a-consteval.cpp | 8 + clang/test/SemaCXX/destructor.cpp | 40 ++ clang/test/SemaCXX/microsoft-template-shadow.cpp | 11 + .../ASTMatchers/ASTMatchersNarrowingTest.cpp | 15 + clang/unittests/Format/FormatTestCSharp.cpp | 32 +- clang/unittests/Tooling/SourceCodeTest.cpp | 263 +++++++++ clang/unittests/Tooling/Syntax/TokensTest.cpp | 24 +- clang/utils/TableGen/ClangAttrEmitter.cpp | 264 ++++----- compiler-rt/lib/builtins/int_lib.h | 7 + compiler-rt/lib/profile/GCDAProfiling.c | 83 +-- compiler-rt/lib/scudo/standalone/combined.h | 10 +- compiler-rt/lib/scudo/standalone/local_cache.h | 7 +- compiler-rt/lib/scudo/standalone/primary32.h | 13 +- compiler-rt/lib/scudo/standalone/primary64.h | 12 +- compiler-rt/lib/scudo/standalone/release.h | 31 +- compiler-rt/lib/scudo/standalone/secondary.h | 1 + compiler-rt/lib/scudo/standalone/size_class_map.h | 30 +- .../lib/scudo/standalone/tests/release_test.cpp | 21 +- .../scudo/standalone/tests/size_class_map_test.cpp | 1 - compiler-rt/lib/tsan/CMakeLists.txt | 8 + .../lib/tsan/rtl/tsan_interceptors_posix.cpp | 14 +- compiler-rt/lib/tsan/rtl/tsan_rtl.h | 2 +- compiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp | 31 +- compiler-rt/test/tsan/ignore_lib6.cpp | 74 +++ compiler-rt/test/tsan/ignore_lib6.cpp.supp | 1 + libc/cmake/modules/LLVMLibCCheckCpuFeatures.cmake | 99 ++++ libc/cmake/modules/LLVMLibCRules.cmake | 10 +- libc/cmake/modules/cpu_features/check_avx.cpp | 8 + libc/cmake/modules/cpu_features/check_avx512f.cpp | 8 + libc/cmake/modules/cpu_features/check_sse.cpp | 8 + libc/cmake/modules/cpu_features/check_sse2.cpp | 8 + libc/src/math/round/round.cpp | 4 +- libc/src/math/round/round.h | 4 +- libc/src/math/round/round_redirector.cpp | 4 +- libc/utils/UnitTest/CMakeLists.txt | 1 + libc/utils/testutils/CMakeLists.txt | 12 +- libcxx/include/__config | 16 +- libcxx/include/__string | 2 +- libcxx/include/__threading_support | 40 +- libcxx/include/semaphore | 2 + libcxx/include/string | 29 +- libcxx/src/barrier.cpp | 14 +- libcxx/test/std/atomics/types.pass.cpp | 2 +- .../test/std/thread/thread.semaphore/max.pass.cpp | 1 - libcxx/utils/libcxx/test/config.py | 2 +- lld/ELF/LinkerScript.cpp | 24 +- lld/ELF/LinkerScript.h | 4 + lld/ELF/Writer.cpp | 8 +- ...-metadata-err.s => gc-sections-linkorder-err.s} | 0 lld/test/ELF/gc-sections-linkorder.s | 32 ++ ...ctions-metadata2.s => gc-sections-linkorder2.s} | 9 +- lld/test/ELF/gc-sections-metadata.s | 38 -- ...card-section-metadata.s => discard-linkorder.s} | 0 lld/test/ELF/linkerscript/emit-reloc.s | 19 + .../{section-metadata.s => linkorder.s} | 0 .../{section-metadata2.s => linkorder2.s} | 0 lld/test/ELF/linkerscript/orphan-report.s | 54 +- lld/test/ELF/linkorder-err.s | 11 + .../{section-metadata-err2.s => linkorder-err2.s} | 4 +- .../{section-metadata-err3.s => linkorder-err3.s} | 2 +- lld/test/ELF/section-metadata-err.s | 15 - lldb/include/lldb/Breakpoint/BreakpointResolver.h | 6 - .../lldb/Host/common/NativeProcessProtocol.h | 12 +- lldb/include/lldb/Target/Thread.h | 4 +- lldb/include/lldb/Utility/Broadcaster.h | 22 +- lldb/include/lldb/Utility/CompletionRequest.h | 8 +- lldb/include/lldb/Utility/Flags.h | 2 +- .../ExpressionParser/Clang/IRDynamicChecks.cpp | 4 +- .../Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp | 8 +- lldb/source/Utility/Timer.cpp | 1 + .../functionalities/gdb_remote_client/TestWasm.py | 3 + .../process_crash_info/TestProcessCrashInfo.py | 2 + lldb/unittests/Utility/RangeMapTest.cpp | 40 ++ llvm/docs/CommandGuide/llvm-objcopy.rst | 8 +- llvm/docs/CommandGuide/llvm-strip.rst | 8 +- llvm/docs/CommandGuide/llvm-symbolizer.rst | 86 +-- llvm/docs/LoopTerminology.rst | 17 +- llvm/docs/Passes.rst | 5 +- .../llvm/Analysis/TargetTransformInfoImpl.h | 5 + llvm/include/llvm/CodeGen/ReachingDefAnalysis.h | 34 +- llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 3 + .../llvm/DWARFLinker/DWARFLinkerCompileUnit.h | 5 + llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h | 14 +- .../llvm/DebugInfo/DWARF/DWARFDataExtractor.h | 17 + llvm/include/llvm/IR/IntrinsicsAArch64.td | 21 + llvm/include/llvm/IR/IntrinsicsARM.td | 33 ++ llvm/include/llvm/MC/MCAssembler.h | 3 + llvm/include/llvm/MC/MCParser/MCAsmParser.h | 4 +- llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h | 8 +- llvm/include/llvm/Support/MD5.h | 2 +- llvm/include/llvm/Support/MathExtras.h | 1 + llvm/include/llvm/Support/SwapByteOrder.h | 22 +- llvm/lib/Analysis/InlineCost.cpp | 78 +++ llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 141 +++-- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 39 +- llvm/lib/CodeGen/ReachingDefAnalysis.cpp | 63 ++- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 27 +- .../lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 14 +- llvm/lib/DWARFLinker/DWARFLinker.cpp | 6 + llvm/lib/DWARFLinker/DWARFLinkerCompileUnit.cpp | 8 + llvm/lib/DebugInfo/DWARF/DWARFContext.cpp | 34 +- llvm/lib/DebugInfo/DWARF/DWARFDataExtractor.cpp | 33 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp | 10 +- llvm/lib/DebugInfo/Symbolize/Symbolize.cpp | 8 +- llvm/lib/IR/Verifier.cpp | 1 + llvm/lib/MC/MCAssembler.cpp | 58 +- llvm/lib/MC/MCParser/AsmParser.cpp | 24 +- llvm/lib/MC/MCParser/MasmParser.cpp | 24 +- llvm/lib/Support/MD5.cpp | 1 + llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 3 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 24 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 3 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 94 ++++ .../Target/AArch64/AArch64LoadStoreOptimizer.cpp | 2 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 10 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 55 +- .../AMDGPU/AMDGPUOpenCLEnqueuedBlockLowering.cpp | 1 + llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 225 ++++---- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 6 +- llvm/lib/Target/ARM/ARMInstrMVE.td | 419 +++++++------- llvm/lib/Target/ARM/ARMInstrThumb2.td | 2 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 10 +- llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp | 14 +- llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp | 1 + llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 35 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 19 +- llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp | 343 ++++++------ llvm/lib/Target/Mips/MipsSEISelLowering.cpp | 5 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 15 +- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp | 50 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 27 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 102 ++-- llvm/lib/Target/X86/X86ISelLowering.h | 6 +- llvm/lib/Transforms/Coroutines/CoroFrame.cpp | 1 + llvm/lib/Transforms/IPO/Inliner.cpp | 15 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 55 +- .../Transforms/InstCombine/InstCombineInternal.h | 3 +- .../InstCombine/InstructionCombining.cpp | 2 - .../Transforms/Instrumentation/GCOVProfiling.cpp | 143 ++--- .../Scalar/CorrelatedValuePropagation.cpp | 5 +- llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp | 1 - llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 5 +- llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 8 + llvm/test/Assembler/summary-flags2.ll | 8 + llvm/test/CMakeLists.txt | 1 + .../AArch64/GlobalISel/preselect-process-phis.mir | 110 ++++ llvm/test/CodeGen/AArch64/arm64-fp.ll | 22 + llvm/test/CodeGen/AArch64/funnel-shift.ll | 6 +- .../CodeGen/AArch64/machine-outliner-remarks.ll | 6 +- llvm/test/CodeGen/AArch64/peephole-and-tst.ll | 81 +++ llvm/test/CodeGen/AArch64/shift-by-signext.ll | 6 +- .../test/CodeGen/AArch64/stp-opt-with-renaming.mir | 2 +- .../AArch64/sve2-intrinsics-bit-permutation.ll | 124 +++++ .../CodeGen/AArch64/sve2-intrinsics-perm-tb.ll | 181 ++++++ .../CodeGen/AMDGPU/GlobalISel/legalize-sadde.mir | 62 +++ .../CodeGen/AMDGPU/GlobalISel/legalize-ssube.mir | 62 +++ .../CodeGen/AMDGPU/GlobalISel/legalize-uadde.mir | 146 +++++ .../CodeGen/AMDGPU/GlobalISel/legalize-umulh.mir | 40 ++ .../CodeGen/AMDGPU/GlobalISel/legalize-usube.mir | 163 ++++++ llvm/test/CodeGen/AMDGPU/bitcast-v4f16-v4i16.ll | 4 +- .../CodeGen/AMDGPU/constant-fold-imm-immreg.mir | 2 +- llvm/test/CodeGen/AMDGPU/flat-load-clustering.mir | 2 +- llvm/test/CodeGen/AMDGPU/gfx10-vop-literal.ll | 4 +- llvm/test/CodeGen/AMDGPU/global-saddr.ll | 2 +- llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll | 2 +- llvm/test/CodeGen/AMDGPU/kernel-args.ll | 2 +- llvm/test/CodeGen/AMDGPU/lds-bounds.ll | 4 +- llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll | 2 +- llvm/test/CodeGen/AMDGPU/skip-if-dead.ll | 66 ++- llvm/test/CodeGen/AMDGPU/v_cndmask.ll | 2 +- llvm/test/CodeGen/AMDGPU/waitcnt-preexisting.mir | 4 +- llvm/test/CodeGen/AMDGPU/wave32.ll | 4 +- .../test/CodeGen/ARM/constant-islands-split-IT.mir | 6 +- llvm/test/CodeGen/ARM/tail-dup-bundle.mir | 2 +- llvm/test/CodeGen/AVR/branch-relaxation-long.ll | 8 +- llvm/test/CodeGen/AVR/branch-relaxation.ll | 10 +- llvm/test/CodeGen/AVR/ctlz.ll | 4 +- llvm/test/CodeGen/AVR/cttz.ll | 2 +- llvm/test/CodeGen/AVR/integration/blink.ll | 4 +- llvm/test/CodeGen/AVR/rot.ll | 16 +- llvm/test/CodeGen/AVR/smul-with-overflow.ll | 2 +- llvm/test/CodeGen/AVR/umul-with-overflow.ll | 2 +- .../Hexagon/autohvx/isel-hvx-pred-bitcast.ll | 17 +- .../Hexagon/autohvx/isel-store-bitcast-v128i1.ll | 15 + llvm/test/CodeGen/Hexagon/hvx-bitcast-v64i1.ll | 76 ++- llvm/test/CodeGen/Hexagon/store-vector-pred.ll | 76 +-- llvm/test/CodeGen/MIR/ARM/bundled-instructions.mir | 9 +- .../MIR/ARM/nested-instruction-bundle-error.mir | 2 +- .../PowerPC/aix-external-sym-sdnode-lowering.ll | 110 ---- llvm/test/CodeGen/PowerPC/vec_vrsave.ll | 17 +- .../CodeGen/Thumb2/LowOverheadLoops/cmplx_cong.mir | 104 ++++ .../Thumb2/LowOverheadLoops/dont-ignore-vctp.mir | 5 +- .../LowOverheadLoops/dont-remove-loop-update.mir | 4 +- .../LowOverheadLoops/dont-remove-loop-update2.mir | 22 +- .../Thumb2/LowOverheadLoops/extract-element.mir | 4 +- .../Thumb2/LowOverheadLoops/incorrect-sub-16.mir | 4 +- .../Thumb2/LowOverheadLoops/incorrect-sub-32.mir | 4 +- .../Thumb2/LowOverheadLoops/incorrect-sub-8.mir | 4 +- .../Thumb2/LowOverheadLoops/it-block-chain.mir | 4 +- .../Thumb2/LowOverheadLoops/it-block-itercount.mir | 2 +- .../Thumb2/LowOverheadLoops/it-block-mov.mir | 8 +- .../Thumb2/LowOverheadLoops/it-block-random.mir | 4 +- .../CodeGen/Thumb2/LowOverheadLoops/massive.mir | 2 +- .../CodeGen/Thumb2/LowOverheadLoops/matrix.mir | 8 +- .../Thumb2/LowOverheadLoops/mov-lr-terminator.mir | 4 +- .../LowOverheadLoops/move-def-before-start.mir | 4 +- .../LowOverheadLoops/move-start-after-def.mir | 4 +- .../Thumb2/LowOverheadLoops/multiblock-massive.mir | 2 +- .../Thumb2/LowOverheadLoops/no-dec-cbnz.mir | 6 +- .../Thumb2/LowOverheadLoops/no-dec-reorder.mir | 10 +- .../CodeGen/Thumb2/LowOverheadLoops/no-dec.mir | 2 +- .../Thumb2/LowOverheadLoops/no-vpsel-liveout.mir | 4 +- .../Thumb2/LowOverheadLoops/non-masked-load.mir | 4 +- .../Thumb2/LowOverheadLoops/non-masked-store.mir | 4 +- .../Thumb2/LowOverheadLoops/remove-elem-moves.mir | 8 +- .../Thumb2/LowOverheadLoops/revert-non-header.mir | 4 +- .../CodeGen/Thumb2/LowOverheadLoops/size-limit.mir | 4 +- .../CodeGen/Thumb2/LowOverheadLoops/switch.mir | 2 +- .../LowOverheadLoops/unrolled-and-vector.mir | 4 +- .../LowOverheadLoops/unsafe-cpsr-loop-def.mir | 4 +- .../LowOverheadLoops/unsafe-cpsr-loop-use.mir | 4 +- .../LowOverheadLoops/vctp-add-operand-liveout.mir | 4 +- .../CodeGen/Thumb2/LowOverheadLoops/vctp-subi3.mir | 4 +- .../CodeGen/Thumb2/LowOverheadLoops/vctp-subri.mir | 4 +- .../Thumb2/LowOverheadLoops/vctp-subri12.mir | 4 +- .../Thumb2/LowOverheadLoops/vctp16-reduce.mir | 4 +- .../LowOverheadLoops/wrong-liveout-lsr-shift.mir | 4 +- .../LowOverheadLoops/wrong-vctp-opcode-liveout.mir | 4 +- .../wrong-vctp-operand-liveout.mir | 4 +- llvm/test/CodeGen/Thumb2/constant-islands-cbz.mir | 4 +- .../Thumb2/mve-intrinsics/absneg-predicated.ll | 335 ++++++++++++ .../Thumb2/mve-intrinsics/vclzcls-predicated.ll | 138 +++++ .../CodeGen/Thumb2/mve-intrinsics/vcvt-fp-int.ll | 122 +++++ llvm/test/CodeGen/Thumb2/mve-intrinsics/vmovl.ll | 197 +++++++ llvm/test/CodeGen/Thumb2/mve-intrinsics/vmovn.ll | 196 +++++++ llvm/test/CodeGen/Thumb2/mve-intrinsics/vrev.ll | 138 +++++ .../Thumb2/mve-intrinsics/vrint-predicated.ll | 185 +++++++ llvm/test/CodeGen/Thumb2/t2-teq-reduce.mir | 6 +- llvm/test/CodeGen/X86/fp-intrinsics-flags.ll | 39 ++ llvm/test/CodeGen/X86/vector-fshl-rot-256.ll | 4 +- llvm/test/CodeGen/X86/vector-fshr-rot-256.ll | 4 +- llvm/test/CodeGen/X86/vector-rotate-256.ll | 4 +- .../MIR/AArch64/dbgcall-site-expr-chain.mir | 116 ++++ .../MIR/AArch64/dbgcall-site-expr-entry-value.mir | 92 ++++ .../MIR/ARM/dbgcallsite-noreg-is-imm-check.mir | 75 +++ llvm/test/ExecutionEngine/OrcLazy/objc-minimal.ll | 2 +- llvm/test/MC/AVR/relocations-abs.s | 8 + .../Transforms/CorrelatedValuePropagation/icmp.ll | 33 ++ .../Transforms/Inline/debuginline-cost-delta.ll | 38 ++ llvm/test/Transforms/Inline/devirtualize-4.ll | 214 ++++++++ llvm/test/Transforms/InstCombine/lifetime.ll | 2 +- llvm/test/Transforms/InstCombine/vararg.ll | 2 +- .../LoopVectorize/PowerPC/widened-massv-call.ll | 59 ++ .../PowerPC/widened-massv-vfabi-attr.ll | 60 ++ llvm/test/Verifier/llvm.loop.cu.ll | 26 + llvm/test/tools/dsymutil/Inputs/swift-interface.ll | 34 -- llvm/test/tools/dsymutil/Inputs/swift-interface.s | 216 ++++++++ llvm/test/tools/dsymutil/X86/swift-interface.test | 7 +- .../llvm-dwarfdump/X86/debug_line_invalid.test | 38 +- .../test/tools/llvm-objcopy/ELF/empty-section.test | 135 +++-- .../tools/llvm-objcopy/ELF/strip-non-alloc.test | 50 +- .../test/tools/llvm-objcopy/MachO/discard-all.test | 132 +++++ llvm/tools/llvm-as/llvm-as.cpp | 8 +- llvm/tools/llvm-diff/DifferenceEngine.cpp | 1 + llvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp | 10 +- llvm/unittests/DebugInfo/DWARF/CMakeLists.txt | 1 + .../DebugInfo/DWARF/DWARFDataExtractorTest.cpp | 95 ++++ .../DebugInfo/DWARF/DWARFDebugInfoTest.cpp | 16 +- llvm/utils/gn/secondary/clang/test/BUILD.gn | 1 + .../lib/scudo/standalone/tests/BUILD.gn | 4 +- .../gn/secondary/llvm/lib/BinaryFormat/BUILD.gn | 4 +- .../gn/secondary/llvm/lib/DebugInfo/GSYM/BUILD.gn | 1 + .../gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn | 4 +- llvm/utils/gn/secondary/llvm/test/BUILD.gn | 1 + .../gn/secondary/llvm/tools/llvm-gsym/BUILD.gn | 16 + .../gn/secondary/llvm/tools/llvm-objcopy/BUILD.gn | 4 +- .../llvm/unittests/DebugInfo/DWARF/BUILD.gn | 1 + mlir/include/mlir/Dialect/Linalg/IR/CMakeLists.txt | 6 +- mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.h | 39 +- .../mlir/Dialect/Linalg/IR/LinalgStructuredOps.td | 335 ++++-------- .../Linalg/IR/LinalgStructuredOpsInterface.td | 196 +++++++ mlir/include/mlir/Dialect/Linalg/IR/LinalgTraits.h | 5 +- mlir/include/mlir/Dialect/SPIRV/SPIRVLogicalOps.td | 4 + mlir/include/mlir/Support/STLExtras.h | 6 + mlir/lib/Dialect/Linalg/IR/CMakeLists.txt | 1 + mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 170 +----- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 20 +- .../Dialect/Linalg/Transforms/LinalgToLoops.cpp | 12 +- mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp | 10 +- mlir/lib/Dialect/SPIRV/CMakeLists.txt | 1 + mlir/lib/Dialect/SPIRV/SPIRVCanonicalization.cpp | 426 +++++++++++++++ mlir/lib/Dialect/SPIRV/SPIRVOps.cpp | 326 ----------- mlir/test/Dialect/SPIRV/canonicalize.mlir | 60 ++ 334 files changed, 10947 insertions(+), 3205 deletions(-) create mode 100644 clang/test/SemaCXX/microsoft-template-shadow.cpp create mode 100644 compiler-rt/test/tsan/ignore_lib6.cpp create mode 100644 compiler-rt/test/tsan/ignore_lib6.cpp.supp create mode 100644 libc/cmake/modules/LLVMLibCCheckCpuFeatures.cmake create mode 100644 libc/cmake/modules/cpu_features/check_avx.cpp create mode 100644 libc/cmake/modules/cpu_features/check_avx512f.cpp create mode 100644 libc/cmake/modules/cpu_features/check_sse.cpp create mode 100644 libc/cmake/modules/cpu_features/check_sse2.cpp rename lld/test/ELF/{gc-sections-metadata-err.s => gc-sections-linkorder-err.s} (100%) create mode 100644 lld/test/ELF/gc-sections-linkorder.s rename lld/test/ELF/{gc-sections-metadata2.s => gc-sections-linkorder2.s} (60%) delete mode 100644 lld/test/ELF/gc-sections-metadata.s rename lld/test/ELF/linkerscript/{discard-section-metadata.s => discard-linkorder. [...] rename lld/test/ELF/linkerscript/{section-metadata.s => linkorder.s} (100%) rename lld/test/ELF/linkerscript/{section-metadata2.s => linkorder2.s} (100%) create mode 100644 lld/test/ELF/linkorder-err.s rename lld/test/ELF/{section-metadata-err2.s => linkorder-err2.s} (55%) rename lld/test/ELF/{section-metadata-err3.s => linkorder-err3.s} (85%) delete mode 100644 lld/test/ELF/section-metadata-err.s create mode 100644 llvm/test/Assembler/summary-flags2.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/preselect-process-phis.mir create mode 100644 llvm/test/CodeGen/AArch64/peephole-and-tst.ll create mode 100644 llvm/test/CodeGen/AArch64/sve2-intrinsics-bit-permutation.ll create mode 100644 llvm/test/CodeGen/AArch64/sve2-intrinsics-perm-tb.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sadde.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssube.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uadde.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usube.mir create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/isel-store-bitcast-v128i1.ll create mode 100644 llvm/test/CodeGen/Thumb2/LowOverheadLoops/cmplx_cong.mir create mode 100644 llvm/test/CodeGen/Thumb2/mve-intrinsics/absneg-predicated.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-intrinsics/vclzcls-predicated.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-intrinsics/vcvt-fp-int.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-intrinsics/vrev.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-intrinsics/vrint-predicated.ll create mode 100644 llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-expr-chain.mir create mode 100644 llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-expr-entry-value.mir create mode 100644 llvm/test/DebugInfo/MIR/ARM/dbgcallsite-noreg-is-imm-check.mir create mode 100644 llvm/test/MC/AVR/relocations-abs.s create mode 100644 llvm/test/Transforms/Inline/debuginline-cost-delta.ll create mode 100644 llvm/test/Transforms/Inline/devirtualize-4.ll create mode 100644 llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll create mode 100644 llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll create mode 100644 llvm/test/Verifier/llvm.loop.cu.ll delete mode 100644 llvm/test/tools/dsymutil/Inputs/swift-interface.ll create mode 100644 llvm/test/tools/dsymutil/Inputs/swift-interface.s create mode 100644 llvm/test/tools/llvm-objcopy/MachO/discard-all.test create mode 100644 llvm/unittests/DebugInfo/DWARF/DWARFDataExtractorTest.cpp create mode 100644 llvm/utils/gn/secondary/llvm/tools/llvm-gsym/BUILD.gn create mode 100644 mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td create mode 100644 mlir/lib/Dialect/SPIRV/SPIRVCanonicalization.cpp