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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/llvm-project.
from c96428d2184 Drop spurious self-include [NFC] adds 01f91c3526e [compiler-rt] Sync NetBSD syscall hooks with 9.99.17 adds 983c4dd8edb [compiler-rt] Harmonize __sanitizer_addrinfo with the NetBS [...] adds c4305337716 [BPF] fix a bug in __builtin_preserve_field_info() with FIE [...] adds e2549a0a251 [DebugInfo] Fix for DW_OP_LLVM_fragment in DIExpression::is [...] adds 91661573fde [X86] Convert PICStyles::Style to scoped enum class. NFCI. adds 8f29e4407cc [X86][SSE] combineX86ShufflesRecursively - don't bother mer [...] adds ce7d5a6bbee gn build: (manually) merge 3a399c09 / add76dd3c adds 910718bd038 [opaque pointer types] Add element type argument to IRBuild [...] adds a18a8db0d49 [SelectionDAG] Fixed null check after dereferencing warning. NFCI. adds f39d95ea04b [BitcodeReader] Fixed null pointer dereferencing warning. NFCI. adds 46f372a4aa5 [BitcodeReader] Fixed null check after dereferencing warnin [...] adds 505a44ae9cf [BitcodeReader] Fixed use after move warnings. NFCI. adds 60cb193a40f [LoopUnrollAndJam] Fixed null check after dereferencing war [...] adds 914128ab12f [LoopUnrollRuntime] Fixed null check after dereferencing wa [...] adds 8262a5b7016 [CHR] Fixed null check after dereferencing warning. NFCI. adds 8308187fd9b [InstructionCombining] Fixed null check after dereferencing [...] adds b8685cf3042 [InstructionCompares] Fixed null check after dereferencing [...] adds d825ed24d2f Revert "[InstructionCompares] Fixed null check after derefe [...] adds 717965ae578 [MemorySSA] Fixed null check after dereferencing warning. NFCI. adds decd8c4844a [SCEV] Fixed 'Uninitialized variable 'ContainsAddRec' used. [...] adds 5b37c018d5c Revert "[InstructionCombining] Fixed null check after deref [...] adds 058b5028def Reland '[InstructionCombining] Fixed null check after deref [...] adds c3d6f0ddeee [SILoadStoreOptimizer] Fixed typo. NFCI. adds 3fbd1c00b0f [SIMachineScheduler] Fixed ''then' statement is equivalent [...] adds 3f087e38a2e [X86][SSE] combineX86ShufflesRecursively - at Depth==0, onl [...] adds 5257a954267 [mips] Add disassembler tests for `sigrie` instruction. NFC adds cf954e54f75 [mips] Add disassembler tests for `octeon` CPU. NFC adds 52efd673692 [mips] Move test case for Octeon instructions to cnmips sub [...] adds e345bc6e65a [compiler-rt] [msan] Support POSIX iconv(3) on NetBSD 9.99.17+ adds 858b15cb9cf [compiler-rt] [msan] Correct the __libc_thr_keycreate prototype adds 31e14f41a21 clang/Modules: Sink CompilerInstance::KnownModules into ModuleMap adds 8d7ccb37440 Set the floating point status register as reserved adds 80bf88d8bc8 [lldb] Add trailing dots to comments in Value.cpp adds ae10661a812 [lldb] Provide a getter for m_materializer_up in LLVMUserEx [...] adds df12a75a196 [lldb] Also disable de-registration of EHFrames in IRExecutionUnit adds 848007cfbc7 [lldb][NFC] Make test/python_api/module_section test smaller adds 2be17087f8c [LV] Apply sink-after & interleave-groups as VPlan transfor [...] adds 580310ff0c5 [SystemZ] Improve handling of huge PC relative immediate offsets. adds 25b486ac4f3 [lldb][NFC] Remove unused ExpressionParser::Parse adds bc728d58424 [lldb][NFC] Remove Ocaml from TypeSystem::LLVMCastKind adds 91167e22eca [hwasan] Remove lazy thread-initialisation adds 51b4b17eb7e [RISCV] Implement the TargetLowering::getRegisterByName hook adds 3169f0129a6 [FIX] Removed duplicated v4f16 and v8f16 declarations adds 31ed36d0447 [X86] SimplifyDemandedVectorElts - attempt to recombine tar [...] adds ef85f47595a [llvm-readobj] Change errors to warnings for symbol section [...] adds 499c90afe90 [InstSimplify] add more tests for fcmp+select; NFC adds 22f9429149a [SystemZ] Add GHC calling convention adds 82888b78d47 [OpenCL] Fix address space for const method call from nonco [...] new ad87f244b42 [InstSimplify] add more tests for fcmp+select; NFC new 659bd73d136 [InstSimplify] use FMF to improve fcmp+select fold new 6bae5d16a28 [ARM] Add vrev32 NEON fp16 patterns new 1c616a9266b [ARM] More MVE shuffle tests for sequences that can be conv [...]
The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: clang/include/clang/Driver/Options.td | 8 +- clang/include/clang/Frontend/CompilerInstance.h | 4 - clang/include/clang/Lex/ModuleMap.h | 17 +- clang/lib/CodeGen/CGBuilder.h | 2 +- clang/lib/CodeGen/CGExpr.cpp | 3 +- clang/lib/Frontend/CompilerInstance.cpp | 34 +- clang/lib/Sema/SemaOverload.cpp | 5 +- clang/test/CodeGenOpenCLCXX/addrspace-of-this.cl | 11 + .../include/sanitizer/netbsd_syscall_hooks.h | 165 +++-- compiler-rt/lib/hwasan/hwasan_interceptors.cpp | 28 +- compiler-rt/lib/hwasan/hwasan_linux.cpp | 7 +- compiler-rt/lib/msan/msan_interceptors.cpp | 5 +- .../sanitizer_platform_limits_netbsd.h | 6 + .../sanitizer_common/sanitizer_syscalls_netbsd.inc | 56 +- compiler-rt/test/msan/iconv.cpp | 11 +- compiler-rt/utils/generate_netbsd_syscalls.awk | 50 +- lldb/include/lldb/Expression/Expression.h | 4 + lldb/include/lldb/Expression/ExpressionParser.h | 11 - lldb/include/lldb/Expression/IRExecutionUnit.h | 2 + lldb/include/lldb/Expression/LLVMUserExpression.h | 2 + lldb/include/lldb/Symbol/TypeSystem.h | 1 - .../test/python_api/module_section/main.cpp | 134 +---- lldb/source/Core/Value.cpp | 4 +- .../ExpressionParser/Clang/ClangExpressionParser.h | 2 +- .../ExpressionParser/Clang/ClangFunctionCaller.cpp | 8 +- .../ExpressionParser/Clang/ClangUserExpression.cpp | 4 +- llvm/include/llvm/IR/IRBuilder.h | 14 +- llvm/include/llvm/IR/Instructions.h | 5 - llvm/lib/Analysis/InstructionSimplify.cpp | 17 +- llvm/lib/Analysis/MemorySSA.cpp | 1 + llvm/lib/Analysis/ScalarEvolution.cpp | 2 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 13 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 2 +- llvm/lib/IR/DebugInfoMetadata.cpp | 25 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 2 +- llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp | 7 +- llvm/lib/Target/ARM/ARMCallingConv.td | 20 +- llvm/lib/Target/ARM/ARMInstrNEON.td | 16 +- llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp | 2 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 19 + llvm/lib/Target/RISCV/RISCVISelLowering.h | 7 + .../Target/SystemZ/AsmParser/SystemZAsmParser.cpp | 22 +- llvm/lib/Target/SystemZ/SystemZCallingConv.h | 7 + llvm/lib/Target/SystemZ/SystemZCallingConv.td | 27 + llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp | 21 + llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 49 +- llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp | 4 + llvm/lib/Target/X86/X86ISelLowering.cpp | 249 +++++--- llvm/lib/Target/X86/X86RegisterInfo.cpp | 3 + llvm/lib/Target/X86/X86Subtarget.cpp | 14 +- llvm/lib/Target/X86/X86Subtarget.h | 8 +- .../InstCombine/InstructionCombining.cpp | 7 +- .../Instrumentation/ControlHeightReduction.cpp | 2 +- .../Instrumentation/HWAddressSanitizer.cpp | 29 +- llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp | 4 +- llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp | 4 +- .../Vectorize/LoopVectorizationPlanner.h | 9 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 203 +++---- llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h | 44 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 23 +- llvm/lib/Transforms/Vectorize/VPlan.h | 16 + llvm/test/CodeGen/ARM/vrev.ll | 243 ++++++-- .../BPF/CORE/intrinsic-fieldinfo-byte-size-4.ll | 86 +++ llvm/test/CodeGen/RISCV/get-register-invalid.ll | 12 + llvm/test/CodeGen/RISCV/get-register-noreserve.ll | 38 ++ llvm/test/CodeGen/RISCV/get-register-reserve.ll | 34 ++ llvm/test/CodeGen/SystemZ/ghc-cc-01.ll | 103 ++++ llvm/test/CodeGen/SystemZ/ghc-cc-02.ll | 14 + llvm/test/CodeGen/SystemZ/ghc-cc-03.ll | 11 + llvm/test/CodeGen/SystemZ/ghc-cc-04.ll | 16 + llvm/test/CodeGen/SystemZ/ghc-cc-05.ll | 16 + llvm/test/CodeGen/SystemZ/ghc-cc-06.ll | 12 + llvm/test/CodeGen/SystemZ/ghc-cc-07.ll | 12 + llvm/test/CodeGen/SystemZ/la-05.ll | 31 + llvm/test/CodeGen/Thumb2/mve-shufflemov.ll | 664 +++++++++++++++++++++ .../CodeGen/X86/avx512-intrinsics-fast-isel.ll | 16 +- llvm/test/CodeGen/X86/dbg-value-func-arg.ll | 86 +++ llvm/test/CodeGen/X86/pr34080-2.ll | 2 +- llvm/test/CodeGen/X86/shrink_vmul.ll | 202 ++++--- llvm/test/CodeGen/X86/vec_smulo.ll | 152 ++--- llvm/test/CodeGen/X86/vec_umulo.ll | 140 +++-- llvm/test/CodeGen/X86/vector-shuffle-combining.ll | 62 ++ .../HWAddressSanitizer/lazy-thread-init.ll | 39 -- .../Mips/mips32r6/valid-mips32r6-el.txt | 1 + .../Disassembler/Mips/mips32r6/valid-mips32r6.txt | 1 + .../Mips/mips64r6/valid-mips64r6-el.txt | 1 + .../Disassembler/Mips/mips64r6/valid-mips64r6.txt | 1 + llvm/test/MC/Disassembler/Mips/octeon/valid-el.txt | 31 + llvm/test/MC/Disassembler/Mips/octeon/valid.txt | 31 + .../Mips/{octeon-instructions.s => cnmips/valid.s} | 0 llvm/test/MC/SystemZ/insn-bad.s | 6 + llvm/test/Object/invalid.test | 7 +- llvm/test/Transforms/InstSimplify/fcmp-select.ll | 168 ++++++ .../tools/llvm-readobj/elf-section-symbols.test | 85 +++ llvm/test/tools/llvm-readobj/elf-symbol-shndx.test | 113 +++- llvm/test/tools/yaml2obj/dynamic-symbols.yaml | 7 +- llvm/test/tools/yaml2obj/elf-sht-symtab-shndx.yaml | 8 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 68 ++- llvm/unittests/Transforms/Vectorize/VPlanTest.cpp | 1 + .../secondary/llvm/unittests/Target/X86/BUILD.gn | 2 - 100 files changed, 3029 insertions(+), 974 deletions(-) create mode 100644 llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-4.ll create mode 100644 llvm/test/CodeGen/RISCV/get-register-invalid.ll create mode 100644 llvm/test/CodeGen/RISCV/get-register-noreserve.ll create mode 100644 llvm/test/CodeGen/RISCV/get-register-reserve.ll create mode 100644 llvm/test/CodeGen/SystemZ/ghc-cc-01.ll create mode 100644 llvm/test/CodeGen/SystemZ/ghc-cc-02.ll create mode 100644 llvm/test/CodeGen/SystemZ/ghc-cc-03.ll create mode 100644 llvm/test/CodeGen/SystemZ/ghc-cc-04.ll create mode 100644 llvm/test/CodeGen/SystemZ/ghc-cc-05.ll create mode 100644 llvm/test/CodeGen/SystemZ/ghc-cc-06.ll create mode 100644 llvm/test/CodeGen/SystemZ/ghc-cc-07.ll create mode 100644 llvm/test/CodeGen/SystemZ/la-05.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-shufflemov.ll create mode 100644 llvm/test/CodeGen/X86/dbg-value-func-arg.ll delete mode 100644 llvm/test/Instrumentation/HWAddressSanitizer/lazy-thread-init.ll create mode 100644 llvm/test/MC/Disassembler/Mips/octeon/valid-el.txt create mode 100644 llvm/test/MC/Disassembler/Mips/octeon/valid.txt rename llvm/test/MC/Mips/{octeon-instructions.s => cnmips/valid.s} (100%) create mode 100644 llvm/test/tools/llvm-readobj/elf-section-symbols.test