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unknown user pushed a change to branch devel/c++-coroutines in repository gcc.
from b495a1a8327 Merge master r10-6357. adds 56b92750f83 combine: Punt on out of range rotate counts [PR93505] adds 5fb07870fa4 cgraph: Avoid creating multiple *.localalias aliases with t [...] adds f9eb0973edb Mark switch expression as used to avoid bogus warning adds e978955dd72 analyzer: fix ICE in __builtin_isnan (PR 93356) adds e34ad101a43 analyzer: convert conditionals-2.c to a torture test adds 3e990d79540 analyzer: avoid using <string.h> in malloc-1.c adds bba54d62af5 Daily bump. adds ebe9174e940 analyzer: make extrinsic_state field private adds 42f36563ef6 analyzer: add extrinsic_state::dump adds 95607c12363 Zero-initialise masked load destinations adds 45eb3e4944b analyzer: further fixes for comparisons between uncomparabl [...] adds 182ce042e73 calls.c: refactor special_function_p for use by analyzer (v2) adds c63ae7f0b8b Fix fast-math-pr55281.c ICE adds e60b1e23626 middle-end: Fix logical shift truncation (PR rtl-optimizati [...] adds 6a97d9eae45 [Fortran] Disable front-end optimization for OpenACC atomic [...] adds 5a28e2727f7 [amdgcn] Scale number of threads/workers with VGPR usage adds 828573a5735 Fix TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling. adds b92709388b9 Fix conditional add LRA failure for amdgcn adds 6e5a196399d libstdc++: Always return a sentinel<I> from __gnu_test::tes [...] adds 2171a9207f5 aarch64: Fix SVE PCS failures for BE & ILP32 adds 3669677425f aarch64: Add Armv8.6 SVE matrix multiply support adds 02fcd8ac408 aarch64: Add svbfloat16_t support to arm_sve.h adds 896dff99e18 aarch64: Add Armv8.6 SVE bfloat16 support adds 5910b14503d testsuite: Fix up pr91838.C test [PR91838] adds 455f58ec504 analyzer: fix ICE with pointers between stack frames (PR 93438) adds f1c807e887d analyzer: fix ICE getting void return value (PR 93379) adds 2a07345c4f8 Fix for PR 91333 - suboptimal register allocation for i [...] new 46b6da933ac Merge master r10-6384.
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Summary of changes: gcc/ChangeLog | 246 +++++++++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 64 +++ gcc/analyzer/analyzer.cc | 10 +- gcc/analyzer/constraint-manager.cc | 4 +- gcc/analyzer/diagnostic-manager.cc | 6 +- gcc/analyzer/function-set.cc | 2 + gcc/analyzer/program-state.cc | 42 +- gcc/analyzer/program-state.h | 5 + gcc/analyzer/region-model.cc | 147 ++++++- gcc/analyzer/sm.cc | 12 + gcc/analyzer/sm.h | 2 + gcc/c/ChangeLog | 6 + gcc/c/c-parser.c | 2 +- gcc/calls.c | 14 +- gcc/combine.c | 3 +- gcc/config/aarch64/aarch64-c.c | 7 +- gcc/config/aarch64/aarch64-modes.def | 13 +- gcc/config/aarch64/aarch64-option-extensions.def | 40 +- gcc/config/aarch64/aarch64-sve-builtins-base.cc | 90 +++- gcc/config/aarch64/aarch64-sve-builtins-base.def | 75 +++- gcc/config/aarch64/aarch64-sve-builtins-base.h | 20 + gcc/config/aarch64/aarch64-sve-builtins-shapes.cc | 285 ++++++++++++- gcc/config/aarch64/aarch64-sve-builtins-shapes.h | 10 + gcc/config/aarch64/aarch64-sve-builtins-sve2.cc | 1 - gcc/config/aarch64/aarch64-sve-builtins-sve2.def | 6 +- gcc/config/aarch64/aarch64-sve-builtins-sve2.h | 1 - gcc/config/aarch64/aarch64-sve-builtins.cc | 49 ++- gcc/config/aarch64/aarch64-sve-builtins.def | 2 + gcc/config/aarch64/aarch64-sve-builtins.h | 1 + gcc/config/aarch64/aarch64-sve.md | 214 +++++++++- gcc/config/aarch64/aarch64-sve2.md | 14 +- gcc/config/aarch64/aarch64.c | 8 +- gcc/config/aarch64/aarch64.h | 15 +- gcc/config/aarch64/arm_sve.h | 1 + gcc/config/aarch64/iterators.md | 116 ++++- gcc/config/gcn/gcn-valu.md | 67 ++- gcc/config/gcn/gcn.c | 14 +- gcc/config/gcn/mkoffload.c | 67 ++- gcc/config/i386/i386.md | 65 ++- gcc/config/i386/mmx.md | 6 +- gcc/config/i386/sse.md | 88 ++-- gcc/config/i386/x86-tune.def | 8 +- gcc/doc/analyzer.texi | 2 + gcc/doc/invoke.texi | 4 + gcc/fortran/ChangeLog | 16 +- gcc/fortran/frontend-passes.c | 1 + gcc/ira-color.c | 10 +- gcc/simplify-rtx.c | 18 +- gcc/symtab.c | 14 +- gcc/testsuite/ChangeLog | 468 +++++++++++++++++++++ gcc/testsuite/g++.dg/opt/pr91838.C | 11 + .../aarch64/sve/acle/general-c++/mangle_1.C | 2 + .../aarch64/sve/acle/general-c++/mangle_2.C | 2 + gcc/testsuite/gcc.c-torture/compile/pr93505.c | 15 + .../gcc.dg/analyzer/conditionals-notrans.c | 6 + gcc/testsuite/gcc.dg/analyzer/conditionals-trans.c | 9 +- gcc/testsuite/gcc.dg/analyzer/data-model-1.c | 9 +- gcc/testsuite/gcc.dg/analyzer/malloc-1.c | 17 +- .../gcc.dg/analyzer/{ => torture}/conditionals-2.c | 6 +- gcc/testsuite/gcc.dg/analyzer/torture/pr93356.c | 6 + gcc/testsuite/gcc.dg/analyzer/torture/pr93379-2.c | 11 + gcc/testsuite/gcc.dg/analyzer/torture/pr93379.c | 2 + gcc/testsuite/gcc.dg/analyzer/torture/pr93438-2.c | 26 ++ gcc/testsuite/gcc.dg/analyzer/torture/pr93438.c | 13 + gcc/testsuite/gcc.dg/lto/pr93384_0.c | 12 + gcc/testsuite/gcc.dg/lto/pr93384_1.c | 2 + gcc/testsuite/gcc.dg/pr88660.c | 13 + .../gcc.target/aarch64/pragma_cpp_predefs_2.c | 109 ++++- .../gcc.target/aarch64/sve/acle/asm/bfdot_f32.c | 67 +++ .../aarch64/sve/acle/asm/bfdot_lane_f32.c | 86 ++++ .../gcc.target/aarch64/sve/acle/asm/bfmlalb_f32.c | 67 +++ .../aarch64/sve/acle/asm/bfmlalb_lane_f32.c | 86 ++++ .../gcc.target/aarch64/sve/acle/asm/bfmlalt_f32.c | 67 +++ .../aarch64/sve/acle/asm/bfmlalt_lane_f32.c | 86 ++++ .../gcc.target/aarch64/sve/acle/asm/bfmmla_f32.c | 46 ++ .../sve/acle/asm/{clasta_f16.c => clasta_bf16.c} | 30 +- .../sve/acle/asm/{clastb_f16.c => clastb_bf16.c} | 30 +- .../gcc.target/aarch64/sve/acle/asm/cnt_bf16.c | 52 +++ .../gcc.target/aarch64/sve/acle/asm/create2_1.c | 10 + .../gcc.target/aarch64/sve/acle/asm/create3_1.c | 11 + .../gcc.target/aarch64/sve/acle/asm/create4_1.c | 12 + .../gcc.target/aarch64/sve/acle/asm/cvt_bf16.c | 96 +++++ .../gcc.target/aarch64/sve/acle/asm/cvtnt_bf16.c | 90 ++++ .../gcc.target/aarch64/sve/acle/asm/dup_bf16.c | 41 ++ .../aarch64/sve/acle/asm/dup_lane_bf16.c | 108 +++++ .../aarch64/sve/acle/asm/dupq_lane_bf16.c | 48 +++ .../aarch64/sve/acle/asm/{ext_f16.c => ext_bf16.c} | 42 +- .../gcc.target/aarch64/sve/acle/asm/get2_bf16.c | 55 +++ .../gcc.target/aarch64/sve/acle/asm/get3_bf16.c | 108 +++++ .../gcc.target/aarch64/sve/acle/asm/get4_bf16.c | 179 ++++++++ .../gcc.target/aarch64/sve/acle/asm/insr_bf16.c | 22 + .../gcc.target/aarch64/sve/acle/asm/lasta_bf16.c | 21 + .../gcc.target/aarch64/sve/acle/asm/lastb_bf16.c | 21 + .../aarch64/sve/acle/asm/{ld1_s16.c => ld1_bf16.c} | 96 ++--- .../gcc.target/aarch64/sve/acle/asm/ld1ro_bf16.c | 120 ++++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/ld1rq_bf16.c | 137 ++++++ .../aarch64/sve/acle/asm/{ld2_f16.c => ld2_bf16.c} | 120 +++--- .../aarch64/sve/acle/asm/{ld3_f16.c => ld3_bf16.c} | 144 +++---- .../aarch64/sve/acle/asm/{ld4_f16.c => ld4_bf16.c} | 168 ++++---- .../sve/acle/asm/{ldff1_u16.c => ldff1_bf16.c} | 48 +-- .../gcc.target/aarch64/sve/acle/asm/ldnf1_bf16.c | 154 +++++++ .../sve/acle/asm/{ldnt1_s16.c => ldnt1_bf16.c} | 96 ++--- .../aarch64/sve/acle/asm/{len_f16.c => len_bf16.c} | 6 +- .../gcc.target/aarch64/sve/acle/asm/mmla_f32.c | 46 ++ .../gcc.target/aarch64/sve/acle/asm/mmla_f64.c | 46 ++ .../gcc.target/aarch64/sve/acle/asm/mmla_s32.c | 46 ++ .../gcc.target/aarch64/sve/acle/asm/mmla_u32.c | 46 ++ .../aarch64/sve/acle/asm/reinterpret_bf16.c | 207 +++++++++ .../aarch64/sve/acle/asm/reinterpret_f16.c | 17 + .../aarch64/sve/acle/asm/reinterpret_f32.c | 17 + .../aarch64/sve/acle/asm/reinterpret_f64.c | 17 + .../aarch64/sve/acle/asm/reinterpret_s16.c | 17 + .../aarch64/sve/acle/asm/reinterpret_s32.c | 17 + .../aarch64/sve/acle/asm/reinterpret_s64.c | 17 + .../aarch64/sve/acle/asm/reinterpret_s8.c | 17 + .../aarch64/sve/acle/asm/reinterpret_u16.c | 17 + .../aarch64/sve/acle/asm/reinterpret_u32.c | 17 + .../aarch64/sve/acle/asm/reinterpret_u64.c | 17 + .../aarch64/sve/acle/asm/reinterpret_u8.c | 17 + .../aarch64/sve/acle/asm/{rev_f16.c => rev_bf16.c} | 12 +- .../aarch64/sve/acle/asm/{sel_f16.c => sel_bf16.c} | 18 +- .../gcc.target/aarch64/sve/acle/asm/set2_bf16.c | 41 ++ .../gcc.target/aarch64/sve/acle/asm/set3_bf16.c | 63 +++ .../gcc.target/aarch64/sve/acle/asm/set4_bf16.c | 87 ++++ .../sve/acle/asm/{splice_f16.c => splice_bf16.c} | 18 +- .../aarch64/sve/acle/asm/{st1_f16.c => st1_bf16.c} | 96 ++--- .../aarch64/sve/acle/asm/{st2_f16.c => st2_bf16.c} | 120 +++--- .../aarch64/sve/acle/asm/{st3_f16.c => st3_bf16.c} | 144 +++---- .../aarch64/sve/acle/asm/{st4_u16.c => st4_bf16.c} | 168 ++++---- .../sve/acle/asm/{stnt1_s16.c => stnt1_bf16.c} | 96 ++--- .../aarch64/sve/acle/asm/sudot_lane_s32.c | 97 +++++ .../gcc.target/aarch64/sve/acle/asm/sudot_s32.c | 45 ++ .../gcc.target/aarch64/sve/acle/asm/tbl_bf16.c | 30 ++ .../aarch64/sve/acle/asm/test_sve_acle.h | 49 +++ .../sve/acle/asm/{trn1_f16.c => trn1_bf16.c} | 18 +- .../gcc.target/aarch64/sve/acle/asm/trn1q_bf16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_f16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_f32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_f64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_s16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_s32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_s64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_s8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_u16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_u32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_u64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn1q_u8.c | 32 ++ .../sve/acle/asm/{trn2_f16.c => trn2_bf16.c} | 18 +- .../gcc.target/aarch64/sve/acle/asm/trn2q_bf16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_f16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_f32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_f64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_s16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_s32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_s64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_s8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_u16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_u32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_u64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/trn2q_u8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/undef2_1.c | 7 + .../gcc.target/aarch64/sve/acle/asm/undef3_1.c | 7 + .../gcc.target/aarch64/sve/acle/asm/undef4_1.c | 7 + .../gcc.target/aarch64/sve/acle/asm/undef_1.c | 7 + .../aarch64/sve/acle/asm/usdot_lane_s32.c | 97 +++++ .../gcc.target/aarch64/sve/acle/asm/usdot_s32.c | 46 ++ .../gcc.target/aarch64/sve/acle/asm/usmmla_s32.c | 46 ++ .../sve/acle/asm/{uzp1_f16.c => uzp1_bf16.c} | 18 +- .../gcc.target/aarch64/sve/acle/asm/uzp1q_bf16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_f16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_f32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_f64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_s16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_s32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_s64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_s8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_u16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_u32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_u64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp1q_u8.c | 32 ++ .../sve/acle/asm/{uzp2_f16.c => uzp2_bf16.c} | 18 +- .../gcc.target/aarch64/sve/acle/asm/uzp2q_bf16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_f16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_f32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_f64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_s16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_s32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_s64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_s8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_u16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_u32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_u64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/uzp2q_u8.c | 32 ++ .../sve/acle/asm/{zip1_f16.c => zip1_bf16.c} | 18 +- .../gcc.target/aarch64/sve/acle/asm/zip1q_bf16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_f16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_f32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_f64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_s16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_s32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_s64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_s8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_u16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_u32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_u64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip1q_u8.c | 32 ++ .../sve/acle/asm/{zip2_f16.c => zip2_bf16.c} | 18 +- .../gcc.target/aarch64/sve/acle/asm/zip2q_bf16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_f16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_f32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_f64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_s16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_s32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_s64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_s8.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_u16.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_u32.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_u64.c | 32 ++ .../gcc.target/aarch64/sve/acle/asm/zip2q_u8.c | 32 ++ .../gcc.target/aarch64/sve/acle/general-c/mmla_1.c | 58 +++ .../gcc.target/aarch64/sve/acle/general-c/mmla_2.c | 10 + .../gcc.target/aarch64/sve/acle/general-c/mmla_3.c | 10 + .../gcc.target/aarch64/sve/acle/general-c/mmla_4.c | 10 + .../gcc.target/aarch64/sve/acle/general-c/mmla_5.c | 10 + .../gcc.target/aarch64/sve/acle/general-c/mmla_6.c | 10 + .../gcc.target/aarch64/sve/acle/general-c/mmla_7.c | 10 + .../sve/acle/general-c/ternary_bfloat16_1.c | 24 ++ .../sve/acle/general-c/ternary_bfloat16_lane_1.c | 30 ++ .../sve/acle/general-c/ternary_bfloat16_lanex2_1.c | 30 ++ .../sve/acle/general-c/ternary_bfloat16_opt_n_1.c | 24 ++ .../sve/acle/general-c/ternary_intq_uintq_lane_1.c | 32 ++ .../acle/general-c/ternary_intq_uintq_opt_n_1.c | 37 ++ .../sve/acle/general-c/ternary_uintq_intq_1.c | 37 ++ .../sve/acle/general-c/ternary_uintq_intq_lane_1.c | 32 ++ .../acle/general-c/ternary_uintq_intq_opt_n_1.c | 37 ++ .../gcc.target/aarch64/sve/pcs/annotate_1.c | 8 + .../gcc.target/aarch64/sve/pcs/annotate_2.c | 8 + .../gcc.target/aarch64/sve/pcs/annotate_3.c | 8 + .../gcc.target/aarch64/sve/pcs/annotate_4.c | 12 + .../gcc.target/aarch64/sve/pcs/annotate_5.c | 12 + .../gcc.target/aarch64/sve/pcs/annotate_6.c | 12 + .../gcc.target/aarch64/sve/pcs/annotate_7.c | 8 + gcc/testsuite/gcc.target/aarch64/sve/pcs/args_1.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_2.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_3.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_4.c | 2 +- .../sve/pcs/{args_5_be_s16.c => args_5_be_bf16.c} | 16 +- .../gcc.target/aarch64/sve/pcs/args_5_be_f16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_f32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_f64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_s16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_s32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_s64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_s8.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_u16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_u32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_u64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_be_u8.c | 2 +- .../sve/pcs/{args_5_le_f16.c => args_5_le_bf16.c} | 16 +- .../gcc.target/aarch64/sve/pcs/args_5_le_f16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_f32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_f64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_s16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_s32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_s64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_s8.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_u16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_u32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_u64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_5_le_u8.c | 2 +- .../sve/pcs/{args_6_be_u16.c => args_6_be_bf16.c} | 32 +- .../gcc.target/aarch64/sve/pcs/args_6_be_f16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_f32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_f64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_s16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_s32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_s64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_s8.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_u16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_u32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_u64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_be_u8.c | 2 +- .../sve/pcs/{args_6_le_u16.c => args_6_le_bf16.c} | 32 +- .../gcc.target/aarch64/sve/pcs/args_6_le_f16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_f32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_f64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_s16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_s32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_s64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_s8.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_u16.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_u32.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_u64.c | 2 +- .../gcc.target/aarch64/sve/pcs/args_6_le_u8.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_7.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_8.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/args_9.c | 2 +- .../gcc.target/aarch64/sve/pcs/gnu_vectors_1.c | 12 +- .../gcc.target/aarch64/sve/pcs/gnu_vectors_2.c | 10 +- .../gcc.target/aarch64/sve/pcs/return_1.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_1_1024.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_1_128.c | 4 +- .../gcc.target/aarch64/sve/pcs/return_1_2048.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_1_256.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_1_512.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_2.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_3.c | 2 +- .../gcc.target/aarch64/sve/pcs/return_4.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_4_1024.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_4_128.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_4_2048.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_4_256.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_4_512.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_5.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_5_1024.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_5_128.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_5_2048.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_5_256.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_5_512.c | 29 +- .../gcc.target/aarch64/sve/pcs/return_6.c | 16 +- .../gcc.target/aarch64/sve/pcs/return_6_1024.c | 24 +- .../gcc.target/aarch64/sve/pcs/return_6_128.c | 23 +- .../gcc.target/aarch64/sve/pcs/return_6_2048.c | 24 +- .../gcc.target/aarch64/sve/pcs/return_6_256.c | 24 +- .../gcc.target/aarch64/sve/pcs/return_6_512.c | 24 +- .../gcc.target/aarch64/sve/pcs/return_7.c | 28 ++ .../gcc.target/aarch64/sve/pcs/return_8.c | 29 ++ .../gcc.target/aarch64/sve/pcs/return_9.c | 33 ++ .../gcc.target/aarch64/sve/pcs/saves_2_be_nowrap.c | 2 +- .../gcc.target/aarch64/sve/pcs/saves_2_be_wrap.c | 2 +- .../gcc.target/aarch64/sve/pcs/saves_2_le_nowrap.c | 2 +- .../gcc.target/aarch64/sve/pcs/saves_2_le_wrap.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pcs/saves_3.c | 2 +- .../gcc.target/aarch64/sve/pcs/saves_4_be.c | 2 +- .../gcc.target/aarch64/sve/pcs/saves_4_le.c | 2 +- .../gcc.target/aarch64/sve/pcs/stack_clash_2_128.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_1.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_f16.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_f32.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_f64.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_s16.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_s32.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_s64.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_s8.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_u16.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_u32.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_u64.c | 2 +- .../gcc.target/aarch64/sve/pcs/varargs_2_u8.c | 2 +- .../gcc.target/aarch64/sve2/acle/asm/tbl2_bf16.c | 30 ++ .../sve2/acle/asm/{tbx_s16.c => tbx_bf16.c} | 20 +- .../aarch64/sve2/acle/asm/whilerw_bf16.c | 50 +++ .../aarch64/sve2/acle/asm/whilewr_bf16.c | 50 +++ gcc/testsuite/gcc.target/i386/pr91333.c | 14 + gcc/testsuite/gfortran.dg/goacc/atomic-1.f90 | 17 + gcc/testsuite/lib/target-supports.exp | 2 +- gcc/tree-ssa-loop-ivopts.c | 11 +- gcc/tree.h | 25 ++ libgomp/ChangeLog | 10 + libgomp/plugin/plugin-gcn.c | 23 + libstdc++-v3/ChangeLog | 9 + .../24_iterators/range_operations/distance.cc | 30 +- .../24_iterators/range_operations/next.cc | 58 +-- .../24_iterators/range_operations/prev.cc | 50 +-- libstdc++-v3/testsuite/util/testsuite_iterators.h | 5 +- 376 files changed, 9899 insertions(+), 1362 deletions(-) create mode 100644 gcc/testsuite/g++.dg/opt/pr91838.C create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr93505.c rename gcc/testsuite/gcc.dg/analyzer/{ => torture}/conditionals-2.c (87%) create mode 100644 gcc/testsuite/gcc.dg/analyzer/torture/pr93356.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/torture/pr93379-2.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/torture/pr93379.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/torture/pr93438-2.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/torture/pr93438.c create mode 100644 gcc/testsuite/gcc.dg/lto/pr93384_0.c create mode 100644 gcc/testsuite/gcc.dg/lto/pr93384_1.c create mode 100644 gcc/testsuite/gcc.dg/pr88660.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bfdot_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bfdot_lane_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bfmlalb_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bfmlalb_lane_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bfmlalt_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bfmlalt_lane_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/bfmmla_f32.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{clasta_f16.c => clasta_bf16.c} (50%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{clastb_f16.c => clastb_bf16.c} (50%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/cnt_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/cvt_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/cvtnt_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dup_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dup_lane_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/dupq_lane_bf16.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{ext_f16.c => ext_bf16.c} (52%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/get2_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/get3_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/get4_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/insr_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lasta_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/lastb_bf16.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{ld1_s16.c => ld1_bf16.c} (51%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1rq_bf16.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{ld2_f16.c => ld2_bf16.c} (54%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{ld3_f16.c => ld3_bf16.c} (53%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{ld4_f16.c => ld4_bf16.c} (54%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{ldff1_u16.c => ldff1_bf16.c} (55%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ldnf1_bf16.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{ldnt1_s16.c => ldnt1_bf16.c} (51%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{len_f16.c => len_bf16.c} (59%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mmla_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mmla_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mmla_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/mmla_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/reinterpret_bf16.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{rev_f16.c => rev_bf16.c} (52%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{sel_f16.c => sel_bf16.c} (51%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/set2_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/set3_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/set4_bf16.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{splice_f16.c => splice_bf16.c} (55%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{st1_f16.c => st1_bf16.c} (51%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{st2_f16.c => st2_bf16.c} (55%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{st3_f16.c => st3_bf16.c} (53%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{st4_u16.c => st4_bf16.c} (53%) copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{stnt1_s16.c => stnt1_bf16.c} (50%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sudot_lane_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/sudot_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/tbl_bf16.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{trn1_f16.c => trn1_bf16.c} (50%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_s8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/trn1q_u64.c create mode 100644 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100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp2q_s8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp2q_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp2q_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp2q_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/uzp2q_u8.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{zip1_f16.c => zip1_bf16.c} (50%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_s8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip1q_u8.c copy gcc/testsuite/gcc.target/aarch64/sve/acle/asm/{zip2_f16.c => zip2_bf16.c} (50%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_s8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/asm/zip2q_u8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/mmla_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/mmla_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/mmla_3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/mmla_4.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/mmla_5.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/mmla_6.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/mmla_7.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_bfl [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_bfl [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_bfl [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_bfl [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_int [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_int [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_uin [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_uin [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_uin [...] copy gcc/testsuite/gcc.target/aarch64/sve/pcs/{args_5_be_s16.c => args_5_be_bf16.c} (83%) copy gcc/testsuite/gcc.target/aarch64/sve/pcs/{args_5_le_f16.c => args_5_le_bf16.c} (82%) copy gcc/testsuite/gcc.target/aarch64/sve/pcs/{args_6_be_u16.c => args_6_be_bf16.c} (72%) copy gcc/testsuite/gcc.target/aarch64/sve/pcs/{args_6_le_u16.c => args_6_le_bf16.c} (71%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/tbl2_bf16.c copy gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/{tbx_s16.c => tbx_bf16.c} (54%) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/whilerw_bf16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/whilewr_bf16.c create mode 100644 gcc/testsuite/gcc.target/i386/pr91333.c create mode 100644 gcc/testsuite/gfortran.dg/goacc/atomic-1.f90