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unknown user pushed a change to branch aarch64/sve-acle-branch in repository gcc.
from 2ca480a8711 [SVE ACLE] Fix FSUBR handling new abbb7a5a3c9 [x86] Fix ambiguous .md attribute uses new 36be86260de [AArch64] Fix ambiguous .md attribute uses new 0ec55f76fee Use file_location for md_reader's ptr_loc new eccb2ae6de9 Report ambiguous uses of .md attributes new 831d0e18be5 [SVE ACLE] Add svcnt[bhwd] new 8f71559a2f0 [SVE ACLE] Add contiguous svld1 new 1d70a1c9e74 [SVE ACLE] Add svld1[su][bhw]
The 7 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: gcc/config/aarch64/aarch64-modes.def | 41 +- gcc/config/aarch64/aarch64-protos.h | 9 +- gcc/config/aarch64/aarch64-simd.md | 37 +- gcc/config/aarch64/aarch64-sve-builtins.c | 461 ++++++++++++++++++++- gcc/config/aarch64/aarch64-sve-builtins.def | 22 + gcc/config/aarch64/aarch64-sve.md | 42 +- gcc/config/aarch64/aarch64.c | 283 +++++++++---- gcc/config/aarch64/aarch64.md | 58 +-- gcc/config/aarch64/arm_sve.h | 4 + gcc/config/aarch64/constraints.md | 8 +- gcc/config/aarch64/iterators.md | 24 +- gcc/config/aarch64/predicates.md | 16 +- gcc/config/aarch64/t-aarch64 | 3 +- gcc/config/i386/i386.md | 4 +- gcc/config/i386/sse.md | 42 +- gcc/genmodes.c | 22 +- gcc/read-md.c | 27 +- gcc/read-md.h | 13 +- gcc/read-rtl.c | 62 ++- gcc/simplify-rtx.c | 31 +- .../gcc.target/aarch64/sve-acle/asm/cntb.c | 281 +++++++++++++ .../gcc.target/aarch64/sve-acle/asm/cntd.c | 279 +++++++++++++ .../gcc.target/aarch64/sve-acle/asm/cnth.c | 281 +++++++++++++ .../gcc.target/aarch64/sve-acle/asm/cntw.c | 280 +++++++++++++ .../gcc.target/aarch64/sve-acle/asm/ld1_f16.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1_f32.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1_f64.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1_s16.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1_s32.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1_s64.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1_s8.c | 163 ++++++++ .../gcc.target/aarch64/sve-acle/asm/ld1_u16.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1_u32.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1_u64.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1_u8.c | 163 ++++++++ .../gcc.target/aarch64/sve-acle/asm/ld1sb_s16.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1sb_s32.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1sb_s64.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1sb_u16.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1sb_u32.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1sb_u64.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1sh_s32.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1sh_s64.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1sh_u32.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1sh_u64.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1sw_s64.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1sw_u64.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1ub_s16.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1ub_s32.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1ub_s64.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1ub_u16.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1ub_u32.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1ub_u64.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1uh_s32.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1uh_s64.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1uh_u32.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1uh_u64.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1uw_s64.c | 159 +++++++ .../gcc.target/aarch64/sve-acle/asm/ld1uw_u64.c | 159 +++++++ .../aarch64/sve-acle/asm/test_sve_acle.h | 21 +- .../gcc.target/aarch64/sve-acle/general-c/ld1_1.c | 23 + .../gcc.target/aarch64/sve-acle/general-c/ld1_2.c | 22 + .../gcc.target/aarch64/sve-acle/general-c/ld1_3.c | 18 + .../gcc.target/aarch64/sve-acle/general/ld1_1.c | 16 + gcc/testsuite/gcc.target/aarch64/sve/loop_add_4.c | 6 +- gcc/tree-ssa-ccp.c | 14 +- 66 files changed, 7775 insertions(+), 248 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/cntb.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/cntd.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/cnth.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/cntw.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1_s8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1_u8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1sb_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1sb_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1sb_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1sb_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1sb_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1sb_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1sh_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1sh_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1sh_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1sh_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1sw_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1sw_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1ub_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1ub_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1ub_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1ub_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1ub_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1ub_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1uh_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1uh_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1uh_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1uh_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1uw_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ld1uw_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/ld1_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/ld1_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/ld1_3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general/ld1_1.c