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from fb0653a0e54 RISC-V: Fix the behavior for multilib-generator with --cmod [...] new 07d4c264a00 [PATCH] RISC-V: Bugfix for unrecognizable insn for XTheadVector new 319b9a385d4 RISC-V: Enable and adjust the testsuite for XTheadVector. new 2631ac38d9b RISC-V: Add a new constraint to ensure that the vl of XThea [...] new f2e2e255004 RISC-V: unrecognizable insn ICE in xtheadvector/pr114194.c [...] new 51e041a9db7 RISC-V: Disable unsupported vsext/vzext patterns for XTheadVector.
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Summary of changes: gcc/config/riscv/constraints.md | 6 + gcc/config/riscv/riscv-string.cc | 2 +- gcc/config/riscv/riscv-v.cc | 8 +- gcc/config/riscv/thead-vector.md | 18 +- gcc/config/riscv/vector.md | 510 ++++++++++----------- gcc/testsuite/g++.target/riscv/rvv/rvv.exp | 3 + .../g++.target/riscv/rvv/xtheadvector/pr116593.C | 47 ++ gcc/testsuite/gcc.target/riscv/rvv/rvv.exp | 2 + .../riscv/rvv/xtheadvector/pr114194-rv32.c | 51 +++ .../riscv/rvv/xtheadvector/pr114194-rv64.c | 55 +++ .../gcc.target/riscv/rvv/xtheadvector/pr114194.c | 56 --- .../gcc.target/riscv/rvv/xtheadvector/pr116591.c | 14 + .../gcc.target/riscv/rvv/xtheadvector/pr118601.c | 9 + .../gcc.target/riscv/rvv/xtheadvector/prefix.c | 2 +- .../gcc.target/riscv/rvv/xtheadvector/vlb-vsb.c | 17 +- .../gcc.target/riscv/rvv/xtheadvector/vlbu-vsb.c | 17 +- .../gcc.target/riscv/rvv/xtheadvector/vlh-vsh.c | 17 +- .../gcc.target/riscv/rvv/xtheadvector/vlhu-vsh.c | 17 +- .../gcc.target/riscv/rvv/xtheadvector/vlw-vsw.c | 17 +- .../gcc.target/riscv/rvv/xtheadvector/vlwu-vsw.c | 17 +- .../gcc.target/riscv/rvv/xtheadvector/vsext.c | 24 + .../gcc.target/riscv/rvv/xtheadvector/vzext.c | 24 + 22 files changed, 565 insertions(+), 368 deletions(-) create mode 100644 gcc/testsuite/g++.target/riscv/rvv/xtheadvector/pr116593.C create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr114194-rv32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr114194-rv64.c delete mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr114194.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr116591.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/pr118601.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vsext.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vzext.c