This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-release-aarch64-spec2k6-O2 in repository toolchain/ci/llvm-project.
from d24d5c8e308 fixed broken test after cherry pick adds 9bf7ca2c92a [RISCV] Fix sysroot tests without GCC on RISC-V hosts with GCC adds f8e49af4f1a [LegalizeTypes][RISCV] Correctly sign-extend comparison for [...] adds 71c14cd5aee [RISCV] Fix passing two floating-point values in complex se [...] adds 249fef00d92 [RISCV64] Emit correct lib call for fp(float/double) to ui/si adds 5fa1f1e9f44 [RISCV-V] Provide muldi3 builtin assembly implementation adds 43ca67c05d2 [RISCV] Fix incorrect FP base CFI offset for variable argum [...] adds 04b0a4e22e3 Provide anchor for compiler extensions adds 69fb858731e [AArch64] Fix mismatch in prologue and epilogue for funclet [...] adds a110c3fc8cd [AArch64] Change AArch64 Windows EH UnwindHelp object to be [...] adds b294e611271 [PPCAsmPrinter] support 'L' output template for memory operands adds 76ceebb0d96 [DAGCombine] Check the uses of negated floating constant an [...] adds 77d76b71d7d [libc++] Fix recursive instantiation in std::array. adds 70919a46fac [tests] Speculative fix for buildbot breakage from c5f7c039efe7 adds ef32c611aa2 [tests] Revert unhelpful change from d73eed42d1dc
No new revisions were added by this update.
Summary of changes: clang/lib/CodeGen/TargetInfo.cpp | 3 +- clang/test/CodeGen/riscv64-lp64-abi.c | 21 ++++ clang/test/CodeGen/riscv64-lp64f-lp64d-abi.c | 29 +++++ clang/test/Driver/riscv32-toolchain-extra.c | 1 + clang/test/Driver/riscv64-toolchain-extra.c | 1 + .../builtins/riscv/{mulsi3.S => int_mul_impl.inc} | 14 ++- compiler-rt/lib/builtins/riscv/muldi3.S | 11 ++ compiler-rt/lib/builtins/riscv/mulsi3.S | 23 +--- libcxx/include/array | 2 +- .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 14 ++- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 26 +++-- llvm/lib/Extensions/Extensions.cpp | 15 +++ llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 101 ++++++++++------- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 7 +- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 4 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 34 ++++++ .../CodeGen/AArch64/funclet-match-add-sub-stack.ll | 62 +++++++++++ llvm/test/CodeGen/AArch64/seh-finally.ll | 24 ++-- llvm/test/CodeGen/AArch64/wineh-try-catch-cbz.ll | 7 +- .../CodeGen/AArch64/wineh-try-catch-realign.ll | 2 +- llvm/test/CodeGen/AArch64/wineh-try-catch.ll | 14 +-- .../CodeGen/AArch64/wineh-unwindhelp-via-fp.ll | 69 ++++++++++++ llvm/test/CodeGen/PowerPC/fma-combine.ll | 101 +++++++++++++++++ .../CodeGen/PowerPC/inlineasm-output-template.ll | 13 ++- llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll | 10 ++ llvm/test/CodeGen/RISCV/rv64i-single-softfloat.ll | 124 ++++++++++++++++++++- llvm/test/CodeGen/RISCV/vararg.ll | 8 +- llvm/test/CodeGen/X86/asm-modifier2.ll | 2 +- 28 files changed, 625 insertions(+), 117 deletions(-) copy compiler-rt/lib/builtins/riscv/{mulsi3.S => int_mul_impl.inc} (61%) create mode 100644 compiler-rt/lib/builtins/riscv/muldi3.S create mode 100644 llvm/test/CodeGen/AArch64/funclet-match-add-sub-stack.ll create mode 100644 llvm/test/CodeGen/AArch64/wineh-unwindhelp-via-fp.ll