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from 67bc253df2f [AArch64] Peephole for SUBS new 25236514370 [AArch64] Use SUBS for parallel subtraction and comparison [...] new 38a4c04c16d [AArch64] Add combine pattern for storing lane zero of a vector
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Summary of changes: gcc/ChangeLog | 11 +++++ gcc/config/aarch64/aarch64-simd.md | 13 ++++++ gcc/config/aarch64/aarch64.md | 31 +++++++++++++ gcc/config/aarch64/predicates.md | 4 ++ gcc/testsuite/ChangeLog | 8 ++++ .../gcc.target/aarch64/store_lane0_str_1.c | 54 ++++++++++++++++++++++ .../aarch64/{subs_compare_1.c => subs_compare_2.c} | 6 +-- 7 files changed, 124 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/store_lane0_str_1.c copy gcc/testsuite/gcc.target/aarch64/{subs_compare_1.c => subs_compare_2.c} (82%)