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from 3a407070b61 MAINTAINERS: Add myself as riscv port reviewer. new 48b74047071 RISC-V: Enable SLP un-order reduction
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Summary of changes: gcc/config/riscv/autovec.md | 25 ++++++++++++++++++++++ gcc/config/riscv/riscv-v.cc | 4 ++++ .../rvv/autovec/reduc/reduc-5.c} | 21 ++++-------------- .../gcc.target/riscv/rvv/autovec/reduc/reduc-6.c | 6 ++++++ .../rvv/autovec/reduc/reduc-7.c} | 25 +++------------------- .../gcc.target/riscv/rvv/autovec/reduc/reduc-8.c | 16 ++++++++++++++ .../gcc.target/riscv/rvv/autovec/reduc/reduc-9.c | 16 ++++++++++++++ .../rvv/autovec/reduc/reduc_run-5.c} | 6 +++--- .../ternop_nofm_run-1.c => reduc/reduc_run-6.c} | 6 ++++-- .../rvv/autovec/reduc/reduc_run-7.c} | 7 +++--- .../rvv/autovec/reduc/reduc_run-8.c} | 6 +++--- .../rvv/autovec/reduc/reduc_run-9.c} | 8 +++---- 12 files changed, 92 insertions(+), 54 deletions(-) copy gcc/testsuite/gcc.target/{aarch64/sve/reduc_13.c => riscv/rvv/autovec/reduc/r [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/reduc-6.c copy gcc/testsuite/gcc.target/{aarch64/sve/reduc_14.c => riscv/rvv/autovec/reduc/r [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/reduc-8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/reduc-9.c copy gcc/testsuite/gcc.target/{aarch64/sve/reduc_13_run.c => riscv/rvv/autovec/red [...] copy gcc/testsuite/gcc.target/riscv/rvv/autovec/{ternop/ternop_nofm_run-1.c => red [...] copy gcc/testsuite/gcc.target/{aarch64/sve/reduc_14_run.c => riscv/rvv/autovec/red [...] copy gcc/testsuite/gcc.target/{aarch64/sve/reduc_15_run.c => riscv/rvv/autovec/red [...] copy gcc/testsuite/gcc.target/{aarch64/sve/reduc_15_run.c => riscv/rvv/autovec/red [...]