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from 8193e71a07d aarch64: Fix costing of move to/from MOVEABLE_SYSREGS new bdbb74e38f3 Match: Support form 1 for vector signed integer SAT_TRUNC new 2987ca61003 Vect: Try the pattern of vector signed integer SAT_TRUNC new b5a05815417 RISC-V: Implement vector SAT_TRUNC for signed integer new 1f3a9c08aff RISC-V: Add testcases for form 1 of vector signed SAT_TRUNC new 033900fc175 RISC-V: Add testcases for form 2 of vector signed SAT_TRUNC new efa1617bfc0 RISC-V: Add testcases for form 3 of vector signed SAT_TRUNC new f30ca9867a7 RISC-V: Add testcases for form 4 of vector signed SAT_TRUNC new 108c8ef03dd RISC-V: Add testcases for form 5 of vector signed SAT_TRUNC new f411abe7935 RISC-V: Add testcases for form 6 of vector signed SAT_TRUNC new f1388068119 RISC-V: Add testcases for form 7 of vector signed SAT_TRUNC new cb131a401b7 RISC-V: Add testcases for form 8 of vector signed SAT_TRUNC
The 11 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: gcc/config/riscv/autovec.md | 34 +++ gcc/config/riscv/riscv-protos.h | 4 + gcc/config/riscv/riscv-v.cc | 46 ++++ gcc/match.pd | 4 +- .../riscv/rvv/autovec/unop/vec_sat_data.h | 291 +++++++++++++++++++++ .../rvv/autovec/unop/vec_sat_s_trunc-1-i16-to-i8.c | 9 + .../autovec/unop/vec_sat_s_trunc-1-i32-to-i16.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-1-i32-to-i8.c | 9 + .../autovec/unop/vec_sat_s_trunc-1-i64-to-i16.c | 9 + .../autovec/unop/vec_sat_s_trunc-1-i64-to-i32.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i8.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-2-i16-to-i8.c | 9 + .../autovec/unop/vec_sat_s_trunc-2-i32-to-i16.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-2-i32-to-i8.c | 9 + .../autovec/unop/vec_sat_s_trunc-2-i64-to-i16.c | 9 + .../autovec/unop/vec_sat_s_trunc-2-i64-to-i32.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-2-i64-to-i8.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-3-i16-to-i8.c | 9 + .../autovec/unop/vec_sat_s_trunc-3-i32-to-i16.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-3-i32-to-i8.c | 9 + .../autovec/unop/vec_sat_s_trunc-3-i64-to-i16.c | 9 + .../autovec/unop/vec_sat_s_trunc-3-i64-to-i32.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-3-i64-to-i8.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-4-i16-to-i8.c | 9 + .../autovec/unop/vec_sat_s_trunc-4-i32-to-i16.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-4-i32-to-i8.c | 9 + .../autovec/unop/vec_sat_s_trunc-4-i64-to-i16.c | 9 + .../autovec/unop/vec_sat_s_trunc-4-i64-to-i32.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-4-i64-to-i8.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-5-i16-to-i8.c | 9 + .../autovec/unop/vec_sat_s_trunc-5-i32-to-i16.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-5-i32-to-i8.c | 9 + .../autovec/unop/vec_sat_s_trunc-5-i64-to-i16.c | 9 + .../autovec/unop/vec_sat_s_trunc-5-i64-to-i32.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-5-i64-to-i8.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-6-i16-to-i8.c | 9 + .../autovec/unop/vec_sat_s_trunc-6-i32-to-i16.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-6-i32-to-i8.c | 9 + .../autovec/unop/vec_sat_s_trunc-6-i64-to-i16.c | 9 + .../autovec/unop/vec_sat_s_trunc-6-i64-to-i32.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-6-i64-to-i8.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-7-i16-to-i8.c | 9 + .../autovec/unop/vec_sat_s_trunc-7-i32-to-i16.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-7-i32-to-i8.c | 9 + .../autovec/unop/vec_sat_s_trunc-7-i64-to-i16.c | 9 + .../autovec/unop/vec_sat_s_trunc-7-i64-to-i32.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-7-i64-to-i8.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-8-i16-to-i8.c | 9 + .../autovec/unop/vec_sat_s_trunc-8-i32-to-i16.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-8-i32-to-i8.c | 9 + .../autovec/unop/vec_sat_s_trunc-8-i64-to-i16.c | 9 + .../autovec/unop/vec_sat_s_trunc-8-i64-to-i32.c | 9 + .../rvv/autovec/unop/vec_sat_s_trunc-8-i64-to-i8.c | 9 + ...c-run-1.c => vec_sat_s_trunc-run-1-i16-to-i8.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-1-i32-to-i16.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-1-i32-to-i8.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-1-i64-to-i16.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-1-i64-to-i32.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-1-i64-to-i8.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-2-i16-to-i8.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-2-i32-to-i16.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-2-i32-to-i8.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-2-i64-to-i16.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-2-i64-to-i32.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-2-i64-to-i8.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-3-i16-to-i8.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-3-i32-to-i16.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-3-i32-to-i8.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-3-i64-to-i16.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-3-i64-to-i32.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-3-i64-to-i8.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-4-i16-to-i8.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-4-i32-to-i16.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-4-i32-to-i8.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-4-i64-to-i16.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-4-i64-to-i32.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-4-i64-to-i8.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-5-i16-to-i8.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-5-i32-to-i16.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-5-i32-to-i8.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-5-i64-to-i16.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-5-i64-to-i32.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-5-i64-to-i8.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-6-i16-to-i8.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-6-i32-to-i16.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-6-i32-to-i8.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-6-i64-to-i16.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-6-i64-to-i32.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-6-i64-to-i8.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-7-i16-to-i8.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-7-i32-to-i16.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-7-i32-to-i8.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-7-i64-to-i16.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-7-i64-to-i32.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-7-i64-to-i8.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-8-i16-to-i8.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-8-i32-to-i16.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-8-i32-to-i8.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-8-i64-to-i16.c} | 8 +- ...-run-1.c => vec_sat_s_trunc-run-8-i64-to-i32.c} | 8 +- ...c-run-1.c => vec_sat_s_trunc-run-8-i64-to-i8.c} | 8 +- .../gcc.target/riscv/rvv/autovec/vec_sat_arith.h | 176 +++++++++++++ gcc/tree-vect-patterns.cc | 4 +- 103 files changed, 1181 insertions(+), 194 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc [...] create mode 100644 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