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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_sq/llvm-master-aarch64-spec2k6-Os in repository toolchain/ci/llvm-project.
from 6956840b5c00 Revert "Reland "[NFC] Add a missing test for for clang-repl"" adds 0f45eaf0da1f [RISCV] Add a scavenge spill slot when use ADDI to compute [...] adds 53dc0f107877 [NFC] Switch a few uses of undef to poison as placeholders [...] adds d100a30a5406 [AArch64] Regenerate more tests. NFC adds d71a8bb157ea [MLIR][Affine] Allow affine-expr on RHS in IntegerSet adds 13d58ff9f373 [RISCV] Replace call to APInt::countTrailingZeros with uin [...] adds 2aea8af25136 [libc++] Make _LIBCPP_DEBUG_RANDOMIZE_RANGE a function adds e1f61d864214 [gn build] Port 2aea8af25136 adds c1c3134ac422 [InstCombine] add tests for and-of-negated-lowbitmask; NFC adds f9f40aa10d98 [InstCombine] fold negated low-bit-mask to cmp+select adds b1f0efc06acc [clang-format] Tweak help text a bit adds 134363208b92 [clang] Fix gcc-6 compilation error. (NFC) adds a65a3bffd31f [clang-tidy] Don't treat invalid branches as identical adds f7a80c3d08d4 [clang-tidy] Properly forward clang-tidy output when runni [...] adds 2c3784cff859 [SCEV] recognize llvm.annotation intrinsic adds e98e13ac8f38 [mlir][Vector] Fold ShuffleOp(SplatOp(X), SplatOp(X)) to S [...] adds d2a35e4d39fe [AIX] Handling the label alignment of a global variable wi [...] adds 93d6fdfc232c [Driver] Ignore the clang modules validation-related flags [...] adds 8eb4dcb73747 [RISCV] Move some SHXADD matching cases into a ComplexPatt [...] adds d36e09cfe591 [RISCV] Add more SHXADD patterns. adds 1063dfc02853 [mlir][openmp] Added omp.taskloop
No new revisions were added by this update.
Summary of changes: .../clang-tidy/bugprone/BranchCloneCheck.cpp | 11 + clang-tools-extra/docs/ReleaseNotes.rst | 4 + .../test/clang-tidy/check_clang_tidy.py | 10 +- .../bugprone/branch-clone-unknown-expr.cpp | 9 + clang/lib/AST/Interp/ByteCodeExprGen.cpp | 2 +- clang/lib/Driver/ToolChains/Clang.cpp | 63 ++-- clang/lib/Format/Format.cpp | 25 +- clang/test/Driver/modules.m | 30 +- clang/tools/clang-format/ClangFormat.cpp | 10 +- libcxx/include/CMakeLists.txt | 1 + libcxx/include/__algorithm/nth_element.h | 11 +- libcxx/include/__algorithm/partial_sort.h | 9 +- libcxx/include/__algorithm/sort.h | 7 +- libcxx/include/__debug | 16 - libcxx/include/__debug_utils/randomize_range.h | 42 +++ libcxx/include/module.modulemap.in | 5 + libcxx/test/libcxx/private_headers.verify.cpp | 1 + llvm/docs/LangRef.rst | 16 +- llvm/include/llvm/CodeGen/AsmPrinter.h | 7 +- llvm/lib/Analysis/MemoryBuiltins.cpp | 6 +- llvm/lib/Analysis/ScalarEvolution.cpp | 8 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 91 ++++-- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 45 ++- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 65 +++- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 48 +++ llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h | 11 + llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 6 +- llvm/lib/Target/RISCV/RISCVInstrInfo.h | 5 +- llvm/lib/Target/RISCV/RISCVInstrInfoZb.td | 28 +- llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp | 2 +- llvm/lib/Transforms/IPO/MergeFunctions.cpp | 2 +- llvm/lib/Transforms/IPO/PruneEH.cpp | 2 +- llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp | 2 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 10 + .../Transforms/InstCombine/InstCombineCalls.cpp | 2 +- llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopDistribute.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 2 +- llvm/lib/Transforms/Scalar/Reassociate.cpp | 2 +- .../Transforms/Scalar/TailRecursionElimination.cpp | 4 +- .../ScalarEvolution/annotation-intrinsics.ll | 4 +- .../CodeGen/AArch64/global-merge-group-by-use.ll | 68 ++-- .../AArch64/sve-fix-length-and-combine-512.ll | 36 ++- llvm/test/CodeGen/AArch64/sve-fp-reduce.ll | 323 +++++++++++-------- llvm/test/CodeGen/AArch64/vector-gep.ll | 17 +- llvm/test/CodeGen/AArch64/win64_vararg.ll | 357 ++++++++++++--------- llvm/test/CodeGen/AArch64/win64_vararg_float.ll | 197 ++++++++---- llvm/test/CodeGen/AArch64/win64_vararg_float_cc.ll | 221 +++++++++---- llvm/test/CodeGen/PowerPC/aix-alias-alignment-2.ll | 79 +++++ llvm/test/CodeGen/PowerPC/aix-alias-alignment.ll | 74 +++++ llvm/test/CodeGen/PowerPC/aix-alias.ll | 16 +- llvm/test/CodeGen/RISCV/rv64zba.ll | 67 ++++ .../CodeGen/RISCV/rvv/addi-rvv-stack-object.mir | 60 ++++ llvm/test/CodeGen/RISCV/rvv/rvv-stack-align.mir | 22 +- llvm/test/CodeGen/RISCV/rvv/scalar-stack-align.ll | 24 +- .../dfa-jump-threading-transform.ll | 4 +- .../DFAJumpThreading/dfa-unfold-select.ll | 6 +- llvm/test/Transforms/InstCombine/and.ll | 60 ++++ .../Transforms/InstCombine/sadd-with-overflow.ll | 2 +- .../Transforms/InstCombine/ssub-with-overflow.ll | 2 +- .../Transforms/InstCombine/uadd-with-overflow.ll | 2 +- llvm/test/Transforms/InstCombine/with_overflow.ll | 30 +- .../MergeFunc/mergefunc-struct-return.ll | 2 +- .../2010-06-26-MultipleReturnValues.ll | 6 +- .../Transforms/TailCallElim/accum_recursion.ll | 2 +- llvm/test/Transforms/TailCallElim/basic.ll | 2 +- .../Transforms/WholeProgramDevirt/expand-check.ll | 2 +- llvm/utils/UpdateTestChecks/asm.py | 3 +- llvm/utils/gn/secondary/libcxx/include/BUILD.gn | 1 + mlir/docs/Dialects/Affine.md | 4 +- mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td | 180 ++++++++++- .../mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td | 2 +- mlir/include/mlir/Dialect/Vector/IR/VectorOps.td | 1 + mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp | 55 +++- mlir/lib/Dialect/Vector/IR/VectorOps.cpp | 30 ++ mlir/lib/Parser/AffineParser.cpp | 44 +-- mlir/test/Dialect/OpenMP/invalid.mlir | 125 ++++++++ mlir/test/Dialect/OpenMP/ops.mlir | 142 +++++++- mlir/test/Dialect/Vector/canonicalize.mlir | 14 + mlir/test/IR/affine-set.mlir | 81 +++++ mlir/test/IR/invalid.mlir | 18 +- 81 files changed, 2238 insertions(+), 771 deletions(-) create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone/branch-clon [...] create mode 100644 libcxx/include/__debug_utils/randomize_range.h create mode 100644 llvm/test/CodeGen/PowerPC/aix-alias-alignment-2.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-alias-alignment.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/addi-rvv-stack-object.mir create mode 100644 mlir/test/IR/affine-set.mlir