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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-aarch64-spec2k6-O2_LTO in repository toolchain/ci/llvm-project.
from e1dc495e630 [Clang] Harmonize Split DWARF options with llc adds 680c43b73a3 [NFC][MCA][X86] Add baseline test coverage for AMD Barcelon [...] adds 5dd61974f94 [NFC][MCA][X86] Add one more 'clear super register' pattern [...] adds 990f3ceb676 [X86][AVX] Decode constant bits from insert_subvector(c1, c2, c3) adds 90e87af303a [X86][AVX] Handle lane-crossing shuffle(extract_subvector(x [...] adds 456ca5d7f70 [X86] CombineShuffleWithExtract - assert all src ops types [...] adds 0a29028072f Recommit r363298 "[lit] Disable test on darwin when buildin [...] adds 186ca60e512 add header to help with template testing adds b3fc9fde2c7 Fix gcc-05.4 bot failures caused by in r363481 "[clangd] In [...] adds f6db5342240 gn build: Merge r363444 adds a552508841a [clangd] Type hierarchy subtypes adds fcffc2faccf [X86] CombineShuffleWithExtract - handle cases with differe [...] adds d14389c0a55 [x86] split 256-bit vector selects if operands are vector concats adds 9ff09d49dae [analyzer][NFC] Tease apart and clang-format NoStoreFuncVisitor adds 33b46a6df0b [analyzer] Track indices of arrays adds c8d88ad1a91 [CodeGenPrepare][x86] shift both sides of a vector select w [...] adds e20b388e2f9 [analyzer] Push correct version of 'Track indices of arrays' adds 52500216727 [AMDGPU] gfx10 conditional registers handling adds 490e83cd438 AMDGPU/GFX10: Support DLC bit in llvm.amdgcn.s.buffer.load [...] adds 4d4ef2a1671 [analyzer] ReturnVisitor: more portable test case adds 6d71be4e67e AMDGPU: Be explicit about whether the high-word in SI_PC_AD [...] adds 41abf2766e2 AMDGPU: Prepare for explicit absolute relocations in code g [...] adds 3a92aa29992 [docs] Fix a few problems with clang-tool docs to get the b [...] adds 2da0b89d92f [AsmPrinter] Make EmitLinkage and EmitVisibility public adds 9d8c94dfd76 [docs] Fix another bot warning by adding a blank line to se [...] adds 9b2d96024ae [docs] Fix another bot error by setting highlight language [...] adds 5a663bd77ac [InstSimplify] Fix addo/subo undef folds (PR42209) adds 9f2f1270096 [X86] Add TB_NO_REVERSE to some folding table entries where [...] adds 13de174b4c4 [llvm-objcopy] Add elf32-sparc and elf32-sparcel target adds 4f157320676 [yaml2obj][MachO] Don't fill dummy data for virtual sections adds 1d1cf30b738 PowerPC: Optimize SPE double parameter calling setup adds ee62c40eae9 [SimplifyCFG] Fix prof branch_weights MD while removing unr [...] adds a71ce4f1e8e DWARF: Avoid storing DIERefs in long-lived containers adds a9e5d2f35dd Re-commit r357452 (take 3): "SimplifyCFG SinkCommonCodeFrom [...] adds 966f4e874e0 [ARM] Extract some code from ARMConstantIslandPass adds f7c0b3aeb22 [ARM] Add ARMBasicBlockInfo.cpp adds a059efa885f [ARM] Remove ARMComputeBlockSize adds 5d6ee76c163 Describe stack-id as an enum adds 89d6905c595 [ARM] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off [...] adds 4bde5d3c081 [ARM] Fix another -Wunused-variable in -DLLVM_ENABLE_ASSERT [...] adds 43cf5ae48a0 [lldb] [test] Skip watchpoint tests on NetBSD if userdbregs [...] adds 25a043e78a9 [NFC][Codegen] Standalone tests for icmp eq/ne (urem %x, C) [...] adds ac14f7b10cf [lit] Delete empty lines at the end of lit.local.cfg NFC adds 46f9cbe28d4 [llvm-objdump] Use %08 instead of %016 to print leading add [...] adds 60d6fb2a634 [SCEV] Use NoWrapFlags when expanding a simple mul adds 9d81915fcaa Recommit [OpenCL] Move OpenCLBuiltins.td and remove unused include adds ef78e55205e [SelectionDAG] Fold insert_subvector(undef, extract_subvect [...] adds 5401c2db6ee Fix clang -Wcovered-switch-default after stack-id change by D60137 adds 2e46312ffd1 [DAGCombiner] [CodeGenPrepare] More comprehensive GEP splitting adds d5323f6a707 [libunwind][AArch64] Fix libunwind::Registers_arm64::jumpto adds 74ac20158a0 Test forward references in IntrinsicEmitter on Neon LD(2|3|4) adds 83773b77a5a [LV] Deny irregular types in interleavedAccessCanBeWidened adds 37b75336823 Promote -fdebug-compilation-dir from a cc1 flag to clang an [...] adds d2aab283e25 gn build: Merge r363530 adds 582f2692945 AsmPrinter: add doc-string for EmitLinkage adds d3d2edf901d [lldb] [test] Watchpoint tests can be always run as root on NetBSD adds f1e2827170b [X86][SSE] Avoid unnecessary stack codegen in NT store code [...] adds e40f879eb2c [HIP] Add the interface deriving the stub name of device kernels. adds d53027697ca [clangd] Detect C++ for extension-less source files in vsco [...] adds 7dc917603be [clangd] Bump vscode-clangd v0.0.15. adds 1bd3d00e7e5 [CodeGen] Check for HardwareLoop Latch ExitBlock adds 2dda1ff0380 Fix a '>= 0' test on unsigned that I inadvertantly introduc [...] adds e683eba0ed3 AMDGPU: Cleanup custom PseudoSourceValue definitions adds 29e792659b6 AMDGPU/GlobalISel: Fix default mapping for non-register operands adds f3b64d80bcc AMDGPU: Mark exp/exp.compr as inaccessiblememonly adds b10f0978334 AMDGPU: Ignore subtarget for InferAddressSpaces adds 1df203d78e4 InferAddressSpaces: Fix cloning original addrspacecast adds 3c9391aad9e [clang][CodeGen] Remove std::move on temporary adds 454e6b9010f [X86][SSE] Prevent misaligned non-temporal vector load/stor [...] adds 1c91e63897d [X86][SSE] Add tests for underaligned nt loads adds 15b7f5b72d2 PHINode: introduce setIncomingValueForBlock() function, and [...] adds 8c82c41262f [lldb] [test] Extend D55859 symbols.enable-external-lookup= [...] adds b5ce4e5ea3e [clangd] Perform merge for main file symbols. adds e4eadf174cb [scudo][standalone] Introduce the combined allocator adds 12cb792d7f4 [X86] combineLoad - begun making the load split code more g [...] adds 77bc3b65424 [ScopInliner] Register FunctionAnalysisManagerModuleProxy. adds 34667519dc1 [Remarks] Extend -fsave-optimization-record to specify the format adds 1f50697abc7 Various improvements to Clang MSVC Visualizer adds a8dcd476887 Update the meeting page with papers/issues that are ready f [...] adds 8b1c53b5281 AMDGPU/GlobalISel: Implement select for G_ICMP and G_SELECT adds 5d00c3060e1 [AMDGPU] gfx1010 wave32 metadata adds fee1949b358 AMDGPU/GlobalISel: Account for multiple defs when finding i [...] adds a7f09f3c9e6 GlobalISel: Verify intrinsics adds 3e140066bce GlobalISel: Ignore callsite attributes when picking intrinsic type adds 6452bdd29b5 [LV] Suppress vectorization in some nontemporal cases adds bb9adfdb4e8 [X86][AVX] Split under-aligned vector nt-stores. adds 0cbf37af1e9 gn build: Merge r363541 adds 21184ec5c48 [GWP-ASan] Integration with Scudo [5]. adds b8e8b1769ff [clang][AST] Remove unnecessary 'const'. adds ad04e7ad426 [AMDGPU] Pass to propagate ABI attributes from kernels to t [...] adds 6d741f29ec8 AMDGPU: Fold readlane/readfirstlane calls adds a9191c8492a [AMDGPU] gfx1010 wavefrontsize intrinsic folding adds 2e550cabead Add tests for LWG 3206. NFC adds 05f77803f45 [MemorySSA] Add all MemoryPhis before filling their values. adds 5d942d5a95c AMDGPU: Make getreg intrinsic inaccessiblememonly adds 835999e48aa [X86][SSE] Scalarize under-aligned XMM vector nt-stores (PR42026) adds bf3c59f79bc LiveInterval.h: add LiveRange::findIndexesLiveAt function - [...] adds 546006b64ea Update status of issue 3209 adds f3f968adcd5 [X86] Add TB_NO_REVERSE to some memory folding table entrie [...] adds 49537bbf74a [GlobalISel][AArch64] Fold G_SUB into G_ICMP when it's safe [...] adds 7a0098aa6e3 [MemorySSA] Don't use template when the clone is a simplifi [...] adds daa1ae61429 [EarlyCSE] Fix hashing of self-compares adds 88afd753008 [test] Add wrap flags after D61934. adds 8af7198c6ca AMDGPU: Explicitly define a triple for some tests adds 58c75565f31 Reduced test case for pr42279 in advance of the relevant re [...] adds ae4fcb97dde AMDGPU/GFX10: Don't generate s_code_end padding in the asm-printer adds be8c669af05 [libc++] Update ABI list for ABI v2 adds 79bc188dc24 Attempt to fix GWP-ASan build failure on sanitizer-android. [...] adds 15722626e32 [NFC] Assign a couple of LWG issues to myself adds 4f3b7364a45 PR42205: DebugInfio: Do not attempt to emit debug info meta [...] adds f9626f27c8e Add color to the default thread and frame format. adds cf73dc75da5 gn build: Merge r363584. adds 72adaf3ec85 gn build: Merge r363483. adds 2d26cf37d77 llgdb.py: Make sure to clean up the debugger on exit. adds abccb1ad896 Clang :: Sema/wchar.c has long been failing on Solaris: adds fe8bd96ebd6 Fix a bug w/inbounds invalidation in LFTR (recommit) adds 31382782873 [AMDGPU] Propagate function attributes thru bitcasts adds 17bd226b6a1 Stop counting pops in tsan/check_analyze.sh. adds 184c8ee9208 [globalisel] Fix iterator invalidation in the extload combines adds 496f77f3d39 Add convenience utility for replacing a range within a cont [...] adds 44475363e84 Teach getSCEVAtScope how to handle loop phis w/invariant op [...] adds 5745febe277 Rewrite ConstStructBuilder with a mechanism that can cope w [...] adds 689509edab4 [test][AArch64] Relax the check line for G_BRJT in legalize [...] adds 94bc88ebf4b Fix crash when checking a dependently-typed reference that [...] adds ca42687d62a [AMDGPU] gfx1010 subvector test. NFC. adds 8fbb88fbff5 [GWP-ASan] Disable GWP-ASan on Android for now. adds 121956108f2 [AMDGPU] Use custom inserter for gfx10 VOP2b adds 8df7f1a218f [clang-ifs] Clang Interface Stubs, first version. adds 36a7a982722 [Remarks][Driver] Use the specified format in the remarks f [...] adds 0e183008029 [X86] Make an assert in LowerSCALAR_TO_VECTOR stricter to m [...] adds 971ad74ba26 Use VR128X instead of FR32X/FR64X for the register class in [...] adds f9bff2a55e7 Propagate fmf in IRTranslate for fneg adds 146882242fb [GlobalISel][Localizer] Rewrite localizer to run in 2 phase [...] adds 964909e4a6f [CMake] Fix the value of `config.target_cflags` for non-mac [...] adds c3b6d777553 gn build: Merge r363626. adds fb9ce100d19 hwasan: Add a tag_offset DWARF attribute to instrumented st [...] adds d57f7cc15e2 hwasan: Use bits [3..11) of the ring buffer entry address a [...] adds 5a321b899e7 GlobalISel: Use the original flags when lowering fneg to fsub adds 77477009370 [llvm-strip] Error when using stdin twice adds 3c9f66dccf2 [asan_symbolize] Teach `asan_symbolize.py` to symbolicate p [...] adds 745632c63a5 [NFC] Split `Darwin/asan-symbolize-partial-report-with-modu [...] adds 9216358c211 Disable recently added Darwin symbolization tests for iOS. adds 1f7f64665c2 GlobalISel: Remove redundant pass initialization adds 8582ecd8d93 [X86] Introduce new MOVSSrm/MOVSDrm opcodes that use VR128 [...] adds 587427716c3 [X86] Remove MOVDI2SSrm/MOV64toSDrm/MOVSS2DImr/MOVSDto64mr [...] adds f4284f8a9d9 [X86] Move code that shrinks immediates for ((x << C1) op C [...] adds e86b89ba46e [NFC] Fixing -DBUILD_SHARED_LIBS=ON problem caused by layer [...] adds 02a445c2453 [X86] Add i128 ctpop and i32/i64/i128 optsize test cases to [...] adds 4d36782446d [NFC] Undoing r363646 to fix bots. adds 2d94dd812ff Revert D60974 "[clang-ifs] Clang Interface Stubs, first version." adds 291e11ea025 [llvm-objdump] Tidy up AMDGCNPrettyPrinter adds 5136ea49948 Fix compiler warning by removing unused variable adds 69daf4a72da [SimplifyCFG] NFC, prof branch_weighs handling is simplified adds afb17daedf9 Fix windows build for r363357 adds a1a4f5f12cc [DebugInfo][Docs] Document that prologue/epilogue variable [...] adds 7dd529e54da [X86] Replace any_extend* vector extensions with zero_exten [...] adds 0265716b272 [NFC] Improve triple match of scripts that update tests adds 6658bfb171a [X86] Regenerate promote.ll. NFC. adds 43854e3ccc7 [SVE][IR] Scalable Vector IR Type with pr42210 fix adds 7e854e1cdd2 [AMDGPU] Speed up live-in virtual register set computaion i [...] adds 40fdd7a643b [clangd] Detect C++ language based on well-known file path [...] adds 8ddf31bc33e [clangd] Parse files without extensions if we don't have a [...] adds 8d41294c189 [clangd] Add a capability to enable completions with fixes. adds 5c64a8c4c69 [SystemZ] Fix AHIMuxK pseudo expansion. adds 7a7009f7c82 [ARM] Some Thumb2ITBlock clean ups. NFC adds d5ce8ec778c AMDGPU/GlobalISel: RegBankSelect for amdgcn.div.scale adds 23f03f5059c AMDGPU: Fix iterator crash in AMDGPUPromoteAlloca adds e75e197ad87 AMDGPU: Remove unnecessary check for virtual register adds bcb5ea00428 AMDGPU: Fold readlane from copy of SGPR or imm adds 83bacd8d72b [SelectionDAG] Legalize vaargs that require vector splitting adds 7001fe8d143 gn build: Merge r363649 adds 3c8e2cdda5a gn build: Merge r363658 adds c99d9aee007 MCContext: Delete unused functions adds f39f3bd056f AMDGPU: Change API for checking for exec modification adds 7a89909c842 Require commas to separate multiple GNU-style attributes in [...] adds 3b2f5df12c8 [MCA] Slightly refactor the bottleneck analysis view. NFCI adds 8d35dcd7039 AMDGPU: Add ds_gws_init / ds_gws_barrier intrinsics adds 45b10d2da5c [compiler-rt][SystemZ] Work around ASAN failures via -fno-p [...] adds 395fde753c9 [clangd] Add hidden tweaks to dump AST/selection. adds 9483bcf7815 [clangd] Remove the extra ";", NFC adds d204987ada4 AMDGPU: Disable errno by default adds 677423997d6 [llvm-readobj] Allow --hex-dump/--string-dump to dump multi [...] adds 2acc7176271 AMDGPU: Add GWS instruction builtins adds 2fef12ccb19 Fix -Wunused-but-set-variable warning. NFCI. adds 74c83649547 [RISCV] Lower calls through PLT adds a45292cbfd2 [CodeGen][ARM] Fix FP16 vector coercion adds 1fab01f92bd [libc++] Revert the addition of map/multimap CTAD adds 91185b69d12 [libc++] Re-apply XFAIL to is_base_of test that was inadver [...] adds ed4a6025152 [ARM] Rename MVE instructions in Tablegen for consistency. adds df9ee08b649 [clangd] Return vector<TextEdit> from applyTweak. NFC adds c74fc6d5f96 [libc++] Implement P0608R3 - A sane variant converting constructor adds 9c8593934af [X86][AVX] extract_subvector(any_extend(x)) -> any_extend_v [...] adds 9aa25be1491 [TargetLowering] SimplifyDemandedVectorElts - support MUL a [...] adds faaf1a53663 [ARM] Add MVE integer vector min/max instructions.
No new revisions were added by this update.
Summary of changes: clang-tools-extra/clangd/ClangdLSPServer.cpp | 36 +- clang-tools-extra/clangd/ClangdServer.cpp | 53 +- clang-tools-extra/clangd/ClangdServer.h | 16 +- clang-tools-extra/clangd/FindSymbols.cpp | 60 +- clang-tools-extra/clangd/FindSymbols.h | 5 + .../clangd/GlobalCompilationDatabase.cpp | 6 +- clang-tools-extra/clangd/Protocol.cpp | 11 + clang-tools-extra/clangd/Protocol.h | 28 + clang-tools-extra/clangd/Selection.cpp | 3 + clang-tools-extra/clangd/XRefs.cpp | 54 +- clang-tools-extra/clangd/XRefs.h | 6 +- .../clangd/clients/clangd-vscode/package.json | 10 +- clang-tools-extra/clangd/index/FileIndex.cpp | 5 +- clang-tools-extra/clangd/refactor/Tweak.h | 44 +- .../clangd/refactor/tweaks/CMakeLists.txt | 1 + .../clangd/refactor/tweaks/DumpAST.cpp | 139 ++ .../clangd/refactor/tweaks/RawStringLiteral.cpp | 14 +- .../clangd/refactor/tweaks/SwapIfBranches.cpp | 11 +- clang-tools-extra/clangd/test/type-hierarchy.test | 31 +- clang-tools-extra/clangd/tool/ClangdMain.cpp | 6 + .../clangd/unittests/FileIndexTests.cpp | 22 + .../unittests/GlobalCompilationDatabaseTests.cpp | 4 + .../clangd/unittests/SelectionTests.cpp | 10 + clang-tools-extra/clangd/unittests/TweakTests.cpp | 71 +- .../clangd/unittests/TypeHierarchyTests.cpp | 154 ++- clang-tools-extra/docs/ReleaseNotes.rst | 5 +- .../clang-tidy/checks/android-cloexec-pipe.rst | 1 + .../cppcoreguidelines-pro-type-member-init.rst | 1 + clang/docs/ReleaseNotes.rst | 2 +- clang/docs/UsersManual.rst | 22 +- clang/include/clang/AST/Expr.h | 2 +- clang/include/clang/Basic/BuiltinsAMDGPU.def | 2 + clang/include/clang/Basic/CMakeLists.txt | 6 - clang/include/clang/Basic/CodeGenOptions.h | 3 + clang/include/clang/Basic/DiagnosticDriverKinds.td | 2 + clang/include/clang/Driver/CC1Options.td | 4 +- clang/include/clang/Driver/Options.td | 13 +- clang/lib/AST/Decl.cpp | 2 +- clang/lib/Basic/Targets/OSTargets.h | 6 +- clang/lib/CodeGen/BackendUtil.cpp | 1 + clang/lib/CodeGen/CGCUDANV.cpp | 26 +- clang/lib/CodeGen/CGCUDARuntime.h | 5 + clang/lib/CodeGen/CGDebugInfo.cpp | 3 + clang/lib/CodeGen/CGExprConstant.cpp | 1131 +++++++++------- clang/lib/CodeGen/CodeGenAction.cpp | 5 + clang/lib/CodeGen/CodeGenModule.cpp | 10 +- clang/lib/CodeGen/TargetInfo.cpp | 36 +- clang/lib/Driver/ToolChains/AMDGPU.h | 2 + clang/lib/Driver/ToolChains/Clang.cpp | 27 +- clang/lib/Driver/ToolChains/Darwin.cpp | 17 +- clang/lib/Frontend/CompilerInvocation.cpp | 5 + clang/lib/Parse/ParseDecl.cpp | 10 +- clang/lib/Sema/CMakeLists.txt | 8 + .../clang/Basic => lib/Sema}/OpenCLBuiltins.td | 0 clang/lib/Sema/SemaLookup.cpp | 2 +- .../StaticAnalyzer/Core/BugReporterVisitors.cpp | 729 +++++----- .../Analysis/diagnostics/track_subexpressions.cpp | 64 + .../inlining/placement-new-fp-suppression.cpp | 3 +- clang/test/CodeGen/arm-vfp16-arguments2.cpp | 63 + clang/test/CodeGen/opt-record-MIR.c | 2 + clang/test/CodeGen/opt-record.c | 5 + .../debug-info-var-template-partial-spec.cpp | 13 + clang/test/CodeGenCXX/designated-init.cpp | 66 + clang/test/CodeGenCXX/nrvo.cpp | 1 - clang/test/CodeGenCXX/stack-reuse-exceptions.cpp | 2 +- clang/test/CodeGenObjC/exceptions.m | 2 +- clang/test/CodeGenOpenCL/builtins-amdgcn.cl | 12 + clang/test/Driver/cl-options.c | 1 + clang/test/Driver/clang_f_opts.c | 6 +- clang/test/Driver/darwin-ld.c | 4 + clang/test/Driver/fast-math.c | 6 + clang/test/Driver/opt-record.c | 9 + clang/test/Parser/attributes.c | 12 +- clang/test/Preprocessor/wchar_t.c | 7 +- clang/test/Sema/format-strings.c | 6 +- clang/test/Sema/wchar.c | 6 +- clang/test/SemaTemplate/dependent-expr.cpp | 8 + ...clang-check-mac-libcxx-fixed-compilation-db.cpp | 2 + clang/test/lit.cfg.py | 3 + clang/utils/ClangVisualizers/clang.natvis | 181 ++- compiler-rt/CMakeLists.txt | 9 + compiler-rt/cmake/config-ix.cmake | 31 +- compiler-rt/lib/asan/scripts/asan_symbolize.py | 17 +- compiler-rt/lib/gwp_asan/CMakeLists.txt | 1 + compiler-rt/lib/hwasan/hwasan_thread.cpp | 5 + compiler-rt/lib/scudo/CMakeLists.txt | 9 + compiler-rt/lib/scudo/scudo_allocator.cpp | 47 + compiler-rt/lib/scudo/standalone/CMakeLists.txt | 2 + .../lib/scudo/standalone/allocator_config.h | 80 ++ compiler-rt/lib/scudo/standalone/combined.h | 550 ++++++++ .../lib/scudo/standalone/tests/CMakeLists.txt | 1 + .../lib/scudo/standalone/tests/combined_test.cc | 237 ++++ compiler-rt/lib/tsan/check_analyze.sh | 2 - compiler-rt/test/asan/CMakeLists.txt | 19 +- ...bolize-partial-report-no-external-symbolizer.cc | 38 + ...san-symbolize-partial-report-with-module-map.cc | 40 + compiler-rt/test/fuzzer/CMakeLists.txt | 11 +- compiler-rt/test/gwp_asan/CMakeLists.txt | 3 +- compiler-rt/test/gwp_asan/double_delete.cpp | 15 + compiler-rt/test/gwp_asan/double_deletea.cpp | 15 + compiler-rt/test/gwp_asan/double_free.cpp | 15 + compiler-rt/test/gwp_asan/dummy_test.cc | 4 - compiler-rt/test/gwp_asan/heap_buffer_overflow.cpp | 18 + .../test/gwp_asan/heap_buffer_underflow.cpp | 18 + compiler-rt/test/gwp_asan/invalid_free_left.cpp | 16 + compiler-rt/test/gwp_asan/invalid_free_right.cpp | 16 + compiler-rt/test/gwp_asan/lit.cfg | 13 + compiler-rt/test/gwp_asan/page_size.h | 13 + compiler-rt/test/gwp_asan/realloc.cpp | 44 + compiler-rt/test/gwp_asan/repeated_alloc.cpp | 28 + compiler-rt/test/gwp_asan/use_after_delete.cpp | 18 + compiler-rt/test/gwp_asan/use_after_deletea.cpp | 20 + compiler-rt/test/gwp_asan/use_after_free.cpp | 20 + .../test/hwasan/TestCases/random-align-right.c | 22 +- .../test/hwasan/TestCases/stack-history-length.c | 5 +- compiler-rt/test/hwasan/lit.cfg | 2 +- compiler-rt/test/lit.common.cfg | 3 + compiler-rt/test/lit.common.configured.in | 1 + compiler-rt/test/scudo/lit.cfg | 4 + compiler-rt/test/tsan/CMakeLists.txt | 70 +- compiler-rt/test/ubsan/CMakeLists.txt | 6 +- debuginfo-tests/llgdb.py | 7 +- libcxx/include/iterator | 16 - libcxx/include/map | 57 +- libcxx/include/variant | 32 +- libcxx/lib/abi/x86_64-apple-darwin.v2.abilist | 74 ++ libcxx/src/locale.cpp | 2 +- .../associative/map/map.cons/deduct.fail.cpp | 107 -- .../associative/map/map.cons/deduct.pass.cpp | 137 -- .../associative/map/map.cons/deduct_const.pass.cpp | 107 -- .../multimap/multimap.cons/deduct.fail.cpp | 107 -- .../multimap/multimap.cons/deduct.pass.cpp | 137 -- .../multimap/multimap.cons/deduct_const.pass.cpp | 107 -- .../meta/meta.rel/is_base_of_union.pass.cpp | 6 +- .../time.cal.ymd.members/op.sys_days.pass.cpp | 23 + .../variant.variant/variant.assign/T.pass.cpp | 59 +- .../variant.variant/variant.assign/conv.fail.cpp | 52 + .../variant.variant/variant.ctor/T.pass.cpp | 60 +- .../variant.variant/variant.ctor/conv.fail.cpp | 39 + libcxx/test/support/template_cost_testing.h | 36 + libcxx/www/cxx2a_status.html | 2 +- libcxx/www/upcoming_meeting.html | 84 +- libunwind/src/UnwindRegistersRestore.S | 11 +- lld/ELF/Config.h | 1 + lld/ELF/Driver.cpp | 1 + lld/ELF/LTO.cpp | 1 + lld/ELF/Options.td | 2 + lld/test/ELF/arm-thunk-multipass-plt.s | 14 +- lld/test/ELF/arm-tls-gd32.s | 2 +- lld/test/ELF/gnu-ifunc-noplt-i386.s | 12 +- lld/test/ELF/lto/opt-remarks.ll | 3 + lld/test/ELF/ppc32-call-stub-nopic.s | 2 +- lld/test/ELF/ppc32-call-stub-pic.s | 2 +- lldb/include/lldb/Core/ModuleList.h | 1 + lldb/include/lldb/Core/UniqueCStringMap.h | 6 +- .../breakpoint/break-insert-enable-pending.test | 3 + .../lit/tools/lldb-mi/breakpoint/break-insert.test | 3 + lldb/lit/tools/lldb-mi/data/data-info-line.test | 3 + lldb/lit/tools/lldb-mi/exec/exec-continue.test | 3 + lldb/lit/tools/lldb-mi/exec/exec-finish.test | 3 + lldb/lit/tools/lldb-mi/exec/exec-interrupt.test | 3 + .../tools/lldb-mi/exec/exec-next-instruction.test | 3 + lldb/lit/tools/lldb-mi/exec/exec-next.test | 3 + .../tools/lldb-mi/exec/exec-step-instruction.test | 3 + lldb/lit/tools/lldb-mi/exec/exec-step.test | 3 + .../test/api/multithreaded/driver.cpp.template | 1 + lldb/packages/Python/lldbsuite/test/dotest.py | 27 + lldb/packages/Python/lldbsuite/test/lldbtest.py | 8 +- .../test/macosx/nslog/TestDarwinNSLogOutput.py | 2 +- .../lldbsuite/test/tools/lldb-vscode/vscode.py | 8 +- lldb/source/Core/Debugger.cpp | 29 +- lldb/source/Core/FormatEntity.cpp | 4 +- lldb/source/Core/ModuleList.cpp | 5 + lldb/source/Plugins/SymbolFile/DWARF/DIERef.h | 4 - .../SymbolFile/DWARF/DWARFASTParserClang.cpp | 2 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 70 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.h | 7 +- lldb/tools/lldb-test/lldb-test.cpp | 1 + llvm/docs/LangRef.rst | 57 +- llvm/docs/SourceLevelDebugging.rst | 17 +- llvm/include/llvm/ADT/DenseMapInfo.h | 16 + llvm/include/llvm/ADT/STLExtras.h | 27 + llvm/include/llvm/Analysis/MemorySSAUpdater.h | 8 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 34 +- .../llvm/Analysis/TargetTransformInfoImpl.h | 18 + llvm/include/llvm/BinaryFormat/Dwarf.def | 1 + llvm/include/llvm/BinaryFormat/Dwarf.h | 5 +- llvm/include/llvm/CodeGen/AsmPrinter.h | 16 +- llvm/include/llvm/CodeGen/GlobalISel/Localizer.h | 12 +- llvm/include/llvm/CodeGen/LiveInterval.h | 38 + llvm/include/llvm/CodeGen/MIRYamlMapping.h | 18 +- llvm/include/llvm/CodeGen/TargetFrameLowering.h | 19 + llvm/include/llvm/IR/DerivedTypes.h | 68 +- llvm/include/llvm/IR/Instructions.h | 15 +- llvm/include/llvm/IR/IntrinsicsAArch64.td | 20 +- llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 30 +- llvm/include/llvm/IR/RemarkStreamer.h | 12 +- llvm/include/llvm/IR/Type.h | 1 + llvm/include/llvm/LTO/Config.h | 3 + llvm/include/llvm/LTO/LTO.h | 5 +- llvm/include/llvm/MC/MCContext.h | 15 - llvm/include/llvm/MC/MCExpr.h | 2 + llvm/include/llvm/MCA/HardwareUnits/LSUnit.h | 2 +- llvm/include/llvm/Support/AMDHSAKernelDescriptor.h | 1 + llvm/include/llvm/Support/ScalableSize.h | 43 + .../Vectorize/LoopVectorizationLegality.h | 16 +- llvm/lib/Analysis/InstructionSimplify.cpp | 19 +- llvm/lib/Analysis/MemorySSAUpdater.cpp | 30 +- llvm/lib/Analysis/ScalarEvolution.cpp | 44 +- llvm/lib/Analysis/ScalarEvolutionExpander.cpp | 4 +- llvm/lib/Analysis/TargetTransformInfo.cpp | 14 + llvm/lib/AsmParser/LLLexer.cpp | 1 + llvm/lib/AsmParser/LLParser.cpp | 13 +- llvm/lib/AsmParser/LLToken.h | 1 + llvm/lib/BinaryFormat/Dwarf.cpp | 3 + llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 6 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 5 +- llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 3 + llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp | 3 + llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h | 2 + llvm/lib/CodeGen/CodeGenPrepare.cpp | 58 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 92 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 33 +- llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp | 4 +- llvm/lib/CodeGen/GlobalISel/Legalizer.cpp | 4 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 3 +- llvm/lib/CodeGen/GlobalISel/Localizer.cpp | 223 +++- llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp | 1 - llvm/lib/CodeGen/HardwareLoops.cpp | 16 +- llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 9 + llvm/lib/CodeGen/MIRPrinter.cpp | 5 +- llvm/lib/CodeGen/MachineFrameInfo.cpp | 4 +- llvm/lib/CodeGen/MachineVerifier.cpp | 29 + llvm/lib/CodeGen/PrologEpilogInserter.cpp | 22 +- llvm/lib/CodeGen/SafeStack.cpp | 10 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 66 +- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 1 + .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 23 + llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 6 + llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 9 + llvm/lib/IR/AsmWriter.cpp | 5 +- llvm/lib/IR/DebugInfoMetadata.cpp | 6 +- llvm/lib/IR/LLVMContextImpl.h | 2 +- llvm/lib/IR/RemarkStreamer.cpp | 37 +- llvm/lib/IR/Type.cpp | 13 +- llvm/lib/IR/Verifier.cpp | 35 + llvm/lib/LTO/LTO.cpp | 6 +- llvm/lib/LTO/LTOBackend.cpp | 8 +- llvm/lib/LTO/LTOCodeGenerator.cpp | 10 +- llvm/lib/LTO/ThinLTOCodeGenerator.cpp | 3 +- llvm/lib/MC/MCContext.cpp | 8 - llvm/lib/MC/MCExpr.cpp | 4 + .../Target/AArch64/AArch64InstructionSelector.cpp | 160 ++- .../Target/AArch64/AArch64TargetTransformInfo.h | 4 + llvm/lib/Target/AMDGPU/AMDGPU.h | 11 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 16 +- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 105 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 190 ++- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 2 + llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp | 70 +- llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 13 +- llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp | 14 +- .../Target/AMDGPU/AMDGPUPropagateAttributes.cpp | 336 +++++ llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 80 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 4 + llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 22 +- llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 3 +- llvm/lib/Target/AMDGPU/AMDKernelCodeT.h | 8 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 32 + llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/DSInstructions.td | 6 +- llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp | 2 +- llvm/lib/Target/AMDGPU/GCNRegPressure.cpp | 7 +- llvm/lib/Target/AMDGPU/GCNRegPressure.h | 47 + llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp | 28 +- llvm/lib/Target/AMDGPU/GCNSchedStrategy.h | 3 + .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 4 + .../Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 8 +- llvm/lib/Target/AMDGPU/SIDefines.h | 7 - llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 60 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 34 +- llvm/lib/Target/AMDGPU/SIFrameLowering.h | 2 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 153 ++- llvm/lib/Target/AMDGPU/SIISelLowering.h | 2 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 20 +- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 34 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 287 ++-- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 22 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 3 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 14 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 7 +- llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 81 +- llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp | 68 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 68 +- llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp | 87 +- .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 51 +- llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 5 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 36 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 15 + llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | 25 +- llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp | 50 +- llvm/lib/Target/AMDGPU/SMInstructions.td | 14 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 7 + llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp | 23 + llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h | 4 + llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h | 1 + llvm/lib/Target/AMDGPU/VOP2Instructions.td | 4 +- llvm/lib/Target/ARM/ARM.h | 6 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 24 +- llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp | 146 ++ llvm/lib/Target/ARM/ARMBasicBlockInfo.h | 48 + llvm/lib/Target/ARM/ARMComputeBlockSize.cpp | 80 -- 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18 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 246 ++-- llvm/lib/Target/X86/X86ISelLowering.cpp | 329 ++++- llvm/lib/Target/X86/X86InstrAVX512.td | 90 +- llvm/lib/Target/X86/X86InstrCompiler.td | 12 +- llvm/lib/Target/X86/X86InstrFoldTables.cpp | 36 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 56 +- llvm/lib/Target/X86/X86InstrSSE.td | 164 +-- llvm/lib/Target/X86/X86InstructionSelector.cpp | 20 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 35 + llvm/lib/Target/X86/X86TargetTransformInfo.h | 2 + .../Transforms/InstCombine/InstCombineCalls.cpp | 24 + .../Instrumentation/HWAddressSanitizer.cpp | 73 +- llvm/lib/Transforms/Scalar/EarlyCSE.cpp | 9 +- llvm/lib/Transforms/Scalar/GVN.cpp | 3 +- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 103 +- .../Scalar/InductiveRangeCheckElimination.cpp | 5 +- llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp | 8 +- llvm/lib/Transforms/Scalar/LoopUnswitch.cpp | 3 +- llvm/lib/Transforms/Scalar/StructurizeCFG.cpp | 7 +- llvm/lib/Transforms/Utils/LoopUnrollPeel.cpp | 2 +- llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp | 9 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 105 +- .../Vectorize/LoopVectorizationLegality.cpp | 32 + llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 15 +- llvm/test/Analysis/CostModel/ARM/lit.local.cfg | 1 - llvm/test/Analysis/CostModel/PowerPC/lit.local.cfg | 1 - llvm/test/Analysis/CostModel/RISCV/lit.local.cfg | 1 - llvm/test/Analysis/CostModel/X86/lit.local.cfg | 1 - .../Analysis/MemorySSA/loop-rotate-inv-template.ll | 27 + llvm/test/Analysis/MemorySSA/update_unroll.ll | 51 + llvm/test/Assembler/diexpression.ll | 6 +- llvm/test/Bitcode/compatibility.ll | 4 + .../AArch64/GlobalISel/arm64-irtranslator.ll | 34 +- .../AArch64/GlobalISel/arm64-regbankselect.mir | 2 +- .../CodeGen/AArch64/GlobalISel/call-translator.ll | 2 +- .../GlobalISel/fp128-legalize-crash-pr35690.mir | 2 +- .../GlobalISel/legalizer-info-validation.mir | 2 +- .../AArch64/GlobalISel/localizer-arm64-tti.ll | 62 + llvm/test/CodeGen/AArch64/GlobalISel/localizer.mir | 87 ++ .../CodeGen/AArch64/GlobalISel/opt-fold-cmn.mir | 291 ++++ .../prelegalizercombiner-extending-loads.mir | 2 + .../AArch64/GlobalISel/select-gv-cmodel-large.mir | 2 +- .../AArch64/GlobalISel/select-gv-cmodel-tiny.mir | 2 +- .../CodeGen/AArch64/aarch64-mov-debug-locs.mir | 12 +- .../CodeGen/AArch64/branch-target-enforcment.mir | 4 +- llvm/test/CodeGen/AArch64/cfi_restore.mir | 4 +- .../test/CodeGen/AArch64/dbg-declare-tag-offset.ll | 47 + .../dont-shrink-wrap-stack-mayloadorstore.mir | 4 +- llvm/test/CodeGen/AArch64/max-jump-table.ll | 48 +- llvm/test/CodeGen/AArch64/min-jump-table.ll | 30 +- .../CodeGen/AArch64/reverse-csr-restore-seq.mir | 2 +- .../CodeGen/AArch64/spill-stack-realignment.mir | 4 +- llvm/test/CodeGen/AArch64/stack-id-pei-alloc.mir | 20 +- .../AArch64/stack-id-stackslot-scavenging.mir | 2 +- llvm/test/CodeGen/AArch64/win64-jumptable.ll | 52 +- llvm/test/CodeGen/AArch64/wineh-frame5.mir | 2 +- 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+- llvm/test/CodeGen/ARM/fp16-litpool-arm.mir | 2 +- llvm/test/CodeGen/ARM/fp16-litpool-thumb.mir | 4 +- llvm/test/CodeGen/ARM/fp16-litpool2-arm.mir | 2 +- llvm/test/CodeGen/ARM/fp16-litpool3-arm.mir | 2 +- llvm/test/CodeGen/ARM/lit.local.cfg | 1 - llvm/test/CodeGen/ARM/misched-fusion-aes.ll | 17 +- llvm/test/CodeGen/ARM/mve-vpt-block.mir | 6 +- .../CodeGen/ARM/register-scavenger-exceptions.mir | 6 +- llvm/test/CodeGen/ARM/vector-spilling.ll | 4 +- llvm/test/CodeGen/AVR/lit.local.cfg | 1 - llvm/test/CodeGen/Generic/lit.local.cfg | 1 - llvm/test/CodeGen/Hexagon/lit.local.cfg | 1 - .../CodeGen/Hexagon/loop-idiom/memmove-rt-check.ll | 2 +- llvm/test/CodeGen/Lanai/lit.local.cfg | 1 - .../CodeGen/MIR/AArch64/mirCanonCopyCopyProp.mir | 14 +- .../CodeGen/MIR/AArch64/mirCanonIdempotent.mir | 14 +- .../MIR/AArch64/stack-object-local-offset.mir | 2 +- llvm/test/CodeGen/MIR/AMDGPU/stack-id.mir | 20 +- llvm/test/CodeGen/MIR/AMDGPU/target-flags.mir | 4 +- llvm/test/CodeGen/MIR/Generic/lit.local.cfg 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llvm/test/CodeGen/SystemZ/int-sub-05.ll | 10 +- llvm/test/CodeGen/SystemZ/lit.local.cfg | 1 - llvm/test/CodeGen/SystemZ/subregliveness-06.mir | 4 +- llvm/test/CodeGen/Thumb/PR36658.mir | 4 +- llvm/test/CodeGen/Thumb/lit.local.cfg | 1 - llvm/test/CodeGen/Thumb2/high-reg-spill.mir | 2 +- llvm/test/CodeGen/Thumb2/ifcvt-cbz.mir | 12 +- llvm/test/CodeGen/Thumb2/lit.local.cfg | 1 - llvm/test/CodeGen/Thumb2/peephole-cmp.mir | 2 +- llvm/test/CodeGen/WinEH/lit.local.cfg | 1 - llvm/test/CodeGen/X86/GC/lit.local.cfg | 1 - .../CodeGen/X86/GlobalISel/select-fconstant.mir | 40 +- .../X86/GlobalISel/x32-select-frameIndex.mir | 2 +- .../X86/GlobalISel/x86-legalize-inttoptr.mir | 2 +- .../X86/GlobalISel/x86-legalize-ptrtoint.mir | 8 +- .../CodeGen/X86/GlobalISel/x86-legalize-srem.mir | 12 +- .../CodeGen/X86/GlobalISel/x86-legalize-urem.mir | 12 +- .../X86/GlobalISel/x86-select-frameIndex.mir | 2 +- .../CodeGen/X86/GlobalISel/x86-select-inttoptr.mir | 2 +- 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llvm/test/CodeGen/X86/nontemporal-loads-2.ll | 1395 ++++++++++++++++++++ ...ower-of-two-or-zero-when-comparing-with-zero.ll | 256 ++++ llvm/test/CodeGen/X86/popcnt.ll | 646 +++++++++ llvm/test/CodeGen/X86/pr30821.mir | 24 +- llvm/test/CodeGen/X86/prologepilog_deref_size.mir | 2 +- llvm/test/CodeGen/X86/promote.ll | 10 +- llvm/test/CodeGen/X86/regalloc-copy-hints.mir | 2 +- llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir | 4 +- .../CodeGen/X86/vector-shift-by-select-loop.ll | 374 +++--- llvm/test/CodeGen/X86/vector-shift-lshr-128.ll | 100 +- llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll | 22 +- .../CodeGen/X86/vector-shuffle-combining-avx.ll | 21 +- .../X86/vector-shuffle-combining-avx512bw.ll | 5 +- .../CodeGen/X86/vector-shuffle-combining-xop.ll | 5 +- llvm/test/CodeGen/X86/vselect-avx.ll | 11 +- .../CodeGen/X86/win_coreclr_chkstk_liveins.mir | 2 +- llvm/test/CodeGen/XCore/lit.local.cfg | 1 - llvm/test/DebugInfo/AArch64/asan-stack-vars.mir | 60 +- .../AArch64/compiler-gen-bbs-livedebugvalues.mir | 6 +- llvm/test/DebugInfo/AArch64/lit.local.cfg | 1 - llvm/test/DebugInfo/ARM/cfi-eof-prologue.mir | 8 +- llvm/test/DebugInfo/ARM/lit.local.cfg | 1 - llvm/test/DebugInfo/Generic/lit.local.cfg | 1 - llvm/test/DebugInfo/MIR/AArch64/lit.local.cfg | 1 - llvm/test/DebugInfo/MIR/ARM/lit.local.cfg | 1 - .../MIR/ARM/live-debug-values-reg-copy.mir | 8 +- llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir | 6 +- llvm/test/DebugInfo/MIR/Mips/lit.local.cfg | 1 - .../MIR/Mips/live-debug-values-reg-copy.mir | 8 +- .../DebugInfo/MIR/X86/dbg-stack-value-range.mir | 4 +- llvm/test/DebugInfo/MIR/X86/debug-loc-0.mir | 2 +- llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir | 16 +- .../MIR/X86/live-debug-values-reg-copy.mir | 6 +- .../MIR/X86/live-debug-values-restore.mir | 14 +- llvm/test/DebugInfo/MIR/lit.local.cfg | 1 - llvm/test/DebugInfo/SystemZ/lit.local.cfg | 1 - llvm/test/DebugInfo/X86/debug-loc-asan.mir | 22 +- llvm/test/DebugInfo/X86/debug-loc-offset.mir | 14 +- llvm/test/DebugInfo/X86/dw_op_minus.mir | 4 +- llvm/test/DebugInfo/X86/live-debug-vars-dse.mir | 2 +- llvm/test/DebugInfo/X86/pr19307.mir | 10 +- llvm/test/DebugInfo/X86/prolog-params.mir | 8 +- .../test/ExecutionEngine/JITLink/X86/lit.local.cfg | 1 - .../RuntimeDyld/AArch64/lit.local.cfg | 1 - .../ExecutionEngine/RuntimeDyld/ARM/lit.local.cfg | 1 - .../ExecutionEngine/RuntimeDyld/Mips/lit.local.cfg | 1 - .../RuntimeDyld/PowerPC/lit.local.cfg | 1 - .../RuntimeDyld/SystemZ/lit.local.cfg | 1 - .../ExecutionEngine/RuntimeDyld/X86/lit.local.cfg | 1 - .../AddressSanitizer/X86/lit.local.cfg | 1 - .../HWAddressSanitizer/dbg-declare-tag-offset.ll | 50 + .../Instrumentation/HWAddressSanitizer/prologue.ll | 7 +- .../InstrProfiling/X86/lit.local.cfg | 1 - llvm/test/JitListener/lit.local.cfg | 1 - llvm/test/MC/AMDGPU/hsa-diag-v3.s | 41 + llvm/test/MC/AMDGPU/hsa-gfx10-v3.s | 223 ++++ llvm/test/MC/AMDGPU/{hsa.s => hsa-gfx10.s} | 22 +- llvm/test/MC/AMDGPU/hsa-wave-size.s | 65 + llvm/test/MC/AMDGPU/hsa.s | 4 +- llvm/test/MC/AMDGPU/hsa_isa_version_attrs.s | 2 + llvm/test/MC/ARM/AlignedBundling/lit.local.cfg | 1 - llvm/test/MC/ARM/lit.local.cfg | 1 - llvm/test/MC/ARM/mve-minmax.s | 58 + llvm/test/MC/AVR/lit.local.cfg | 1 - llvm/test/MC/AsmParser/lit.local.cfg | 1 - llvm/test/MC/BPF/lit.local.cfg | 1 - llvm/test/MC/COFF/ARM/lit.local.cfg | 1 - llvm/test/MC/COFF/cv-loc-unreachable-2.s | 2 +- llvm/test/MC/COFF/cv-loc-unreachable.s | 2 +- llvm/test/MC/COFF/lit.local.cfg | 1 - llvm/test/MC/Disassembler/AArch64/lit.local.cfg | 1 - llvm/test/MC/Disassembler/ARC/lit.local.cfg | 1 - llvm/test/MC/Disassembler/ARM/lit.local.cfg | 1 - llvm/test/MC/Disassembler/ARM/mve-minmax.txt | 48 + llvm/test/MC/Disassembler/Hexagon/lit.local.cfg | 1 - llvm/test/MC/Disassembler/Lanai/lit.local.cfg | 1 - llvm/test/MC/Disassembler/MSP430/lit.local.cfg | 1 - llvm/test/MC/Disassembler/Mips/lit.local.cfg | 1 - llvm/test/MC/Disassembler/PowerPC/lit.local.cfg | 1 - llvm/test/MC/Disassembler/RISCV/lit.local.cfg | 1 - llvm/test/MC/Disassembler/Sparc/lit.local.cfg | 1 - llvm/test/MC/Disassembler/SystemZ/lit.local.cfg | 1 - .../test/MC/Disassembler/WebAssembly/lit.local.cfg | 1 - llvm/test/MC/Disassembler/X86/lit.local.cfg | 1 - llvm/test/MC/ELF/lit.local.cfg | 1 - llvm/test/MC/Hexagon/lit.local.cfg | 1 - llvm/test/MC/Lanai/lit.local.cfg | 1 - llvm/test/MC/MSP430/lit.local.cfg | 1 - llvm/test/MC/MachO/AArch64/lit.local.cfg | 1 - llvm/test/MC/MachO/ARM/lit.local.cfg | 1 - llvm/test/MC/MachO/lit.local.cfg | 1 - llvm/test/MC/Mips/lit.local.cfg | 1 - llvm/test/MC/RISCV/lit.local.cfg | 1 - llvm/test/MC/Sparc/lit.local.cfg | 1 - llvm/test/MC/X86/AlignedBundling/lit.local.cfg | 1 - llvm/test/MachineVerifier/test_g_intrinsic.mir | 38 + .../test_g_intrinsic_w_side_effects.mir | 35 + llvm/test/Object/X86/lit.local.cfg | 1 - llvm/test/ObjectYAML/MachO/virtual_section.yaml | 226 ++++ llvm/test/Other/X86/lit.local.cfg | 1 - .../test/ThinLTO/X86/diagnostic-handler-remarks.ll | 1 + llvm/test/ThinLTO/X86/lit.local.cfg | 1 - .../Transforms/ArgumentPromotion/X86/lit.local.cfg | 1 - .../Transforms/AtomicExpand/AArch64/lit.local.cfg | 1 - .../test/Transforms/AtomicExpand/ARM/lit.local.cfg | 1 - .../Transforms/CodeExtractor/X86/lit.local.cfg | 1 - .../CodeGenPrepare/AArch64/lit.local.cfg | 1 - .../Transforms/CodeGenPrepare/AMDGPU/lit.local.cfg | 1 - .../Transforms/CodeGenPrepare/ARM/lit.local.cfg | 1 - .../Transforms/CodeGenPrepare/X86/lit.local.cfg | 1 - .../Transforms/CodeGenPrepare/X86/vec-shift.ll | 49 +- .../ConstantHoisting/PowerPC/lit.local.cfg | 1 - .../Transforms/ConstantHoisting/X86/lit.local.cfg | 1 - .../Transforms/DivRemPairs/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/DivRemPairs/X86/lit.local.cfg | 1 - llvm/test/Transforms/EarlyCSE/commute.ll | 16 + .../test/Transforms/ExpandMemCmp/X86/lit.local.cfg | 1 - .../Transforms/GlobalOpt/PowerPC/lit.local.cfg | 1 - .../Transforms/HardwareLoops/ARM/lit.local.cfg | 1 - .../test/Transforms/HardwareLoops/ARM/structure.ll | 76 ++ .../HardwareLoops/unconditional-latch.ll | 46 + .../test/Transforms/HotColdSplit/X86/lit.local.cfg | 1 - .../IndVarSimplify/2011-10-27-lftrnull.ll | 4 +- .../IndVarSimplify/2011-11-01-lftrptr.ll | 10 +- .../Transforms/IndVarSimplify/exit_value_tests.ll | 41 +- .../Transforms/IndVarSimplify/lftr-dead-ivs.ll | 8 +- llvm/test/Transforms/IndVarSimplify/lftr.ll | 33 +- llvm/test/Transforms/IndVarSimplify/pr39673.ll | 4 +- .../Transforms/InferAddressSpaces/AMDGPU/icmp.ll | 26 +- .../AMDGPU/infer-addrspacecast.ll | 4 +- .../InferAddressSpaces/AMDGPU/intrinsics.ll | 20 +- .../InferAddressSpaces/AMDGPU/lit.local.cfg | 1 - .../InferAddressSpaces/AMDGPU/no-flat-addrspace.ll | 13 + .../AMDGPU/redundant-addrspacecast.ll | 27 + .../Transforms/InferAddressSpaces/AMDGPU/select.ll | 18 +- .../InferAddressSpaces/AMDGPU/volatile.ll | 9 +- llvm/test/Transforms/Inline/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/Inline/X86/lit.local.cfg | 1 - .../InstCombine/AMDGPU/amdgcn-intrinsics.ll | 163 ++- .../Transforms/InstCombine/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/InstCombine/with_overflow.ll | 1 + llvm/test/Transforms/InstSimplify/call.ll | 16 +- .../LoadStoreVectorizer/AMDGPU/lit.local.cfg | 1 - .../LoadStoreVectorizer/NVPTX/lit.local.cfg | 1 - .../LoadStoreVectorizer/X86/lit.local.cfg | 1 - .../test/Transforms/LoopIdiom/AMDGPU/lit.local.cfg | 1 - llvm/test/Transforms/LoopIdiom/X86/lit.local.cfg | 1 - .../LoopIdiom/X86/unordered-atomic-memcpy.ll | 8 +- llvm/test/Transforms/LoopIdiom/basic.ll | 12 +- .../LoopIdiom/memcpy-debugify-remarks.ll | 2 +- llvm/test/Transforms/LoopReroll/basic.ll | 2 +- llvm/test/Transforms/LoopReroll/complex_reroll.ll | 2 +- llvm/test/Transforms/LoopReroll/nonconst_lb.ll | 4 +- llvm/test/Transforms/LoopReroll/ptrindvar.ll | 2 +- .../LoopStrengthReduce/2011-10-06-ReusePhi.ll | 4 +- .../LoopStrengthReduce/AMDGPU/lit.local.cfg | 1 - .../LoopStrengthReduce/ARM/lit.local.cfg | 1 - .../LoopStrengthReduce/X86/lit.local.cfg | 1 - .../LoopStrengthReduce/post-inc-icmpzero.ll | 2 +- .../Transforms/LoopUnroll/AArch64/lit.local.cfg | 1 - .../Transforms/LoopUnroll/AMDGPU/lit.local.cfg | 1 - llvm/test/Transforms/LoopUnroll/ARM/lit.local.cfg | 1 - .../Transforms/LoopUnroll/Hexagon/lit.local.cfg | 1 - .../Transforms/LoopUnroll/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/LoopUnroll/X86/lit.local.cfg | 1 - .../Transforms/LoopVectorize/AArch64/lit.local.cfg | 1 - .../Transforms/LoopVectorize/ARM/lit.local.cfg | 1 - .../Transforms/LoopVectorize/PowerPC/lit.local.cfg | 1 - .../Transforms/LoopVectorize/X86/lit.local.cfg | 1 - .../Transforms/LoopVectorize/X86/nontemporal.ll | 112 ++ .../X86/x86_fp80-interleaved-access.ll | 29 + llvm/test/Transforms/LoopVectorize/nontemporal.ll | 10 +- llvm/test/Transforms/PGOProfile/X86/lit.local.cfg | 1 - .../Transforms/SLPVectorizer/AMDGPU/lit.local.cfg | 1 - .../Transforms/SLPVectorizer/SystemZ/lit.local.cfg | 1 - .../Transforms/SLPVectorizer/X86/lit.local.cfg | 1 - .../Transforms/SafeStack/AArch64/lit.local.cfg | 1 - llvm/test/Transforms/SafeStack/ARM/lit.local.cfg | 1 - llvm/test/Transforms/SafeStack/X86/lit.local.cfg | 1 - .../AMDGPU/lit.local.cfg | 1 - .../SeparateConstOffsetFromGEP/NVPTX/lit.local.cfg | 1 - .../Transforms/SimplifyCFG/SPARC/lit.local.cfg | 1 - llvm/test/Transforms/SimplifyCFG/X86/lit.local.cfg | 1 - .../Transforms/SimplifyCFG/sink-common-code.ll | 44 + llvm/test/Transforms/SimplifyCFG/switch-profmd.ll | 35 + .../Transforms/StackProtector/X86/lit.local.cfg | 1 - .../ThinLTOBitcodeWriter/x86/lit.local.cfg | 1 - .../intrinsic-arg-overloading-struct-ret.ll | 79 ++ llvm/test/Verifier/scalable-aggregates.ll | 27 + llvm/test/Verifier/scalable-global-vars.ll | 26 + llvm/test/tools/dsymutil/ARM/lit.local.cfg | 1 - llvm/test/tools/gold/X86/opt-remarks.ll | 2 + llvm/test/tools/llvm-lib/lit.local.cfg | 1 - llvm/test/tools/llvm-lto2/X86/lit.local.cfg | 1 - llvm/test/tools/llvm-mc/lit.local.cfg | 1 - llvm/test/tools/llvm-mca/SystemZ/lit.local.cfg | 1 - .../X86/Barcelona/clear-super-register-1.s | 63 + .../X86/Barcelona/clear-super-register-2.s | 118 ++ .../X86/Barcelona/dependency-breaking-cmp.s | 70 + .../X86/Barcelona/dependency-breaking-pcmpeq.s | 107 ++ .../X86/Barcelona/dependency-breaking-pcmpgt.s | 108 ++ .../X86/Barcelona/dependency-breaking-sbb-1.s | 71 + .../X86/Barcelona/dependency-breaking-sbb-2.s | 78 ++ .../X86/Barcelona/int-to-fpu-forwarding-1.s | 194 +++ .../X86/Barcelona/int-to-fpu-forwarding-2.s | 182 +++ .../X86/Barcelona/int-to-fpu-forwarding-3.s | 74 ++ .../test/tools/llvm-mca/X86/Barcelona/one-idioms.s | 96 ++ .../llvm-mca/X86/Barcelona/partial-reg-update-2.s | 47 + .../llvm-mca/X86/Barcelona/partial-reg-update-3.s | 76 ++ .../llvm-mca/X86/Barcelona/partial-reg-update-4.s | 77 ++ .../llvm-mca/X86/Barcelona/partial-reg-update-5.s | 59 + .../llvm-mca/X86/Barcelona/partial-reg-update-6.s | 79 ++ .../llvm-mca/X86/Barcelona/partial-reg-update-7.s | 98 ++ .../llvm-mca/X86/Barcelona/partial-reg-update.s | 47 + .../tools/llvm-mca/X86/Barcelona/rcu-statistics.s | 64 + .../tools/llvm-mca/X86/Barcelona/read-advance-1.s | 48 + .../tools/llvm-mca/X86/Barcelona/read-advance-2.s | 47 + .../tools/llvm-mca/X86/Barcelona/read-advance-3.s | 47 + .../X86/Barcelona/reg-move-elimination-1.s | 80 ++ .../X86/Barcelona/reg-move-elimination-2.s | 121 ++ .../X86/Barcelona/reg-move-elimination-3.s | 106 ++ .../X86/Barcelona/reg-move-elimination-4.s | 92 ++ .../X86/Barcelona/reg-move-elimination-5.s | 92 ++ .../X86/Barcelona/reg-move-elimination-6.s | 98 ++ .../X86/{Generic => Barcelona}/resources-3dnow.s | 0 .../X86/{Generic => Barcelona}/resources-cmov.s | 0 .../X86/{Generic => Barcelona}/resources-cmpxchg.s | 0 .../X86/{Generic => Barcelona}/resources-lea.s | 0 .../X86/{Generic => Barcelona}/resources-lzcnt.s | 0 .../X86/{Generic => Barcelona}/resources-mmx.s | 0 .../X86/{Generic => Barcelona}/resources-popcnt.s | 0 .../{Generic => Barcelona}/resources-prefetchw.s | 0 .../X86/{Generic => Barcelona}/resources-sse1.s | 0 .../X86/{Generic => Barcelona}/resources-sse2.s | 0 .../X86/{Generic => Barcelona}/resources-sse3.s | 0 .../X86/{Generic => Barcelona}/resources-sse4a.s | 0 .../X86/{Generic => Barcelona}/resources-x86_32.s | 0 .../X86/{Generic => Barcelona}/resources-x86_64.s | 0 .../X86/{Generic => Barcelona}/resources-x87.s | 0 .../tools/llvm-mca/X86/Barcelona/zero-idioms.s | 242 ++++ .../llvm-mca/X86/BdVer2/clear-super-register-3.s | 112 ++ llvm/test/tools/llvm-mca/X86/cpus.s | 6 + llvm/test/tools/llvm-mca/X86/lit.local.cfg | 1 - llvm/test/tools/llvm-mca/X86/read-after-ld-1.s | 190 +-- .../tools/llvm-mca/X86/register-file-statistics.s | 71 +- .../tools/llvm-mca/X86/scheduler-queue-usage.s | 10 + .../test/tools/llvm-mca/X86/sqrt-rsqrt-rcp-memop.s | 25 + llvm/test/tools/llvm-mca/lit.local.cfg | 1 - .../tools/llvm-objcopy/ELF/cross-arch-headers.test | 12 + .../ELF/overlapping-sections-in-segments.test | 1 + .../llvm-objcopy/ELF/overlapping-sections.test | 1 + .../tools/llvm-objcopy/ELF/same-file-strip.test | 26 + llvm/test/tools/llvm-objdump/Mips/lit.local.cfg | 1 - .../tools/llvm-objdump/PowerPC/branch-offset.s | 4 +- .../tools/llvm-objdump/X86/print-symbol-addr.s | 35 +- llvm/test/tools/llvm-readobj/AArch64/lit.local.cfg | 1 - llvm/test/tools/llvm-readobj/ARM/lit.local.cfg | 1 - llvm/test/tools/llvm-readobj/hex-dump-multi.s | 21 + llvm/test/tools/llvm-readobj/hex-dump.test | 59 + llvm/test/tools/llvm-readobj/hexdump.test | 32 - llvm/test/tools/llvm-readobj/print-hex.test | 26 - llvm/test/tools/llvm-readobj/string-dump-multi.s | 21 + llvm/test/tools/llvm-readobj/string-dump.test | 17 +- llvm/tools/gold/gold-plugin.cpp | 4 + llvm/tools/llc/llc.cpp | 8 +- llvm/tools/llvm-lto2/llvm-lto2.cpp | 6 + llvm/tools/llvm-mca/Views/BottleneckAnalysis.cpp | 104 +- llvm/tools/llvm-mca/Views/BottleneckAnalysis.h | 53 +- llvm/tools/llvm-mca/llvm-mca.cpp | 6 +- llvm/tools/llvm-objcopy/CopyConfig.cpp | 19 +- llvm/tools/llvm-objcopy/CopyConfig.h | 7 +- llvm/tools/llvm-objcopy/llvm-objcopy.cpp | 8 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 39 +- llvm/tools/llvm-readobj/ObjDumper.cpp | 209 +-- llvm/tools/llvm-readobj/ObjDumper.h | 6 +- llvm/tools/llvm-readobj/llvm-readobj.cpp | 8 +- llvm/tools/opt/opt.cpp | 8 +- llvm/tools/yaml2obj/yaml2macho.cpp | 18 +- .../CodeGen/GlobalISel/LegalizerHelperTest.cpp | 46 + llvm/unittests/IR/CMakeLists.txt | 1 + llvm/unittests/IR/VectorTypesTest.cpp | 164 +++ llvm/utils/UpdateTestChecks/asm.py | 69 +- .../secondary/clang/include/clang/Basic/BUILD.gn | 8 - llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn | 8 +- .../gn/secondary/compiler-rt/lib/hwasan/BUILD.gn | 2 + llvm/utils/gn/secondary/compiler-rt/test/BUILD.gn | 1 + .../llvm/lib/ExecutionEngine/JITLink/BUILD.gn | 1 + .../gn/secondary/llvm/lib/Target/ARM/BUILD.gn | 2 +- llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn | 1 + polly/lib/Transform/ScopInliner.cpp | 1 + .../CodeGen/partial_write_in_region_with_loop.ll | 2 +- .../Isl/CodeGen/scev_expansion_in_nonaffine.ll | 4 +- 833 files changed, 21941 insertions(+), 6486 deletions(-) create mode 100644 clang-tools-extra/clangd/refactor/tweaks/DumpAST.cpp rename clang/{include/clang/Basic => lib/Sema}/OpenCLBuiltins.td (100%) create mode 100644 clang/test/CodeGen/arm-vfp16-arguments2.cpp create mode 100644 clang/test/CodeGenCXX/debug-info-var-template-partial-spec.cpp create mode 100644 clang/test/CodeGenCXX/designated-init.cpp create mode 100644 compiler-rt/lib/scudo/standalone/allocator_config.h create mode 100644 compiler-rt/lib/scudo/standalone/combined.h create mode 100644 compiler-rt/lib/scudo/standalone/tests/combined_test.cc create mode 100644 compiler-rt/test/asan/TestCases/Darwin/asan-symbolize-partial-r [...] create mode 100644 compiler-rt/test/asan/TestCases/Darwin/asan-symbolize-partial-r [...] create mode 100644 compiler-rt/test/gwp_asan/double_delete.cpp create mode 100644 compiler-rt/test/gwp_asan/double_deletea.cpp create mode 100644 compiler-rt/test/gwp_asan/double_free.cpp delete mode 100644 compiler-rt/test/gwp_asan/dummy_test.cc create mode 100644 compiler-rt/test/gwp_asan/heap_buffer_overflow.cpp create mode 100644 compiler-rt/test/gwp_asan/heap_buffer_underflow.cpp create mode 100644 compiler-rt/test/gwp_asan/invalid_free_left.cpp create mode 100644 compiler-rt/test/gwp_asan/invalid_free_right.cpp create mode 100644 compiler-rt/test/gwp_asan/page_size.h create mode 100644 compiler-rt/test/gwp_asan/realloc.cpp create mode 100644 compiler-rt/test/gwp_asan/repeated_alloc.cpp create mode 100644 compiler-rt/test/gwp_asan/use_after_delete.cpp create mode 100644 compiler-rt/test/gwp_asan/use_after_deletea.cpp create mode 100644 compiler-rt/test/gwp_asan/use_after_free.cpp delete mode 100644 libcxx/test/std/containers/associative/map/map.cons/deduct.fail.cpp delete mode 100644 libcxx/test/std/containers/associative/map/map.cons/deduct.pass.cpp delete mode 100644 libcxx/test/std/containers/associative/map/map.cons/deduct_cons [...] delete mode 100644 libcxx/test/std/containers/associative/multimap/multimap.cons/d [...] delete mode 100644 libcxx/test/std/containers/associative/multimap/multimap.cons/d [...] delete mode 100644 libcxx/test/std/containers/associative/multimap/multimap.cons/d [...] create mode 100644 libcxx/test/std/utilities/variant/variant.variant/variant.assig [...] create mode 100644 libcxx/test/std/utilities/variant/variant.variant/variant.ctor/ [...] create mode 100644 libcxx/test/support/template_cost_testing.h create mode 100644 llvm/include/llvm/Support/ScalableSize.h create mode 100644 llvm/lib/Target/AMDGPU/AMDGPUPropagateAttributes.cpp create mode 100644 llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp delete mode 100644 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