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from 8af23b30edb Fix illegal memory access parsing corrupt DWARF information. new 42b68db1703 sim: avr: move arch-specific settings to internal header new e24a921d403 sim: aarch64: move arch-specific settings to internal header new e50840893dc sim: arm: move arch-specific settings to internal header new e79b75a3cfc sim: cr16: move arch-specific settings to internal header new 6960600787f sim: d10v: move arch-specific settings to internal header new 84bc490d588 sim: ft32: move arch-specific settings to internal header new dcd1a4d15ac sim: msp430: move arch-specific settings to internal header new f625c714c2c sim: v850: standardize the arch-specific settings a little new f3e1a3e6fa8 sim: riscv: move arch-specific settings to internal header new 9da0101a1fb sim: moxie: move arch-specific settings to internal header new ca6fd350844 sim: example-synacor: move arch-specific settings to intern [...] new 7790fabeb76 sim: microblaze: move arch-specific settings to internal header new 627bdb63949 sim: mn10300: standardize the arch-specific settings a little new 2a91447ab87 sim: pru: move arch-specific settings to internal header new 758f5a9875a sim: h8300: move arch-specific settings to internal header new 7e9c749ccc2 sim: mcore: move arch-specific settings to internal header new 12d563bbf76 sim: sh: move arch-specific settings to internal header new 600ddfd55a0 sim: m68hc11: move arch-specific settings to internal header new 218366690f0 sim: bfin: move arch-specific settings to internal header new f51d9c6a77e sim: m32r: move arch-specific settings to internal header
The 20 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: sim/aarch64/{sim-main.h => aarch64-sim.h} | 17 +- sim/aarch64/cpustate.c | 2 + sim/aarch64/cpustate.h | 1 + sim/aarch64/interp.c | 2 + sim/aarch64/sim-main.h | 35 - sim/aarch64/simulator.c | 1 + sim/arm/{sim-main.h => arm-sim.h} | 10 +- sim/arm/armdefs.h | 6 + sim/arm/armemu.h | 2 + sim/arm/sim-main.h | 5 - sim/arm/wrapper.c | 1 + sim/avr/{sim-main.h => avr-sim.h} | 12 +- sim/avr/interp.c | 1 + sim/avr/sim-main.h | 18 - sim/bfin/bfin-sim.c | 2 + sim/bfin/bfin-sim.h | 29 + sim/bfin/devices.h | 2 + sim/bfin/dv-bfin_pll.c | 1 - sim/bfin/interp.c | 3 + sim/bfin/machs.c | 3 + sim/bfin/sim-main.h | 36 - sim/cr16/{cr16_sim.h => cr16-sim.h} | 1 + sim/cr16/gencode.c | 3 +- sim/cr16/interp.c | 2 + sim/cr16/sim-main.h | 2 - sim/cr16/simops.c | 2 + sim/d10v/{d10v_sim.h => d10v-sim.h} | 5 + sim/d10v/endian.c | 4 +- sim/d10v/gencode.c | 3 +- sim/d10v/interp.c | 2 + sim/d10v/sim-main.h | 2 - sim/d10v/simops.c | 2 + .../{sim-main.h => example-synacor-sim.h} | 9 +- sim/example-synacor/interp.c | 2 + sim/example-synacor/sim-main.c | 2 + sim/example-synacor/sim-main.h | 14 - sim/ft32/interp.c | 2 + sim/ft32/sim-main.h | 2 - sim/h8300/compile.c | 2 + sim/h8300/{sim-main.h => h8300-sim.h} | 21 +- sim/h8300/sim-main.h | 147 ----- sim/m32r/m32r-sim.h | 22 + sim/m32r/m32r.c | 2 + sim/m32r/m32r2.c | 2 + sim/m32r/m32rx.c | 2 + sim/m32r/sim-if.c | 1 + sim/m32r/sim-main.h | 24 +- sim/m32r/traps.c | 2 + sim/m68hc11/dv-m68hc11.c | 2 + sim/m68hc11/dv-m68hc11eepr.c | 2 +- sim/m68hc11/dv-m68hc11sio.c | 1 + sim/m68hc11/dv-m68hc11spi.c | 1 + sim/m68hc11/dv-m68hc11tim.c | 2 + sim/m68hc11/dv-nvram.c | 1 + sim/m68hc11/emulos.c | 2 + sim/m68hc11/gencode.c | 2 +- sim/m68hc11/interp.c | 2 + sim/m68hc11/interrupts.c | 2 + sim/m68hc11/{sim-main.h => m68hc11-sim.h} | 30 +- sim/m68hc11/m68hc11_sim.c | 4 +- sim/m68hc11/sim-main.h | 541 ---------------- sim/mcore/interp.c | 2 + sim/mcore/{sim-main.h => mcore-sim.h} | 10 +- sim/mcore/sim-main.h | 40 -- sim/microblaze/interp.c | 1 + sim/microblaze/{sim-main.h => microblaze-sim.h} | 8 +- sim/microblaze/sim-main.h | 24 - sim/mn10300/interp.c | 2 - sim/mn10300/{mn10300_sim.h => mn10300-sim.h} | 24 +- sim/mn10300/op_utils.c | 10 +- sim/mn10300/sim-main.h | 34 +- sim/moxie/interp.c | 2 + sim/moxie/{sim-main.h => moxie-sim.h} | 9 +- sim/moxie/sim-main.h | 11 - sim/msp430/msp430-sim.c | 2 + sim/msp430/msp430-sim.h | 2 + sim/msp430/sim-main.h | 8 - sim/pru/pru.h | 56 ++ sim/pru/sim-main.h | 58 -- sim/riscv/interp.c | 2 + sim/riscv/machs.c | 1 + sim/riscv/{sim-main.h => riscv-sim.h} | 10 +- sim/riscv/sim-main.c | 2 + sim/riscv/sim-main.h | 55 -- sim/sh/interp.c | 2 + sim/sh/{sim-main.h => sh-sim.h} | 9 +- sim/sh/sim-main.h | 96 --- sim/v850/interp.c | 2 +- sim/v850/sim-main.h | 721 +-------------------- sim/v850/simops.c | 2 +- sim/v850/simops.h | 3 + sim/v850/{sim-main.h => v850-sim.h} | 89 ++- sim/v850/v850_sim.h | 8 - 93 files changed, 344 insertions(+), 2026 deletions(-) copy sim/aarch64/{sim-main.h => aarch64-sim.h} (85%) copy sim/arm/{sim-main.h => arm-sim.h} (86%) copy sim/avr/{sim-main.h => avr-sim.h} (86%) rename sim/cr16/{cr16_sim.h => cr16-sim.h} (99%) rename sim/d10v/{d10v_sim.h => d10v-sim.h} (99%) copy sim/example-synacor/{sim-main.h => example-synacor-sim.h} (90%) copy sim/h8300/{sim-main.h => h8300-sim.h} (93%) copy sim/m68hc11/{sim-main.h => m68hc11-sim.h} (99%) copy sim/mcore/{sim-main.h => mcore-sim.h} (93%) copy sim/microblaze/{sim-main.h => microblaze-sim.h} (92%) rename sim/mn10300/{mn10300_sim.h => mn10300-sim.h} (94%) copy sim/moxie/{sim-main.h => moxie-sim.h} (89%) copy sim/riscv/{sim-main.h => riscv-sim.h} (94%) copy sim/sh/{sim-main.h => sh-sim.h} (95%) copy sim/v850/{sim-main.h => v850-sim.h} (92%) delete mode 100644 sim/v850/v850_sim.h