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from ab56dc92bf7 Fix MSVC "result of 32-bit shift implicitly converted to 64 [...] new 9a235760be5 [NFC][InstCombine] Redundant masking before left-shift: tes [...] new 4cd899a6d57 [NFC][InstCombine] Tests for 'rem' formation from sub-of-mu [...]
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Summary of changes: ...redundant-left-shift-input-masking-variant-c.ll | 34 +++++- ...redundant-left-shift-input-masking-variant-d.ll | 42 ++++++-- ...redundant-left-shift-input-masking-variant-e.ll | 38 +++++-- ...redundant-left-shift-input-masking-variant-f.ll | 38 +++++-- .../InstCombine/srem-via-sdiv-mul-sub.ll | 117 +++++++++++++++++++++ .../InstCombine/urem-via-udiv-mul-sub.ll | 117 +++++++++++++++++++++ 6 files changed, 364 insertions(+), 22 deletions(-) create mode 100644 test/Transforms/InstCombine/srem-via-sdiv-mul-sub.ll create mode 100644 test/Transforms/InstCombine/urem-via-udiv-mul-sub.ll